Path: blob/master/drivers/accel/ivpu/ivpu_mmu_context.h
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/* SPDX-License-Identifier: GPL-2.0-only */1/*2* Copyright (C) 2020-2023 Intel Corporation3*/45#ifndef __IVPU_MMU_CONTEXT_H__6#define __IVPU_MMU_CONTEXT_H__78#include <drm/drm_mm.h>910struct ivpu_device;11struct ivpu_file_priv;12struct ivpu_addr_range;1314#define IVPU_MMU_PGTABLE_ENTRIES 512ull1516struct ivpu_mmu_pgtable {17u64 ***pte_ptrs[IVPU_MMU_PGTABLE_ENTRIES];18u64 **pmd_ptrs[IVPU_MMU_PGTABLE_ENTRIES];19u64 *pud_ptrs[IVPU_MMU_PGTABLE_ENTRIES];20u64 *pgd_dma_ptr;21dma_addr_t pgd_dma;22};2324struct ivpu_mmu_context {25struct mutex lock; /* Protects: mm, pgtable, is_cd_valid */26struct drm_mm mm;27struct ivpu_mmu_pgtable pgtable;28bool is_cd_valid;29u32 id;30};3132void ivpu_mmu_context_init(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx, u32 context_id);33void ivpu_mmu_context_fini(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx);34void ivpu_mmu_global_context_init(struct ivpu_device *vdev);35void ivpu_mmu_global_context_fini(struct ivpu_device *vdev);36int ivpu_mmu_reserved_context_init(struct ivpu_device *vdev);37void ivpu_mmu_reserved_context_fini(struct ivpu_device *vdev);3839int ivpu_mmu_context_insert_node(struct ivpu_mmu_context *ctx, const struct ivpu_addr_range *range,40u64 size, struct drm_mm_node *node);41void ivpu_mmu_context_remove_node(struct ivpu_mmu_context *ctx, struct drm_mm_node *node);4243int ivpu_mmu_context_map_sgt(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx,44u64 vpu_addr, struct sg_table *sgt, bool llc_coherent);45void ivpu_mmu_context_unmap_sgt(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx,46u64 vpu_addr, struct sg_table *sgt);47int ivpu_mmu_context_set_pages_ro(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx,48u64 vpu_addr, size_t size);4950#endif /* __IVPU_MMU_CONTEXT_H__ */515253