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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/drivers/block/swim3.c
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1
// SPDX-License-Identifier: GPL-2.0-or-later
2
/*
3
* Driver for the SWIM3 (Super Woz Integrated Machine 3)
4
* floppy controller found on Power Macintoshes.
5
*
6
* Copyright (C) 1996 Paul Mackerras.
7
*/
8
9
/*
10
* TODO:
11
* handle 2 drives
12
* handle GCR disks
13
*/
14
15
#undef DEBUG
16
17
#include <linux/stddef.h>
18
#include <linux/kernel.h>
19
#include <linux/sched/signal.h>
20
#include <linux/timer.h>
21
#include <linux/delay.h>
22
#include <linux/fd.h>
23
#include <linux/ioctl.h>
24
#include <linux/blk-mq.h>
25
#include <linux/interrupt.h>
26
#include <linux/mutex.h>
27
#include <linux/module.h>
28
#include <linux/spinlock.h>
29
#include <linux/wait.h>
30
#include <linux/major.h>
31
#include <asm/io.h>
32
#include <asm/dbdma.h>
33
#include <asm/prom.h>
34
#include <linux/uaccess.h>
35
#include <asm/mediabay.h>
36
#include <asm/machdep.h>
37
#include <asm/pmac_feature.h>
38
39
#define MAX_FLOPPIES 2
40
41
static DEFINE_MUTEX(swim3_mutex);
42
static struct gendisk *disks[MAX_FLOPPIES];
43
44
enum swim_state {
45
idle,
46
locating,
47
seeking,
48
settling,
49
do_transfer,
50
jogging,
51
available,
52
revalidating,
53
ejecting
54
};
55
56
#define REG(x) unsigned char x; char x ## _pad[15];
57
58
/*
59
* The names for these registers mostly represent speculation on my part.
60
* It will be interesting to see how close they are to the names Apple uses.
61
*/
62
struct swim3 {
63
REG(data);
64
REG(timer); /* counts down at 1MHz */
65
REG(error);
66
REG(mode);
67
REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */
68
REG(setup);
69
REG(control); /* writing bits clears them */
70
REG(status); /* writing bits sets them in control */
71
REG(intr);
72
REG(nseek); /* # tracks to seek */
73
REG(ctrack); /* current track number */
74
REG(csect); /* current sector number */
75
REG(gap3); /* size of gap 3 in track format */
76
REG(sector); /* sector # to read or write */
77
REG(nsect); /* # sectors to read or write */
78
REG(intr_enable);
79
};
80
81
#define control_bic control
82
#define control_bis status
83
84
/* Bits in select register */
85
#define CA_MASK 7
86
#define LSTRB 8
87
88
/* Bits in control register */
89
#define DO_SEEK 0x80
90
#define FORMAT 0x40
91
#define SELECT 0x20
92
#define WRITE_SECTORS 0x10
93
#define DO_ACTION 0x08
94
#define DRIVE2_ENABLE 0x04
95
#define DRIVE_ENABLE 0x02
96
#define INTR_ENABLE 0x01
97
98
/* Bits in status register */
99
#define FIFO_1BYTE 0x80
100
#define FIFO_2BYTE 0x40
101
#define ERROR 0x20
102
#define DATA 0x08
103
#define RDDATA 0x04
104
#define INTR_PENDING 0x02
105
#define MARK_BYTE 0x01
106
107
/* Bits in intr and intr_enable registers */
108
#define ERROR_INTR 0x20
109
#define DATA_CHANGED 0x10
110
#define TRANSFER_DONE 0x08
111
#define SEEN_SECTOR 0x04
112
#define SEEK_DONE 0x02
113
#define TIMER_DONE 0x01
114
115
/* Bits in error register */
116
#define ERR_DATA_CRC 0x80
117
#define ERR_ADDR_CRC 0x40
118
#define ERR_OVERRUN 0x04
119
#define ERR_UNDERRUN 0x01
120
121
/* Bits in setup register */
122
#define S_SW_RESET 0x80
123
#define S_GCR_WRITE 0x40
124
#define S_IBM_DRIVE 0x20
125
#define S_TEST_MODE 0x10
126
#define S_FCLK_DIV2 0x08
127
#define S_GCR 0x04
128
#define S_COPY_PROT 0x02
129
#define S_INV_WDATA 0x01
130
131
/* Select values for swim3_action */
132
#define SEEK_POSITIVE 0
133
#define SEEK_NEGATIVE 4
134
#define STEP 1
135
#define MOTOR_ON 2
136
#define MOTOR_OFF 6
137
#define INDEX 3
138
#define EJECT 7
139
#define SETMFM 9
140
#define SETGCR 13
141
142
/* Select values for swim3_select and swim3_readbit */
143
#define STEP_DIR 0
144
#define STEPPING 1
145
#define MOTOR_ON 2
146
#define RELAX 3 /* also eject in progress */
147
#define READ_DATA_0 4
148
#define ONEMEG_DRIVE 5
149
#define SINGLE_SIDED 6 /* drive or diskette is 4MB type? */
150
#define DRIVE_PRESENT 7
151
#define DISK_IN 8
152
#define WRITE_PROT 9
153
#define TRACK_ZERO 10
154
#define TACHO 11
155
#define READ_DATA_1 12
156
#define GCR_MODE 13
157
#define SEEK_COMPLETE 14
158
#define TWOMEG_MEDIA 15
159
160
/* Definitions of values used in writing and formatting */
161
#define DATA_ESCAPE 0x99
162
#define GCR_SYNC_EXC 0x3f
163
#define GCR_SYNC_CONV 0x80
164
#define GCR_FIRST_MARK 0xd5
165
#define GCR_SECOND_MARK 0xaa
166
#define GCR_ADDR_MARK "\xd5\xaa\x00"
167
#define GCR_DATA_MARK "\xd5\xaa\x0b"
168
#define GCR_SLIP_BYTE "\x27\xaa"
169
#define GCR_SELF_SYNC "\x3f\xbf\x1e\x34\x3c\x3f"
170
171
#define DATA_99 "\x99\x99"
172
#define MFM_ADDR_MARK "\x99\xa1\x99\xa1\x99\xa1\x99\xfe"
173
#define MFM_INDEX_MARK "\x99\xc2\x99\xc2\x99\xc2\x99\xfc"
174
#define MFM_GAP_LEN 12
175
176
struct floppy_state {
177
enum swim_state state;
178
struct swim3 __iomem *swim3; /* hardware registers */
179
struct dbdma_regs __iomem *dma; /* DMA controller registers */
180
int swim3_intr; /* interrupt number for SWIM3 */
181
int dma_intr; /* interrupt number for DMA channel */
182
int cur_cyl; /* cylinder head is on, or -1 */
183
int cur_sector; /* last sector we saw go past */
184
int req_cyl; /* the cylinder for the current r/w request */
185
int head; /* head number ditto */
186
int req_sector; /* sector number ditto */
187
int scount; /* # sectors we're transferring at present */
188
int retries;
189
int settle_time;
190
int secpercyl; /* disk geometry information */
191
int secpertrack;
192
int total_secs;
193
int write_prot; /* 1 if write-protected, 0 if not, -1 dunno */
194
struct dbdma_cmd *dma_cmd;
195
int ref_count;
196
int expect_cyl;
197
struct timer_list timeout;
198
int timeout_pending;
199
int ejected;
200
wait_queue_head_t wait;
201
int wanted;
202
struct macio_dev *mdev;
203
char dbdma_cmd_space[5 * sizeof(struct dbdma_cmd)];
204
int index;
205
struct request *cur_req;
206
struct blk_mq_tag_set tag_set;
207
};
208
209
#define swim3_err(fmt, arg...) dev_err(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
210
#define swim3_warn(fmt, arg...) dev_warn(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
211
#define swim3_info(fmt, arg...) dev_info(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
212
213
#ifdef DEBUG
214
#define swim3_dbg(fmt, arg...) dev_dbg(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
215
#else
216
#define swim3_dbg(fmt, arg...) do { } while(0)
217
#endif
218
219
static struct floppy_state floppy_states[MAX_FLOPPIES];
220
static int floppy_count = 0;
221
static DEFINE_SPINLOCK(swim3_lock);
222
223
static unsigned short write_preamble[] = {
224
0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, /* gap field */
225
0, 0, 0, 0, 0, 0, /* sync field */
226
0x99a1, 0x99a1, 0x99a1, 0x99fb, /* data address mark */
227
0x990f /* no escape for 512 bytes */
228
};
229
230
static unsigned short write_postamble[] = {
231
0x9904, /* insert CRC */
232
0x4e4e, 0x4e4e,
233
0x9908, /* stop writing */
234
0, 0, 0, 0, 0, 0
235
};
236
237
static void seek_track(struct floppy_state *fs, int n);
238
static void act(struct floppy_state *fs);
239
static void scan_timeout(struct timer_list *t);
240
static void seek_timeout(struct timer_list *t);
241
static void settle_timeout(struct timer_list *t);
242
static void xfer_timeout(struct timer_list *t);
243
static irqreturn_t swim3_interrupt(int irq, void *dev_id);
244
/*static void fd_dma_interrupt(int irq, void *dev_id);*/
245
static int grab_drive(struct floppy_state *fs, enum swim_state state,
246
int interruptible);
247
static void release_drive(struct floppy_state *fs);
248
static int fd_eject(struct floppy_state *fs);
249
static int floppy_ioctl(struct block_device *bdev, blk_mode_t mode,
250
unsigned int cmd, unsigned long param);
251
static int floppy_open(struct gendisk *disk, blk_mode_t mode);
252
static unsigned int floppy_check_events(struct gendisk *disk,
253
unsigned int clearing);
254
static int floppy_revalidate(struct gendisk *disk);
255
256
static bool swim3_end_request(struct floppy_state *fs, blk_status_t err, unsigned int nr_bytes)
257
{
258
struct request *req = fs->cur_req;
259
260
swim3_dbg(" end request, err=%d nr_bytes=%d, cur_req=%p\n",
261
err, nr_bytes, req);
262
263
if (err)
264
nr_bytes = blk_rq_cur_bytes(req);
265
if (blk_update_request(req, err, nr_bytes))
266
return true;
267
__blk_mq_end_request(req, err);
268
fs->cur_req = NULL;
269
return false;
270
}
271
272
static void swim3_select(struct floppy_state *fs, int sel)
273
{
274
struct swim3 __iomem *sw = fs->swim3;
275
276
out_8(&sw->select, RELAX);
277
if (sel & 8)
278
out_8(&sw->control_bis, SELECT);
279
else
280
out_8(&sw->control_bic, SELECT);
281
out_8(&sw->select, sel & CA_MASK);
282
}
283
284
static void swim3_action(struct floppy_state *fs, int action)
285
{
286
struct swim3 __iomem *sw = fs->swim3;
287
288
swim3_select(fs, action);
289
udelay(1);
290
out_8(&sw->select, sw->select | LSTRB);
291
udelay(2);
292
out_8(&sw->select, sw->select & ~LSTRB);
293
udelay(1);
294
}
295
296
static int swim3_readbit(struct floppy_state *fs, int bit)
297
{
298
struct swim3 __iomem *sw = fs->swim3;
299
int stat;
300
301
swim3_select(fs, bit);
302
udelay(1);
303
stat = in_8(&sw->status);
304
return (stat & DATA) == 0;
305
}
306
307
static blk_status_t swim3_queue_rq(struct blk_mq_hw_ctx *hctx,
308
const struct blk_mq_queue_data *bd)
309
{
310
struct floppy_state *fs = hctx->queue->queuedata;
311
struct request *req = bd->rq;
312
unsigned long x;
313
314
spin_lock_irq(&swim3_lock);
315
if (fs->cur_req || fs->state != idle) {
316
spin_unlock_irq(&swim3_lock);
317
return BLK_STS_DEV_RESOURCE;
318
}
319
blk_mq_start_request(req);
320
fs->cur_req = req;
321
if (fs->mdev->media_bay &&
322
check_media_bay(fs->mdev->media_bay) != MB_FD) {
323
swim3_dbg("%s", " media bay absent, dropping req\n");
324
swim3_end_request(fs, BLK_STS_IOERR, 0);
325
goto out;
326
}
327
if (fs->ejected) {
328
swim3_dbg("%s", " disk ejected\n");
329
swim3_end_request(fs, BLK_STS_IOERR, 0);
330
goto out;
331
}
332
if (rq_data_dir(req) == WRITE) {
333
if (fs->write_prot < 0)
334
fs->write_prot = swim3_readbit(fs, WRITE_PROT);
335
if (fs->write_prot) {
336
swim3_dbg("%s", " try to write, disk write protected\n");
337
swim3_end_request(fs, BLK_STS_IOERR, 0);
338
goto out;
339
}
340
}
341
342
/*
343
* Do not remove the cast. blk_rq_pos(req) is now a sector_t and can be
344
* 64 bits, but it will never go past 32 bits for this driver anyway, so
345
* we can safely cast it down and not have to do a 64/32 division
346
*/
347
fs->req_cyl = ((long)blk_rq_pos(req)) / fs->secpercyl;
348
x = ((long)blk_rq_pos(req)) % fs->secpercyl;
349
fs->head = x / fs->secpertrack;
350
fs->req_sector = x % fs->secpertrack + 1;
351
fs->state = do_transfer;
352
fs->retries = 0;
353
354
act(fs);
355
356
out:
357
spin_unlock_irq(&swim3_lock);
358
return BLK_STS_OK;
359
}
360
361
static void set_timeout(struct floppy_state *fs, int nticks,
362
void (*proc)(struct timer_list *t))
363
{
364
if (fs->timeout_pending)
365
timer_delete(&fs->timeout);
366
fs->timeout.expires = jiffies + nticks;
367
fs->timeout.function = proc;
368
add_timer(&fs->timeout);
369
fs->timeout_pending = 1;
370
}
371
372
static inline void scan_track(struct floppy_state *fs)
373
{
374
struct swim3 __iomem *sw = fs->swim3;
375
376
swim3_select(fs, READ_DATA_0);
377
in_8(&sw->intr); /* clear SEEN_SECTOR bit */
378
in_8(&sw->error);
379
out_8(&sw->intr_enable, SEEN_SECTOR);
380
out_8(&sw->control_bis, DO_ACTION);
381
/* enable intr when track found */
382
set_timeout(fs, HZ, scan_timeout); /* enable timeout */
383
}
384
385
static inline void seek_track(struct floppy_state *fs, int n)
386
{
387
struct swim3 __iomem *sw = fs->swim3;
388
389
if (n >= 0) {
390
swim3_action(fs, SEEK_POSITIVE);
391
sw->nseek = n;
392
} else {
393
swim3_action(fs, SEEK_NEGATIVE);
394
sw->nseek = -n;
395
}
396
fs->expect_cyl = (fs->cur_cyl >= 0)? fs->cur_cyl + n: -1;
397
swim3_select(fs, STEP);
398
in_8(&sw->error);
399
/* enable intr when seek finished */
400
out_8(&sw->intr_enable, SEEK_DONE);
401
out_8(&sw->control_bis, DO_SEEK);
402
set_timeout(fs, 3*HZ, seek_timeout); /* enable timeout */
403
fs->settle_time = 0;
404
}
405
406
/*
407
* XXX: this is a horrible hack, but at least allows ppc32 to get
408
* out of defining virt_to_bus, and this driver out of using the
409
* deprecated block layer bounce buffering for highmem addresses
410
* for no good reason.
411
*/
412
static unsigned long swim3_phys_to_bus(phys_addr_t paddr)
413
{
414
return paddr + PCI_DRAM_OFFSET;
415
}
416
417
static phys_addr_t swim3_bio_phys(struct bio *bio)
418
{
419
return page_to_phys(bio_page(bio)) + bio_offset(bio);
420
}
421
422
static inline void init_dma(struct dbdma_cmd *cp, int cmd,
423
phys_addr_t paddr, int count)
424
{
425
cp->req_count = cpu_to_le16(count);
426
cp->command = cpu_to_le16(cmd);
427
cp->phy_addr = cpu_to_le32(swim3_phys_to_bus(paddr));
428
cp->xfer_status = 0;
429
}
430
431
static inline void setup_transfer(struct floppy_state *fs)
432
{
433
int n;
434
struct swim3 __iomem *sw = fs->swim3;
435
struct dbdma_cmd *cp = fs->dma_cmd;
436
struct dbdma_regs __iomem *dr = fs->dma;
437
struct request *req = fs->cur_req;
438
439
if (blk_rq_cur_sectors(req) <= 0) {
440
swim3_warn("%s", "Transfer 0 sectors ?\n");
441
return;
442
}
443
if (rq_data_dir(req) == WRITE)
444
n = 1;
445
else {
446
n = fs->secpertrack - fs->req_sector + 1;
447
if (n > blk_rq_cur_sectors(req))
448
n = blk_rq_cur_sectors(req);
449
}
450
451
swim3_dbg(" setup xfer at sect %d (of %d) head %d for %d\n",
452
fs->req_sector, fs->secpertrack, fs->head, n);
453
454
fs->scount = n;
455
swim3_select(fs, fs->head? READ_DATA_1: READ_DATA_0);
456
out_8(&sw->sector, fs->req_sector);
457
out_8(&sw->nsect, n);
458
out_8(&sw->gap3, 0);
459
out_le32(&dr->cmdptr, swim3_phys_to_bus(virt_to_phys(cp)));
460
if (rq_data_dir(req) == WRITE) {
461
/* Set up 3 dma commands: write preamble, data, postamble */
462
init_dma(cp, OUTPUT_MORE, virt_to_phys(write_preamble),
463
sizeof(write_preamble));
464
++cp;
465
init_dma(cp, OUTPUT_MORE, swim3_bio_phys(req->bio), 512);
466
++cp;
467
init_dma(cp, OUTPUT_LAST, virt_to_phys(write_postamble),
468
sizeof(write_postamble));
469
} else {
470
init_dma(cp, INPUT_LAST, swim3_bio_phys(req->bio), n * 512);
471
}
472
++cp;
473
out_le16(&cp->command, DBDMA_STOP);
474
out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
475
in_8(&sw->error);
476
out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
477
if (rq_data_dir(req) == WRITE)
478
out_8(&sw->control_bis, WRITE_SECTORS);
479
in_8(&sw->intr);
480
out_le32(&dr->control, (RUN << 16) | RUN);
481
/* enable intr when transfer complete */
482
out_8(&sw->intr_enable, TRANSFER_DONE);
483
out_8(&sw->control_bis, DO_ACTION);
484
set_timeout(fs, 2*HZ, xfer_timeout); /* enable timeout */
485
}
486
487
static void act(struct floppy_state *fs)
488
{
489
for (;;) {
490
swim3_dbg(" act loop, state=%d, req_cyl=%d, cur_cyl=%d\n",
491
fs->state, fs->req_cyl, fs->cur_cyl);
492
493
switch (fs->state) {
494
case idle:
495
return; /* XXX shouldn't get here */
496
497
case locating:
498
if (swim3_readbit(fs, TRACK_ZERO)) {
499
swim3_dbg("%s", " locate track 0\n");
500
fs->cur_cyl = 0;
501
if (fs->req_cyl == 0)
502
fs->state = do_transfer;
503
else
504
fs->state = seeking;
505
break;
506
}
507
scan_track(fs);
508
return;
509
510
case seeking:
511
if (fs->cur_cyl < 0) {
512
fs->expect_cyl = -1;
513
fs->state = locating;
514
break;
515
}
516
if (fs->req_cyl == fs->cur_cyl) {
517
swim3_warn("%s", "Whoops, seeking 0\n");
518
fs->state = do_transfer;
519
break;
520
}
521
seek_track(fs, fs->req_cyl - fs->cur_cyl);
522
return;
523
524
case settling:
525
/* check for SEEK_COMPLETE after 30ms */
526
fs->settle_time = (HZ + 32) / 33;
527
set_timeout(fs, fs->settle_time, settle_timeout);
528
return;
529
530
case do_transfer:
531
if (fs->cur_cyl != fs->req_cyl) {
532
if (fs->retries > 5) {
533
swim3_err("Wrong cylinder in transfer, want: %d got %d\n",
534
fs->req_cyl, fs->cur_cyl);
535
swim3_end_request(fs, BLK_STS_IOERR, 0);
536
fs->state = idle;
537
return;
538
}
539
fs->state = seeking;
540
break;
541
}
542
setup_transfer(fs);
543
return;
544
545
case jogging:
546
seek_track(fs, -5);
547
return;
548
549
default:
550
swim3_err("Unknown state %d\n", fs->state);
551
return;
552
}
553
}
554
}
555
556
static void scan_timeout(struct timer_list *t)
557
{
558
struct floppy_state *fs = timer_container_of(fs, t, timeout);
559
struct swim3 __iomem *sw = fs->swim3;
560
unsigned long flags;
561
562
swim3_dbg("* scan timeout, state=%d\n", fs->state);
563
564
spin_lock_irqsave(&swim3_lock, flags);
565
fs->timeout_pending = 0;
566
out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
567
out_8(&sw->select, RELAX);
568
out_8(&sw->intr_enable, 0);
569
fs->cur_cyl = -1;
570
if (fs->retries > 5) {
571
swim3_end_request(fs, BLK_STS_IOERR, 0);
572
fs->state = idle;
573
} else {
574
fs->state = jogging;
575
act(fs);
576
}
577
spin_unlock_irqrestore(&swim3_lock, flags);
578
}
579
580
static void seek_timeout(struct timer_list *t)
581
{
582
struct floppy_state *fs = timer_container_of(fs, t, timeout);
583
struct swim3 __iomem *sw = fs->swim3;
584
unsigned long flags;
585
586
swim3_dbg("* seek timeout, state=%d\n", fs->state);
587
588
spin_lock_irqsave(&swim3_lock, flags);
589
fs->timeout_pending = 0;
590
out_8(&sw->control_bic, DO_SEEK);
591
out_8(&sw->select, RELAX);
592
out_8(&sw->intr_enable, 0);
593
swim3_err("%s", "Seek timeout\n");
594
swim3_end_request(fs, BLK_STS_IOERR, 0);
595
fs->state = idle;
596
spin_unlock_irqrestore(&swim3_lock, flags);
597
}
598
599
static void settle_timeout(struct timer_list *t)
600
{
601
struct floppy_state *fs = timer_container_of(fs, t, timeout);
602
struct swim3 __iomem *sw = fs->swim3;
603
unsigned long flags;
604
605
swim3_dbg("* settle timeout, state=%d\n", fs->state);
606
607
spin_lock_irqsave(&swim3_lock, flags);
608
fs->timeout_pending = 0;
609
if (swim3_readbit(fs, SEEK_COMPLETE)) {
610
out_8(&sw->select, RELAX);
611
fs->state = locating;
612
act(fs);
613
goto unlock;
614
}
615
out_8(&sw->select, RELAX);
616
if (fs->settle_time < 2*HZ) {
617
++fs->settle_time;
618
set_timeout(fs, 1, settle_timeout);
619
goto unlock;
620
}
621
swim3_err("%s", "Seek settle timeout\n");
622
swim3_end_request(fs, BLK_STS_IOERR, 0);
623
fs->state = idle;
624
unlock:
625
spin_unlock_irqrestore(&swim3_lock, flags);
626
}
627
628
static void xfer_timeout(struct timer_list *t)
629
{
630
struct floppy_state *fs = timer_container_of(fs, t, timeout);
631
struct swim3 __iomem *sw = fs->swim3;
632
struct dbdma_regs __iomem *dr = fs->dma;
633
unsigned long flags;
634
int n;
635
636
swim3_dbg("* xfer timeout, state=%d\n", fs->state);
637
638
spin_lock_irqsave(&swim3_lock, flags);
639
fs->timeout_pending = 0;
640
out_le32(&dr->control, RUN << 16);
641
/* We must wait a bit for dbdma to stop */
642
for (n = 0; (in_le32(&dr->status) & ACTIVE) && n < 1000; n++)
643
udelay(1);
644
out_8(&sw->intr_enable, 0);
645
out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
646
out_8(&sw->select, RELAX);
647
swim3_err("Timeout %sing sector %ld\n",
648
(rq_data_dir(fs->cur_req)==WRITE? "writ": "read"),
649
(long)blk_rq_pos(fs->cur_req));
650
swim3_end_request(fs, BLK_STS_IOERR, 0);
651
fs->state = idle;
652
spin_unlock_irqrestore(&swim3_lock, flags);
653
}
654
655
static irqreturn_t swim3_interrupt(int irq, void *dev_id)
656
{
657
struct floppy_state *fs = (struct floppy_state *) dev_id;
658
struct swim3 __iomem *sw = fs->swim3;
659
int intr, err, n;
660
int stat, resid;
661
struct dbdma_regs __iomem *dr;
662
struct dbdma_cmd *cp;
663
unsigned long flags;
664
struct request *req = fs->cur_req;
665
666
swim3_dbg("* interrupt, state=%d\n", fs->state);
667
668
spin_lock_irqsave(&swim3_lock, flags);
669
intr = in_8(&sw->intr);
670
err = (intr & ERROR_INTR)? in_8(&sw->error): 0;
671
if ((intr & ERROR_INTR) && fs->state != do_transfer)
672
swim3_err("Non-transfer error interrupt: state=%d, dir=%x, intr=%x, err=%x\n",
673
fs->state, rq_data_dir(req), intr, err);
674
switch (fs->state) {
675
case locating:
676
if (intr & SEEN_SECTOR) {
677
out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
678
out_8(&sw->select, RELAX);
679
out_8(&sw->intr_enable, 0);
680
timer_delete(&fs->timeout);
681
fs->timeout_pending = 0;
682
if (sw->ctrack == 0xff) {
683
swim3_err("%s", "Seen sector but cyl=ff?\n");
684
fs->cur_cyl = -1;
685
if (fs->retries > 5) {
686
swim3_end_request(fs, BLK_STS_IOERR, 0);
687
fs->state = idle;
688
} else {
689
fs->state = jogging;
690
act(fs);
691
}
692
break;
693
}
694
fs->cur_cyl = sw->ctrack;
695
fs->cur_sector = sw->csect;
696
if (fs->expect_cyl != -1 && fs->expect_cyl != fs->cur_cyl)
697
swim3_err("Expected cyl %d, got %d\n",
698
fs->expect_cyl, fs->cur_cyl);
699
fs->state = do_transfer;
700
act(fs);
701
}
702
break;
703
case seeking:
704
case jogging:
705
if (sw->nseek == 0) {
706
out_8(&sw->control_bic, DO_SEEK);
707
out_8(&sw->select, RELAX);
708
out_8(&sw->intr_enable, 0);
709
timer_delete(&fs->timeout);
710
fs->timeout_pending = 0;
711
if (fs->state == seeking)
712
++fs->retries;
713
fs->state = settling;
714
act(fs);
715
}
716
break;
717
case settling:
718
out_8(&sw->intr_enable, 0);
719
timer_delete(&fs->timeout);
720
fs->timeout_pending = 0;
721
act(fs);
722
break;
723
case do_transfer:
724
if ((intr & (ERROR_INTR | TRANSFER_DONE)) == 0)
725
break;
726
out_8(&sw->intr_enable, 0);
727
out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
728
out_8(&sw->select, RELAX);
729
timer_delete(&fs->timeout);
730
fs->timeout_pending = 0;
731
dr = fs->dma;
732
cp = fs->dma_cmd;
733
if (rq_data_dir(req) == WRITE)
734
++cp;
735
/*
736
* Check that the main data transfer has finished.
737
* On writing, the swim3 sometimes doesn't use
738
* up all the bytes of the postamble, so we can still
739
* see DMA active here. That doesn't matter as long
740
* as all the sector data has been transferred.
741
*/
742
if ((intr & ERROR_INTR) == 0 && cp->xfer_status == 0) {
743
/* wait a little while for DMA to complete */
744
for (n = 0; n < 100; ++n) {
745
if (cp->xfer_status != 0)
746
break;
747
udelay(1);
748
barrier();
749
}
750
}
751
/* turn off DMA */
752
out_le32(&dr->control, (RUN | PAUSE) << 16);
753
stat = le16_to_cpu(cp->xfer_status);
754
resid = le16_to_cpu(cp->res_count);
755
if (intr & ERROR_INTR) {
756
n = fs->scount - 1 - resid / 512;
757
if (n > 0) {
758
blk_update_request(req, 0, n << 9);
759
fs->req_sector += n;
760
}
761
if (fs->retries < 5) {
762
++fs->retries;
763
act(fs);
764
} else {
765
swim3_err("Error %sing block %ld (err=%x)\n",
766
rq_data_dir(req) == WRITE? "writ": "read",
767
(long)blk_rq_pos(req), err);
768
swim3_end_request(fs, BLK_STS_IOERR, 0);
769
fs->state = idle;
770
}
771
} else {
772
if ((stat & ACTIVE) == 0 || resid != 0) {
773
/* musta been an error */
774
swim3_err("fd dma error: stat=%x resid=%d\n", stat, resid);
775
swim3_err(" state=%d, dir=%x, intr=%x, err=%x\n",
776
fs->state, rq_data_dir(req), intr, err);
777
swim3_end_request(fs, BLK_STS_IOERR, 0);
778
fs->state = idle;
779
break;
780
}
781
fs->retries = 0;
782
if (swim3_end_request(fs, 0, fs->scount << 9)) {
783
fs->req_sector += fs->scount;
784
if (fs->req_sector > fs->secpertrack) {
785
fs->req_sector -= fs->secpertrack;
786
if (++fs->head > 1) {
787
fs->head = 0;
788
++fs->req_cyl;
789
}
790
}
791
act(fs);
792
} else
793
fs->state = idle;
794
}
795
break;
796
default:
797
swim3_err("Don't know what to do in state %d\n", fs->state);
798
}
799
spin_unlock_irqrestore(&swim3_lock, flags);
800
return IRQ_HANDLED;
801
}
802
803
/*
804
static void fd_dma_interrupt(int irq, void *dev_id)
805
{
806
}
807
*/
808
809
/* Called under the mutex to grab exclusive access to a drive */
810
static int grab_drive(struct floppy_state *fs, enum swim_state state,
811
int interruptible)
812
{
813
unsigned long flags;
814
815
swim3_dbg("%s", "-> grab drive\n");
816
817
spin_lock_irqsave(&swim3_lock, flags);
818
if (fs->state != idle && fs->state != available) {
819
++fs->wanted;
820
/* this will enable irqs in order to sleep */
821
if (!interruptible)
822
wait_event_lock_irq(fs->wait,
823
fs->state == available,
824
swim3_lock);
825
else if (wait_event_interruptible_lock_irq(fs->wait,
826
fs->state == available,
827
swim3_lock)) {
828
--fs->wanted;
829
spin_unlock_irqrestore(&swim3_lock, flags);
830
return -EINTR;
831
}
832
--fs->wanted;
833
}
834
fs->state = state;
835
spin_unlock_irqrestore(&swim3_lock, flags);
836
837
return 0;
838
}
839
840
static void release_drive(struct floppy_state *fs)
841
{
842
struct request_queue *q = disks[fs->index]->queue;
843
unsigned int memflags;
844
unsigned long flags;
845
846
swim3_dbg("%s", "-> release drive\n");
847
848
spin_lock_irqsave(&swim3_lock, flags);
849
fs->state = idle;
850
spin_unlock_irqrestore(&swim3_lock, flags);
851
852
memflags = blk_mq_freeze_queue(q);
853
blk_mq_quiesce_queue(q);
854
blk_mq_unquiesce_queue(q);
855
blk_mq_unfreeze_queue(q, memflags);
856
}
857
858
static int fd_eject(struct floppy_state *fs)
859
{
860
int err, n;
861
862
err = grab_drive(fs, ejecting, 1);
863
if (err)
864
return err;
865
swim3_action(fs, EJECT);
866
for (n = 20; n > 0; --n) {
867
if (signal_pending(current)) {
868
err = -EINTR;
869
break;
870
}
871
swim3_select(fs, RELAX);
872
schedule_timeout_interruptible(1);
873
if (swim3_readbit(fs, DISK_IN) == 0)
874
break;
875
}
876
swim3_select(fs, RELAX);
877
udelay(150);
878
fs->ejected = 1;
879
release_drive(fs);
880
return err;
881
}
882
883
static struct floppy_struct floppy_type =
884
{ 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,NULL }; /* 7 1.44MB 3.5" */
885
886
static int floppy_locked_ioctl(struct block_device *bdev, blk_mode_t mode,
887
unsigned int cmd, unsigned long param)
888
{
889
struct floppy_state *fs = bdev->bd_disk->private_data;
890
int err;
891
892
if ((cmd & 0x80) && !capable(CAP_SYS_ADMIN))
893
return -EPERM;
894
895
if (fs->mdev->media_bay &&
896
check_media_bay(fs->mdev->media_bay) != MB_FD)
897
return -ENXIO;
898
899
switch (cmd) {
900
case FDEJECT:
901
if (fs->ref_count != 1)
902
return -EBUSY;
903
err = fd_eject(fs);
904
return err;
905
case FDGETPRM:
906
if (copy_to_user((void __user *) param, &floppy_type,
907
sizeof(struct floppy_struct)))
908
return -EFAULT;
909
return 0;
910
}
911
return -ENOTTY;
912
}
913
914
static int floppy_ioctl(struct block_device *bdev, blk_mode_t mode,
915
unsigned int cmd, unsigned long param)
916
{
917
int ret;
918
919
mutex_lock(&swim3_mutex);
920
ret = floppy_locked_ioctl(bdev, mode, cmd, param);
921
mutex_unlock(&swim3_mutex);
922
923
return ret;
924
}
925
926
static int floppy_open(struct gendisk *disk, blk_mode_t mode)
927
{
928
struct floppy_state *fs = disk->private_data;
929
struct swim3 __iomem *sw = fs->swim3;
930
int n, err = 0;
931
932
if (fs->ref_count == 0) {
933
if (fs->mdev->media_bay &&
934
check_media_bay(fs->mdev->media_bay) != MB_FD)
935
return -ENXIO;
936
out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2);
937
out_8(&sw->control_bic, 0xff);
938
out_8(&sw->mode, 0x95);
939
udelay(10);
940
out_8(&sw->intr_enable, 0);
941
out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE);
942
swim3_action(fs, MOTOR_ON);
943
fs->write_prot = -1;
944
fs->cur_cyl = -1;
945
for (n = 0; n < 2 * HZ; ++n) {
946
if (n >= HZ/30 && swim3_readbit(fs, SEEK_COMPLETE))
947
break;
948
if (signal_pending(current)) {
949
err = -EINTR;
950
break;
951
}
952
swim3_select(fs, RELAX);
953
schedule_timeout_interruptible(1);
954
}
955
if (err == 0 && (swim3_readbit(fs, SEEK_COMPLETE) == 0
956
|| swim3_readbit(fs, DISK_IN) == 0))
957
err = -ENXIO;
958
swim3_action(fs, SETMFM);
959
swim3_select(fs, RELAX);
960
961
} else if (fs->ref_count == -1 || mode & BLK_OPEN_EXCL)
962
return -EBUSY;
963
964
if (err == 0 && !(mode & BLK_OPEN_NDELAY) &&
965
(mode & (BLK_OPEN_READ | BLK_OPEN_WRITE))) {
966
if (disk_check_media_change(disk))
967
floppy_revalidate(disk);
968
if (fs->ejected)
969
err = -ENXIO;
970
}
971
972
if (err == 0 && (mode & BLK_OPEN_WRITE)) {
973
if (fs->write_prot < 0)
974
fs->write_prot = swim3_readbit(fs, WRITE_PROT);
975
if (fs->write_prot)
976
err = -EROFS;
977
}
978
979
if (err) {
980
if (fs->ref_count == 0) {
981
swim3_action(fs, MOTOR_OFF);
982
out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE);
983
swim3_select(fs, RELAX);
984
}
985
return err;
986
}
987
988
if (mode & BLK_OPEN_EXCL)
989
fs->ref_count = -1;
990
else
991
++fs->ref_count;
992
993
return 0;
994
}
995
996
static int floppy_unlocked_open(struct gendisk *disk, blk_mode_t mode)
997
{
998
int ret;
999
1000
mutex_lock(&swim3_mutex);
1001
ret = floppy_open(disk, mode);
1002
mutex_unlock(&swim3_mutex);
1003
1004
return ret;
1005
}
1006
1007
static void floppy_release(struct gendisk *disk)
1008
{
1009
struct floppy_state *fs = disk->private_data;
1010
struct swim3 __iomem *sw = fs->swim3;
1011
1012
mutex_lock(&swim3_mutex);
1013
if (fs->ref_count > 0)
1014
--fs->ref_count;
1015
else if (fs->ref_count == -1)
1016
fs->ref_count = 0;
1017
if (fs->ref_count == 0) {
1018
swim3_action(fs, MOTOR_OFF);
1019
out_8(&sw->control_bic, 0xff);
1020
swim3_select(fs, RELAX);
1021
}
1022
mutex_unlock(&swim3_mutex);
1023
}
1024
1025
static unsigned int floppy_check_events(struct gendisk *disk,
1026
unsigned int clearing)
1027
{
1028
struct floppy_state *fs = disk->private_data;
1029
return fs->ejected ? DISK_EVENT_MEDIA_CHANGE : 0;
1030
}
1031
1032
static int floppy_revalidate(struct gendisk *disk)
1033
{
1034
struct floppy_state *fs = disk->private_data;
1035
struct swim3 __iomem *sw;
1036
int ret, n;
1037
1038
if (fs->mdev->media_bay &&
1039
check_media_bay(fs->mdev->media_bay) != MB_FD)
1040
return -ENXIO;
1041
1042
sw = fs->swim3;
1043
grab_drive(fs, revalidating, 0);
1044
out_8(&sw->intr_enable, 0);
1045
out_8(&sw->control_bis, DRIVE_ENABLE);
1046
swim3_action(fs, MOTOR_ON); /* necessary? */
1047
fs->write_prot = -1;
1048
fs->cur_cyl = -1;
1049
mdelay(1);
1050
for (n = HZ; n > 0; --n) {
1051
if (swim3_readbit(fs, SEEK_COMPLETE))
1052
break;
1053
if (signal_pending(current))
1054
break;
1055
swim3_select(fs, RELAX);
1056
schedule_timeout_interruptible(1);
1057
}
1058
ret = swim3_readbit(fs, SEEK_COMPLETE) == 0
1059
|| swim3_readbit(fs, DISK_IN) == 0;
1060
if (ret)
1061
swim3_action(fs, MOTOR_OFF);
1062
else {
1063
fs->ejected = 0;
1064
swim3_action(fs, SETMFM);
1065
}
1066
swim3_select(fs, RELAX);
1067
1068
release_drive(fs);
1069
return ret;
1070
}
1071
1072
static const struct block_device_operations floppy_fops = {
1073
.open = floppy_unlocked_open,
1074
.release = floppy_release,
1075
.ioctl = floppy_ioctl,
1076
.check_events = floppy_check_events,
1077
};
1078
1079
static const struct blk_mq_ops swim3_mq_ops = {
1080
.queue_rq = swim3_queue_rq,
1081
};
1082
1083
static void swim3_mb_event(struct macio_dev* mdev, int mb_state)
1084
{
1085
struct floppy_state *fs = macio_get_drvdata(mdev);
1086
struct swim3 __iomem *sw;
1087
1088
if (!fs)
1089
return;
1090
1091
sw = fs->swim3;
1092
1093
if (mb_state != MB_FD)
1094
return;
1095
1096
/* Clear state */
1097
out_8(&sw->intr_enable, 0);
1098
in_8(&sw->intr);
1099
in_8(&sw->error);
1100
}
1101
1102
static int swim3_add_device(struct macio_dev *mdev, int index)
1103
{
1104
struct device_node *swim = mdev->ofdev.dev.of_node;
1105
struct floppy_state *fs = &floppy_states[index];
1106
int rc = -EBUSY;
1107
1108
fs->mdev = mdev;
1109
fs->index = index;
1110
1111
/* Check & Request resources */
1112
if (macio_resource_count(mdev) < 2) {
1113
swim3_err("%s", "No address in device-tree\n");
1114
return -ENXIO;
1115
}
1116
if (macio_irq_count(mdev) < 1) {
1117
swim3_err("%s", "No interrupt in device-tree\n");
1118
return -ENXIO;
1119
}
1120
if (macio_request_resource(mdev, 0, "swim3 (mmio)")) {
1121
swim3_err("%s", "Can't request mmio resource\n");
1122
return -EBUSY;
1123
}
1124
if (macio_request_resource(mdev, 1, "swim3 (dma)")) {
1125
swim3_err("%s", "Can't request dma resource\n");
1126
macio_release_resource(mdev, 0);
1127
return -EBUSY;
1128
}
1129
dev_set_drvdata(&mdev->ofdev.dev, fs);
1130
1131
if (mdev->media_bay == NULL)
1132
pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 1);
1133
1134
fs->state = idle;
1135
fs->swim3 = (struct swim3 __iomem *)
1136
ioremap(macio_resource_start(mdev, 0), 0x200);
1137
if (fs->swim3 == NULL) {
1138
swim3_err("%s", "Couldn't map mmio registers\n");
1139
rc = -ENOMEM;
1140
goto out_release;
1141
}
1142
fs->dma = (struct dbdma_regs __iomem *)
1143
ioremap(macio_resource_start(mdev, 1), 0x200);
1144
if (fs->dma == NULL) {
1145
swim3_err("%s", "Couldn't map dma registers\n");
1146
iounmap(fs->swim3);
1147
rc = -ENOMEM;
1148
goto out_release;
1149
}
1150
fs->swim3_intr = macio_irq(mdev, 0);
1151
fs->dma_intr = macio_irq(mdev, 1);
1152
fs->cur_cyl = -1;
1153
fs->cur_sector = -1;
1154
fs->secpercyl = 36;
1155
fs->secpertrack = 18;
1156
fs->total_secs = 2880;
1157
init_waitqueue_head(&fs->wait);
1158
1159
fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space);
1160
memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd));
1161
fs->dma_cmd[1].command = cpu_to_le16(DBDMA_STOP);
1162
1163
if (mdev->media_bay == NULL || check_media_bay(mdev->media_bay) == MB_FD)
1164
swim3_mb_event(mdev, MB_FD);
1165
1166
if (request_irq(fs->swim3_intr, swim3_interrupt, 0, "SWIM3", fs)) {
1167
swim3_err("%s", "Couldn't request interrupt\n");
1168
pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0);
1169
goto out_unmap;
1170
}
1171
1172
timer_setup(&fs->timeout, NULL, 0);
1173
1174
swim3_info("SWIM3 floppy controller %s\n",
1175
mdev->media_bay ? "in media bay" : "");
1176
1177
return 0;
1178
1179
out_unmap:
1180
iounmap(fs->dma);
1181
iounmap(fs->swim3);
1182
1183
out_release:
1184
macio_release_resource(mdev, 0);
1185
macio_release_resource(mdev, 1);
1186
1187
return rc;
1188
}
1189
1190
static int swim3_attach(struct macio_dev *mdev,
1191
const struct of_device_id *match)
1192
{
1193
struct queue_limits lim = {
1194
.features = BLK_FEAT_ROTATIONAL,
1195
};
1196
struct floppy_state *fs;
1197
struct gendisk *disk;
1198
int rc;
1199
1200
if (floppy_count >= MAX_FLOPPIES)
1201
return -ENXIO;
1202
1203
if (floppy_count == 0) {
1204
rc = register_blkdev(FLOPPY_MAJOR, "fd");
1205
if (rc)
1206
return rc;
1207
}
1208
1209
fs = &floppy_states[floppy_count];
1210
memset(fs, 0, sizeof(*fs));
1211
1212
rc = blk_mq_alloc_sq_tag_set(&fs->tag_set, &swim3_mq_ops, 2, 0);
1213
if (rc)
1214
goto out_unregister;
1215
1216
disk = blk_mq_alloc_disk(&fs->tag_set, &lim, fs);
1217
if (IS_ERR(disk)) {
1218
rc = PTR_ERR(disk);
1219
goto out_free_tag_set;
1220
}
1221
1222
rc = swim3_add_device(mdev, floppy_count);
1223
if (rc)
1224
goto out_cleanup_disk;
1225
1226
disk->major = FLOPPY_MAJOR;
1227
disk->first_minor = floppy_count;
1228
disk->minors = 1;
1229
disk->fops = &floppy_fops;
1230
disk->private_data = fs;
1231
disk->events = DISK_EVENT_MEDIA_CHANGE;
1232
disk->flags |= GENHD_FL_REMOVABLE | GENHD_FL_NO_PART;
1233
sprintf(disk->disk_name, "fd%d", floppy_count);
1234
set_capacity(disk, 2880);
1235
rc = add_disk(disk);
1236
if (rc)
1237
goto out_cleanup_disk;
1238
1239
disks[floppy_count++] = disk;
1240
return 0;
1241
1242
out_cleanup_disk:
1243
put_disk(disk);
1244
out_free_tag_set:
1245
blk_mq_free_tag_set(&fs->tag_set);
1246
out_unregister:
1247
if (floppy_count == 0)
1248
unregister_blkdev(FLOPPY_MAJOR, "fd");
1249
return rc;
1250
}
1251
1252
static const struct of_device_id swim3_match[] =
1253
{
1254
{
1255
.name = "swim3",
1256
},
1257
{
1258
.compatible = "ohare-swim3"
1259
},
1260
{
1261
.compatible = "swim3"
1262
},
1263
{ /* end of list */ }
1264
};
1265
1266
static struct macio_driver swim3_driver =
1267
{
1268
.driver = {
1269
.name = "swim3",
1270
.of_match_table = swim3_match,
1271
},
1272
.probe = swim3_attach,
1273
#ifdef CONFIG_PMAC_MEDIABAY
1274
.mediabay_event = swim3_mb_event,
1275
#endif
1276
#if 0
1277
.suspend = swim3_suspend,
1278
.resume = swim3_resume,
1279
#endif
1280
};
1281
1282
1283
static int swim3_init(void)
1284
{
1285
macio_register_driver(&swim3_driver);
1286
return 0;
1287
}
1288
1289
module_init(swim3_init)
1290
1291
MODULE_LICENSE("GPL");
1292
MODULE_AUTHOR("Paul Mackerras");
1293
MODULE_ALIAS_BLOCKDEV_MAJOR(FLOPPY_MAJOR);
1294
1295