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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/drivers/clk/bcm/clk-bcm2711-dvp.c
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// SPDX-License-Identifier: GPL-2.0-or-later

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// Copyright 2020 Cerno

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#include <linux/clk-provider.h>

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#include <linux/module.h>

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#include <linux/platform_device.h>

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#include <linux/reset-controller.h>

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#include <linux/reset/reset-simple.h>

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#define DVP_HT_RPI_SW_INIT	0x04

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#define DVP_HT_RPI_MISC_CONFIG	0x08

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#define NR_CLOCKS	2

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#define NR_RESETS	6

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struct clk_dvp {

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	struct clk_hw_onecell_data	*data;

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	struct reset_simple_data	reset;

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};

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static const struct clk_parent_data clk_dvp_parent = {

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	.index	= 0,

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};

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static int clk_dvp_probe(struct platform_device *pdev)

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{

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	struct clk_hw_onecell_data *data;

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	struct clk_dvp *dvp;

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	void __iomem *base;

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	int ret;

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	dvp = devm_kzalloc(&pdev->dev, sizeof(*dvp), GFP_KERNEL);

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	if (!dvp)

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		return -ENOMEM;

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	platform_set_drvdata(pdev, dvp);

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	dvp->data = devm_kzalloc(&pdev->dev,

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				 struct_size(dvp->data, hws, NR_CLOCKS),

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				 GFP_KERNEL);

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	if (!dvp->data)

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		return -ENOMEM;

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	data = dvp->data;

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	base = devm_platform_ioremap_resource(pdev, 0);

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	if (IS_ERR(base))

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		return PTR_ERR(base);

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	dvp->reset.rcdev.owner = THIS_MODULE;

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	dvp->reset.rcdev.nr_resets = NR_RESETS;

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	dvp->reset.rcdev.ops = &reset_simple_ops;

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	dvp->reset.rcdev.of_node = pdev->dev.of_node;

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	dvp->reset.membase = base + DVP_HT_RPI_SW_INIT;

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	spin_lock_init(&dvp->reset.lock);

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	ret = devm_reset_controller_register(&pdev->dev, &dvp->reset.rcdev);

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	if (ret)

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		return ret;

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	data->num = NR_CLOCKS;

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	data->hws[0] = clk_hw_register_gate_parent_data(&pdev->dev,

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							"hdmi0-108MHz",

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							&clk_dvp_parent, 0,

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							base + DVP_HT_RPI_MISC_CONFIG, 3,

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							CLK_GATE_SET_TO_DISABLE,

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							&dvp->reset.lock);

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	if (IS_ERR(data->hws[0]))

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		return PTR_ERR(data->hws[0]);

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	data->hws[1] = clk_hw_register_gate_parent_data(&pdev->dev,

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							"hdmi1-108MHz",

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							&clk_dvp_parent, 0,

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							base + DVP_HT_RPI_MISC_CONFIG, 4,

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							CLK_GATE_SET_TO_DISABLE,

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							&dvp->reset.lock);

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	if (IS_ERR(data->hws[1])) {

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		ret = PTR_ERR(data->hws[1]);

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		goto unregister_clk0;

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	}

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	ret = of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_onecell_get,

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				     data);

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	if (ret)

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		goto unregister_clk1;

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	return 0;

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unregister_clk1:

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	clk_hw_unregister_gate(data->hws[1]);

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unregister_clk0:

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	clk_hw_unregister_gate(data->hws[0]);

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	return ret;

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};

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static void clk_dvp_remove(struct platform_device *pdev)

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{

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	struct clk_dvp *dvp = platform_get_drvdata(pdev);

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	struct clk_hw_onecell_data *data = dvp->data;

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	clk_hw_unregister_gate(data->hws[1]);

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	clk_hw_unregister_gate(data->hws[0]);

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}

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static const struct of_device_id clk_dvp_dt_ids[] = {

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	{ .compatible = "brcm,brcm2711-dvp", },

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	{ /* sentinel */ }

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};

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MODULE_DEVICE_TABLE(of, clk_dvp_dt_ids);

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static struct platform_driver clk_dvp_driver = {

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	.probe	= clk_dvp_probe,

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	.remove = clk_dvp_remove,

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	.driver	= {

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		.name		= "brcm2711-dvp",

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		.of_match_table	= clk_dvp_dt_ids,

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	},

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};

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module_platform_driver(clk_dvp_driver);

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MODULE_AUTHOR("Maxime Ripard <[email protected]>");

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MODULE_DESCRIPTION("BCM2711 DVP clock driver");

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MODULE_LICENSE("GPL");

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