/* SPDX-License-Identifier: GPL-2.0 */1/* Copyright (C) 2012-2019 ARM Limited (or its affiliates). */23#ifndef __CC_SRAM_MGR_H__4#define __CC_SRAM_MGR_H__56#ifndef CC_CC_SRAM_SIZE7#define CC_CC_SRAM_SIZE 40968#endif910struct cc_drvdata;1112#define NULL_SRAM_ADDR ((u32)-1)1314/**15* cc_sram_mgr_init() - Initializes SRAM pool.16* The first X bytes of SRAM are reserved for ROM usage, hence, pool17* starts right after X bytes.18*19* @drvdata: Associated device driver context20*21* Return:22* Zero for success, negative value otherwise.23*/24int cc_sram_mgr_init(struct cc_drvdata *drvdata);2526/**27* cc_sram_alloc() - Allocate buffer from SRAM pool.28*29* @drvdata: Associated device driver context30* @size: The requested bytes to allocate31*32* Return:33* Address offset in SRAM or NULL_SRAM_ADDR for failure.34*/35u32 cc_sram_alloc(struct cc_drvdata *drvdata, u32 size);3637/**38* cc_set_sram_desc() - Create const descriptors sequence to39* set values in given array into SRAM.40* Note: each const value can't exceed word size.41*42* @src: A pointer to array of words to set as consts.43* @dst: The target SRAM buffer to set into44* @nelement: The number of words in "src" array45* @seq: A pointer to the given IN/OUT descriptor sequence46* @seq_len: A pointer to the given IN/OUT sequence length47*/48void cc_set_sram_desc(const u32 *src, u32 dst, unsigned int nelement,49struct cc_hw_desc *seq, unsigned int *seq_len);5051#endif /*__CC_SRAM_MGR_H__*/525354