Path: blob/master/drivers/crypto/inside-secure/eip93/eip93-main.h
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/* SPDX-License-Identifier: GPL-2.01*2* Copyright (C) 2019 - 20213*4* Richard van Schagen <[email protected]>5* Christian Marangi <[email protected]6*/7#ifndef _EIP93_MAIN_H_8#define _EIP93_MAIN_H_910#include <crypto/internal/aead.h>11#include <crypto/internal/hash.h>12#include <crypto/internal/skcipher.h>13#include <linux/bitfield.h>14#include <linux/interrupt.h>1516#define EIP93_RING_BUSY_DELAY 5001718#define EIP93_RING_NUM 51219#define EIP93_RING_BUSY 3220#define EIP93_CRA_PRIORITY 15002122#define EIP93_RING_SA_STATE_ADDR(base, idx) ((base) + (idx))23#define EIP93_RING_SA_STATE_DMA(dma_base, idx) ((u32 __force)(dma_base) + \24((idx) * sizeof(struct sa_state)))2526/* cipher algorithms */27#define EIP93_ALG_DES BIT(0)28#define EIP93_ALG_3DES BIT(1)29#define EIP93_ALG_AES BIT(2)30#define EIP93_ALG_MASK GENMASK(2, 0)31/* hash and hmac algorithms */32#define EIP93_HASH_MD5 BIT(3)33#define EIP93_HASH_SHA1 BIT(4)34#define EIP93_HASH_SHA224 BIT(5)35#define EIP93_HASH_SHA256 BIT(6)36#define EIP93_HASH_HMAC BIT(7)37#define EIP93_HASH_MASK GENMASK(6, 3)38/* cipher modes */39#define EIP93_MODE_CBC BIT(8)40#define EIP93_MODE_ECB BIT(9)41#define EIP93_MODE_CTR BIT(10)42#define EIP93_MODE_RFC3686 BIT(11)43#define EIP93_MODE_MASK GENMASK(10, 8)4445/* cipher encryption/decryption operations */46#define EIP93_ENCRYPT BIT(12)47#define EIP93_DECRYPT BIT(13)4849#define EIP93_BUSY BIT(14)5051/* descriptor flags */52#define EIP93_DESC_DMA_IV BIT(0)53#define EIP93_DESC_IPSEC BIT(1)54#define EIP93_DESC_FINISH BIT(2)55#define EIP93_DESC_LAST BIT(3)56#define EIP93_DESC_FAKE_HMAC BIT(4)57#define EIP93_DESC_PRNG BIT(5)58#define EIP93_DESC_HASH BIT(6)59#define EIP93_DESC_AEAD BIT(7)60#define EIP93_DESC_SKCIPHER BIT(8)61#define EIP93_DESC_ASYNC BIT(9)6263#define IS_DMA_IV(desc_flags) ((desc_flags) & EIP93_DESC_DMA_IV)6465#define IS_DES(flags) ((flags) & EIP93_ALG_DES)66#define IS_3DES(flags) ((flags) & EIP93_ALG_3DES)67#define IS_AES(flags) ((flags) & EIP93_ALG_AES)6869#define IS_HASH_MD5(flags) ((flags) & EIP93_HASH_MD5)70#define IS_HASH_SHA1(flags) ((flags) & EIP93_HASH_SHA1)71#define IS_HASH_SHA224(flags) ((flags) & EIP93_HASH_SHA224)72#define IS_HASH_SHA256(flags) ((flags) & EIP93_HASH_SHA256)73#define IS_HMAC(flags) ((flags) & EIP93_HASH_HMAC)7475#define IS_CBC(mode) ((mode) & EIP93_MODE_CBC)76#define IS_ECB(mode) ((mode) & EIP93_MODE_ECB)77#define IS_CTR(mode) ((mode) & EIP93_MODE_CTR)78#define IS_RFC3686(mode) ((mode) & EIP93_MODE_RFC3686)7980#define IS_BUSY(flags) ((flags) & EIP93_BUSY)8182#define IS_ENCRYPT(dir) ((dir) & EIP93_ENCRYPT)83#define IS_DECRYPT(dir) ((dir) & EIP93_DECRYPT)8485#define IS_CIPHER(flags) ((flags) & (EIP93_ALG_DES | \86EIP93_ALG_3DES | \87EIP93_ALG_AES))8889#define IS_HASH(flags) ((flags) & (EIP93_HASH_MD5 | \90EIP93_HASH_SHA1 | \91EIP93_HASH_SHA224 | \92EIP93_HASH_SHA256))9394/**95* struct eip93_device - crypto engine device structure96*/97struct eip93_device {98void __iomem *base;99struct device *dev;100struct clk *clk;101int irq;102struct eip93_ring *ring;103};104105struct eip93_desc_ring {106void *base;107void *base_end;108dma_addr_t base_dma;109/* write and read pointers */110void *read;111void *write;112/* descriptor element offset */113u32 offset;114};115116struct eip93_state_pool {117void *base;118dma_addr_t base_dma;119};120121struct eip93_ring {122struct tasklet_struct done_task;123/* command/result rings */124struct eip93_desc_ring cdr;125struct eip93_desc_ring rdr;126spinlock_t write_lock;127spinlock_t read_lock;128/* aync idr */129spinlock_t idr_lock;130struct idr crypto_async_idr;131};132133enum eip93_alg_type {134EIP93_ALG_TYPE_AEAD,135EIP93_ALG_TYPE_SKCIPHER,136EIP93_ALG_TYPE_HASH,137};138139struct eip93_alg_template {140struct eip93_device *eip93;141enum eip93_alg_type type;142u32 flags;143union {144struct aead_alg aead;145struct skcipher_alg skcipher;146struct ahash_alg ahash;147} alg;148};149150#endif /* _EIP93_MAIN_H_ */151152153