Path: blob/master/drivers/crypto/marvell/octeontx2/otx2_cptpf.h
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/* SPDX-License-Identifier: GPL-2.0-only1* Copyright (C) 2020 Marvell.2*/34#ifndef __OTX2_CPTPF_H5#define __OTX2_CPTPF_H67#include "otx2_cpt_common.h"8#include "otx2_cptpf_ucode.h"9#include "otx2_cptlf.h"1011struct otx2_cptpf_dev;12struct otx2_cptvf_info {13struct otx2_cptpf_dev *cptpf; /* PF pointer this VF belongs to */14struct work_struct vfpf_mbox_work;15struct pci_dev *vf_dev;16int vf_id;17int intr_idx;18};1920struct cptpf_flr_work {21struct work_struct work;22struct otx2_cptpf_dev *pf;23};2425struct otx2_cptpf_dev {26void __iomem *reg_base; /* CPT PF registers start address */27void __iomem *afpf_mbox_base; /* PF-AF mbox start address */28void __iomem *vfpf_mbox_base; /* VF-PF mbox start address */29struct pci_dev *pdev; /* PCI device handle */30struct otx2_cptvf_info vf[OTX2_CPT_MAX_VFS_NUM];31struct otx2_cpt_eng_grps eng_grps;/* Engine groups information */32struct otx2_cptlfs_info lfs; /* CPT LFs attached to this PF */33struct otx2_cptlfs_info cpt1_lfs; /* CPT1 LFs attached to this PF */34/* HW capabilities for each engine type */35union otx2_cpt_eng_caps eng_caps[OTX2_CPT_MAX_ENG_TYPES];36bool is_eng_caps_discovered;3738/* AF <=> PF mbox */39struct otx2_mbox afpf_mbox;40struct work_struct afpf_mbox_work;41struct workqueue_struct *afpf_mbox_wq;4243struct otx2_mbox afpf_mbox_up;44struct work_struct afpf_mbox_up_work;4546/* VF <=> PF mbox */47struct otx2_mbox vfpf_mbox;48struct workqueue_struct *vfpf_mbox_wq;4950struct workqueue_struct *flr_wq;51struct cptpf_flr_work *flr_work;52struct mutex lock; /* serialize mailbox access */5354unsigned long cap_flag;55u8 pf_id; /* RVU PF number */56u8 max_vfs; /* Maximum number of VFs supported by CPT */57u8 enabled_vfs; /* Number of enabled VFs */58u8 sso_pf_func_ovrd; /* SSO PF_FUNC override bit */59u8 kvf_limits; /* Kernel crypto limits */60bool has_cpt1;61u8 rsrc_req_blkaddr;6263/* Devlink */64struct devlink *dl;65};6667irqreturn_t otx2_cptpf_afpf_mbox_intr(int irq, void *arg);68void otx2_cptpf_afpf_mbox_handler(struct work_struct *work);69void otx2_cptpf_afpf_mbox_up_handler(struct work_struct *work);70irqreturn_t otx2_cptpf_vfpf_mbox_intr(int irq, void *arg);71void otx2_cptpf_vfpf_mbox_handler(struct work_struct *work);7273int otx2_inline_cptlf_setup(struct otx2_cptpf_dev *cptpf,74struct otx2_cptlfs_info *lfs, u8 egrp, int num_lfs);75void otx2_inline_cptlf_cleanup(struct otx2_cptlfs_info *lfs);7677#endif /* __OTX2_CPTPF_H */787980