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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/drivers/crypto/nx/nx-aes-ecb.c
26282 views
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* AES ECB routines supporting the Power 7+ Nest Accelerators driver
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*
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* Copyright (C) 2011-2012 International Business Machines Inc.
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*
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* Author: Kent Yoder <[email protected]>
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*/
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#include <crypto/aes.h>
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#include <crypto/internal/skcipher.h>
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#include <linux/err.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/spinlock.h>
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#include <linux/string.h>
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#include <asm/vio.h>
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#include "nx_csbcpb.h"
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#include "nx.h"
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static int ecb_aes_nx_set_key(struct crypto_skcipher *tfm,
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const u8 *in_key,
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unsigned int key_len)
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{
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struct nx_crypto_ctx *nx_ctx = crypto_skcipher_ctx(tfm);
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struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx->csbcpb;
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nx_ctx_init(nx_ctx, HCOP_FC_AES);
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switch (key_len) {
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case AES_KEYSIZE_128:
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NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_128);
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nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_128];
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break;
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case AES_KEYSIZE_192:
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NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_192);
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nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_192];
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break;
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case AES_KEYSIZE_256:
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NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_256);
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nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_256];
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break;
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default:
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return -EINVAL;
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}
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csbcpb->cpb.hdr.mode = NX_MODE_AES_ECB;
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memcpy(csbcpb->cpb.aes_ecb.key, in_key, key_len);
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return 0;
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}
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static int ecb_aes_nx_crypt(struct skcipher_request *req,
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int enc)
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{
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struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
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struct nx_crypto_ctx *nx_ctx = crypto_skcipher_ctx(tfm);
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struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
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unsigned long irq_flags;
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unsigned int processed = 0, to_process;
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int rc;
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spin_lock_irqsave(&nx_ctx->lock, irq_flags);
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if (enc)
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NX_CPB_FDM(csbcpb) |= NX_FDM_ENDE_ENCRYPT;
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else
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NX_CPB_FDM(csbcpb) &= ~NX_FDM_ENDE_ENCRYPT;
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do {
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to_process = req->cryptlen - processed;
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rc = nx_build_sg_lists(nx_ctx, NULL, req->dst, req->src,
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&to_process, processed, NULL);
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if (rc)
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goto out;
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if (!nx_ctx->op.inlen || !nx_ctx->op.outlen) {
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rc = -EINVAL;
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goto out;
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}
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rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
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req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP);
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if (rc)
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goto out;
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atomic_inc(&(nx_ctx->stats->aes_ops));
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atomic64_add(be32_to_cpu(csbcpb->csb.processed_byte_count),
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&(nx_ctx->stats->aes_bytes));
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processed += to_process;
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} while (processed < req->cryptlen);
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out:
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spin_unlock_irqrestore(&nx_ctx->lock, irq_flags);
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return rc;
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}
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static int ecb_aes_nx_encrypt(struct skcipher_request *req)
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{
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return ecb_aes_nx_crypt(req, 1);
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}
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static int ecb_aes_nx_decrypt(struct skcipher_request *req)
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{
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return ecb_aes_nx_crypt(req, 0);
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}
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struct skcipher_alg nx_ecb_aes_alg = {
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.base.cra_name = "ecb(aes)",
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.base.cra_driver_name = "ecb-aes-nx",
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.base.cra_priority = 300,
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.base.cra_blocksize = AES_BLOCK_SIZE,
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.base.cra_alignmask = 0xf,
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.base.cra_ctxsize = sizeof(struct nx_crypto_ctx),
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.base.cra_module = THIS_MODULE,
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.init = nx_crypto_ctx_aes_ecb_init,
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.exit = nx_crypto_ctx_skcipher_exit,
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.min_keysize = AES_MIN_KEY_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE,
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.setkey = ecb_aes_nx_set_key,
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.encrypt = ecb_aes_nx_encrypt,
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.decrypt = ecb_aes_nx_decrypt,
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};
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