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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/drivers/crypto/qcom-rng.c
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (c) 2017-18 Linaro Limited
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//
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// Based on msm-rng.c and downstream driver
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#include <crypto/internal/rng.h>
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#include <linux/acpi.h>
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#include <linux/clk.h>
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#include <linux/crypto.h>
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#include <linux/hw_random.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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/* Device specific register offsets */
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#define PRNG_DATA_OUT 0x0000
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#define PRNG_STATUS 0x0004
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#define PRNG_LFSR_CFG 0x0100
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#define PRNG_CONFIG 0x0104
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/* Device specific register masks and config values */
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#define PRNG_LFSR_CFG_MASK 0x0000ffff
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#define PRNG_LFSR_CFG_CLOCKS 0x0000dddd
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#define PRNG_CONFIG_HW_ENABLE BIT(1)
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#define PRNG_STATUS_DATA_AVAIL BIT(0)
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#define WORD_SZ 4
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#define QCOM_TRNG_QUALITY 1024
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struct qcom_rng {
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struct mutex lock;
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void __iomem *base;
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struct clk *clk;
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struct hwrng hwrng;
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struct qcom_rng_match_data *match_data;
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};
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struct qcom_rng_ctx {
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struct qcom_rng *rng;
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};
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struct qcom_rng_match_data {
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bool skip_init;
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bool hwrng_support;
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};
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static struct qcom_rng *qcom_rng_dev;
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static int qcom_rng_read(struct qcom_rng *rng, u8 *data, unsigned int max)
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{
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unsigned int currsize = 0;
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u32 val;
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int ret;
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/* read random data from hardware */
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do {
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ret = readl_poll_timeout(rng->base + PRNG_STATUS, val,
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val & PRNG_STATUS_DATA_AVAIL,
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200, 10000);
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if (ret)
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return ret;
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val = readl_relaxed(rng->base + PRNG_DATA_OUT);
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if (!val)
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return -EINVAL;
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if ((max - currsize) >= WORD_SZ) {
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memcpy(data, &val, WORD_SZ);
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data += WORD_SZ;
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currsize += WORD_SZ;
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} else {
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/* copy only remaining bytes */
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memcpy(data, &val, max - currsize);
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currsize = max;
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}
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} while (currsize < max);
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return currsize;
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}
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static int qcom_rng_generate(struct crypto_rng *tfm,
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const u8 *src, unsigned int slen,
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u8 *dstn, unsigned int dlen)
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{
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struct qcom_rng_ctx *ctx = crypto_rng_ctx(tfm);
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struct qcom_rng *rng = ctx->rng;
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int ret;
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ret = clk_prepare_enable(rng->clk);
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if (ret)
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return ret;
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mutex_lock(&rng->lock);
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ret = qcom_rng_read(rng, dstn, dlen);
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mutex_unlock(&rng->lock);
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clk_disable_unprepare(rng->clk);
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if (ret >= 0)
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ret = 0;
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return ret;
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}
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static int qcom_rng_seed(struct crypto_rng *tfm, const u8 *seed,
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unsigned int slen)
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{
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return 0;
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}
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static int qcom_hwrng_read(struct hwrng *hwrng, void *data, size_t max, bool wait)
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{
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struct qcom_rng *qrng = container_of(hwrng, struct qcom_rng, hwrng);
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return qcom_rng_read(qrng, data, max);
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}
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static int qcom_rng_enable(struct qcom_rng *rng)
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{
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u32 val;
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int ret;
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ret = clk_prepare_enable(rng->clk);
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if (ret)
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return ret;
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/* Enable PRNG only if it is not already enabled */
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val = readl_relaxed(rng->base + PRNG_CONFIG);
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if (val & PRNG_CONFIG_HW_ENABLE)
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goto already_enabled;
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val = readl_relaxed(rng->base + PRNG_LFSR_CFG);
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val &= ~PRNG_LFSR_CFG_MASK;
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val |= PRNG_LFSR_CFG_CLOCKS;
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writel(val, rng->base + PRNG_LFSR_CFG);
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val = readl_relaxed(rng->base + PRNG_CONFIG);
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val |= PRNG_CONFIG_HW_ENABLE;
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writel(val, rng->base + PRNG_CONFIG);
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already_enabled:
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clk_disable_unprepare(rng->clk);
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return 0;
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}
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static int qcom_rng_init(struct crypto_tfm *tfm)
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{
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struct qcom_rng_ctx *ctx = crypto_tfm_ctx(tfm);
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ctx->rng = qcom_rng_dev;
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if (!ctx->rng->match_data->skip_init)
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return qcom_rng_enable(ctx->rng);
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return 0;
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}
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static struct rng_alg qcom_rng_alg = {
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.generate = qcom_rng_generate,
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.seed = qcom_rng_seed,
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.seedsize = 0,
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.base = {
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.cra_name = "stdrng",
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.cra_driver_name = "qcom-rng",
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.cra_flags = CRYPTO_ALG_TYPE_RNG,
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.cra_priority = 300,
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.cra_ctxsize = sizeof(struct qcom_rng_ctx),
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.cra_module = THIS_MODULE,
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.cra_init = qcom_rng_init,
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}
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};
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static int qcom_rng_probe(struct platform_device *pdev)
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{
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struct qcom_rng *rng;
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int ret;
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rng = devm_kzalloc(&pdev->dev, sizeof(*rng), GFP_KERNEL);
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if (!rng)
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return -ENOMEM;
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platform_set_drvdata(pdev, rng);
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mutex_init(&rng->lock);
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rng->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(rng->base))
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return PTR_ERR(rng->base);
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rng->clk = devm_clk_get_optional(&pdev->dev, "core");
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if (IS_ERR(rng->clk))
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return PTR_ERR(rng->clk);
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rng->match_data = (struct qcom_rng_match_data *)device_get_match_data(&pdev->dev);
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qcom_rng_dev = rng;
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ret = crypto_register_rng(&qcom_rng_alg);
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if (ret) {
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dev_err(&pdev->dev, "Register crypto rng failed: %d\n", ret);
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qcom_rng_dev = NULL;
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return ret;
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}
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if (rng->match_data->hwrng_support) {
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rng->hwrng.name = "qcom_hwrng";
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rng->hwrng.read = qcom_hwrng_read;
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rng->hwrng.quality = QCOM_TRNG_QUALITY;
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ret = devm_hwrng_register(&pdev->dev, &rng->hwrng);
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if (ret) {
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dev_err(&pdev->dev, "Register hwrng failed: %d\n", ret);
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qcom_rng_dev = NULL;
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goto fail;
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}
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}
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return ret;
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fail:
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crypto_unregister_rng(&qcom_rng_alg);
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return ret;
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}
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static void qcom_rng_remove(struct platform_device *pdev)
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{
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crypto_unregister_rng(&qcom_rng_alg);
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qcom_rng_dev = NULL;
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}
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static struct qcom_rng_match_data qcom_prng_match_data = {
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.skip_init = false,
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.hwrng_support = false,
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};
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static struct qcom_rng_match_data qcom_prng_ee_match_data = {
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.skip_init = true,
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.hwrng_support = false,
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};
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static struct qcom_rng_match_data qcom_trng_match_data = {
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.skip_init = true,
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.hwrng_support = true,
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};
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static const struct acpi_device_id __maybe_unused qcom_rng_acpi_match[] = {
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{ .id = "QCOM8160", .driver_data = (kernel_ulong_t)&qcom_prng_ee_match_data },
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{}
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};
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MODULE_DEVICE_TABLE(acpi, qcom_rng_acpi_match);
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static const struct of_device_id __maybe_unused qcom_rng_of_match[] = {
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{ .compatible = "qcom,prng", .data = &qcom_prng_match_data },
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{ .compatible = "qcom,prng-ee", .data = &qcom_prng_ee_match_data },
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{ .compatible = "qcom,trng", .data = &qcom_trng_match_data },
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{}
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};
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MODULE_DEVICE_TABLE(of, qcom_rng_of_match);
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static struct platform_driver qcom_rng_driver = {
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.probe = qcom_rng_probe,
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.remove = qcom_rng_remove,
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.driver = {
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.name = KBUILD_MODNAME,
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.of_match_table = of_match_ptr(qcom_rng_of_match),
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.acpi_match_table = ACPI_PTR(qcom_rng_acpi_match),
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}
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};
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module_platform_driver(qcom_rng_driver);
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MODULE_ALIAS("platform:" KBUILD_MODNAME);
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MODULE_DESCRIPTION("Qualcomm random number generator driver");
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MODULE_LICENSE("GPL v2");
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