// SPDX-License-Identifier: GPL-2.0-only1/*2* Bestcomm ATA task microcode3*4* Copyright (c) 2004 Freescale Semiconductor, Inc.5*6* Created based on bestcom/code_dma/image_rtos1/dma_image.hex7*/89#include <asm/types.h>1011/*12* The header consists of the following fields:13* u32 magic;14* u8 desc_size;15* u8 var_size;16* u8 inc_size;17* u8 first_var;18* u8 reserved[8];19*20* The size fields contain the number of 32-bit words.21*/2223u32 bcom_ata_task[] = {24/* header */250x4243544b,260x0e060709,270x00000000,280x00000000,2930/* Task descriptors */310x8198009b, /* LCD: idx0 = var3; idx0 <= var2; idx0 += inc3 */320x13e00c08, /* DRD1A: var3 = var1; FN=0 MORE init=31 WS=0 RS=0 */330xb8000264, /* LCD: idx1 = *idx0, idx2 = var0; idx1 < var9; idx1 += inc4, idx2 += inc4 */340x10000f00, /* DRD1A: var3 = idx0; FN=0 MORE init=0 WS=0 RS=0 */350x60140002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT init=0 WS=2 RS=2 */360x0c8cfc8a, /* DRD2B1: *idx2 = EU3(); EU3(*idx2,var10) */370xd8988240, /* LCDEXT: idx1 = idx1; idx1 > var9; idx1 += inc0 */380xf845e011, /* LCDEXT: idx2 = *(idx0 + var00000015); ; idx2 += inc2 */390xb845e00a, /* LCD: idx3 = *(idx0 + var00000019); ; idx3 += inc1 */400x0bfecf90, /* DRD1A: *idx3 = *idx2; FN=0 TFD init=31 WS=3 RS=3 */410x9898802d, /* LCD: idx1 = idx1; idx1 once var0; idx1 += inc5 */420x64000005, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=5 INT EXT init=0 WS=0 RS=0 */430x0c0cf849, /* DRD2B1: *idx0 = EU3(); EU3(idx1,var9) */440x000001f8, /* NOP */4546/* VAR[9]-VAR[14] */470x40000000,480x7fff7fff,490x00000000,500x00000000,510x00000000,520x00000000,5354/* INC[0]-INC[6] */550x40000000,560xe0000000,570xe0000000,580xa000000c,590x20000000,600x00000000,610x00000000,62};63646566