Path: blob/master/drivers/dma/bestcomm/bcom_gen_bd_rx_task.c
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// SPDX-License-Identifier: GPL-2.0-only1/*2* Bestcomm GenBD RX task microcode3*4* Copyright (C) 2006 AppSpec Computer Technologies Corp.5* Jeff Gibbons <[email protected]>6* Copyright (c) 2004 Freescale Semiconductor, Inc.7*8* Based on BestCommAPI-2.2/code_dma/image_rtos1/dma_image.hex9* on Tue Mar 4 10:14:12 2006 GMT10*/1112#include <asm/types.h>1314/*15* The header consists of the following fields:16* u32 magic;17* u8 desc_size;18* u8 var_size;19* u8 inc_size;20* u8 first_var;21* u8 reserved[8];22*23* The size fields contain the number of 32-bit words.24*/2526u32 bcom_gen_bd_rx_task[] = {27/* header */280x4243544b,290x0d020409,300x00000000,310x00000000,3233/* Task descriptors */340x808220da, /* LCD: idx0 = var1, idx1 = var4; idx1 <= var3; idx0 += inc3, idx1 += inc2 */350x13e01010, /* DRD1A: var4 = var2; FN=0 MORE init=31 WS=0 RS=0 */360xb880025b, /* LCD: idx2 = *idx1, idx3 = var0; idx2 < var9; idx2 += inc3, idx3 += inc3 */370x10001308, /* DRD1A: var4 = idx1; FN=0 MORE init=0 WS=0 RS=0 */380x60140002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT init=0 WS=2 RS=2 */390x0cccfcca, /* DRD2B1: *idx3 = EU3(); EU3(*idx3,var10) */400xd9190240, /* LCDEXT: idx2 = idx2; idx2 > var9; idx2 += inc0 */410xb8c5e009, /* LCD: idx3 = *(idx1 + var00000015); ; idx3 += inc1 */420x07fecf80, /* DRD1A: *idx3 = *idx0; FN=0 INT init=31 WS=3 RS=3 */430x99190024, /* LCD: idx2 = idx2; idx2 once var0; idx2 += inc4 */440x60000005, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=5 EXT init=0 WS=0 RS=0 */450x0c4cf889, /* DRD2B1: *idx1 = EU3(); EU3(idx2,var9) */460x000001f8, /* NOP */4748/* VAR[9]-VAR[10] */490x40000000,500x7fff7fff,5152/* INC[0]-INC[3] */530x40000000,540xe0000000,550xa0000008,560x20000000,57};58596061