Path: blob/master/drivers/firmware/qcom/qcom_scm-legacy.c
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// SPDX-License-Identifier: GPL-2.0-only1/* Copyright (c) 2010,2015,2019 The Linux Foundation. All rights reserved.2* Copyright (C) 2015 Linaro Ltd.3*/45#include <linux/slab.h>6#include <linux/io.h>7#include <linux/module.h>8#include <linux/mutex.h>9#include <linux/errno.h>10#include <linux/err.h>11#include <linux/firmware/qcom/qcom_scm.h>12#include <linux/arm-smccc.h>13#include <linux/dma-mapping.h>1415#include "qcom_scm.h"1617static DEFINE_MUTEX(qcom_scm_lock);181920/**21* struct arm_smccc_args22* @args: The array of values used in registers in smc instruction23*/24struct arm_smccc_args {25unsigned long args[8];26};272829/**30* struct scm_legacy_command - one SCM command buffer31* @len: total available memory for command and response32* @buf_offset: start of command buffer33* @resp_hdr_offset: start of response buffer34* @id: command to be executed35* @buf: buffer returned from scm_legacy_get_command_buffer()36*37* An SCM command is laid out in memory as follows:38*39* ------------------- <--- struct scm_legacy_command40* | command header |41* ------------------- <--- scm_legacy_get_command_buffer()42* | command buffer |43* ------------------- <--- struct scm_legacy_response and44* | response header | scm_legacy_command_to_response()45* ------------------- <--- scm_legacy_get_response_buffer()46* | response buffer |47* -------------------48*49* There can be arbitrary padding between the headers and buffers so50* you should always use the appropriate scm_legacy_get_*_buffer() routines51* to access the buffers in a safe manner.52*/53struct scm_legacy_command {54__le32 len;55__le32 buf_offset;56__le32 resp_hdr_offset;57__le32 id;58__le32 buf[];59};6061/**62* struct scm_legacy_response - one SCM response buffer63* @len: total available memory for response64* @buf_offset: start of response data relative to start of scm_legacy_response65* @is_complete: indicates if the command has finished processing66*/67struct scm_legacy_response {68__le32 len;69__le32 buf_offset;70__le32 is_complete;71};7273/**74* scm_legacy_command_to_response() - Get a pointer to a scm_legacy_response75* @cmd: command76*77* Returns a pointer to a response for a command.78*/79static inline struct scm_legacy_response *scm_legacy_command_to_response(80const struct scm_legacy_command *cmd)81{82return (void *)cmd + le32_to_cpu(cmd->resp_hdr_offset);83}8485/**86* scm_legacy_get_command_buffer() - Get a pointer to a command buffer87* @cmd: command88*89* Returns a pointer to the command buffer of a command.90*/91static inline void *scm_legacy_get_command_buffer(92const struct scm_legacy_command *cmd)93{94return (void *)cmd->buf;95}9697/**98* scm_legacy_get_response_buffer() - Get a pointer to a response buffer99* @rsp: response100*101* Returns a pointer to a response buffer of a response.102*/103static inline void *scm_legacy_get_response_buffer(104const struct scm_legacy_response *rsp)105{106return (void *)rsp + le32_to_cpu(rsp->buf_offset);107}108109static void __scm_legacy_do(const struct arm_smccc_args *smc,110struct arm_smccc_res *res)111{112do {113arm_smccc_smc(smc->args[0], smc->args[1], smc->args[2],114smc->args[3], smc->args[4], smc->args[5],115smc->args[6], smc->args[7], res);116} while (res->a0 == QCOM_SCM_INTERRUPTED);117}118119/**120* scm_legacy_call() - Sends a command to the SCM and waits for the command to121* finish processing.122* @dev: device123* @desc: descriptor structure containing arguments and return values124* @res: results from SMC call125*126* A note on cache maintenance:127* Note that any buffers that are expected to be accessed by the secure world128* must be flushed before invoking qcom_scm_call and invalidated in the cache129* immediately after qcom_scm_call returns. Cache maintenance on the command130* and response buffers is taken care of by qcom_scm_call; however, callers are131* responsible for any other cached buffers passed over to the secure world.132*/133int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc,134struct qcom_scm_res *res)135{136u8 arglen = desc->arginfo & 0xf;137int ret = 0, context_id;138unsigned int i;139struct scm_legacy_command *cmd;140struct scm_legacy_response *rsp;141struct arm_smccc_args smc = {0};142struct arm_smccc_res smc_res;143const size_t cmd_len = arglen * sizeof(__le32);144const size_t resp_len = MAX_QCOM_SCM_RETS * sizeof(__le32);145size_t alloc_len = sizeof(*cmd) + cmd_len + sizeof(*rsp) + resp_len;146dma_addr_t cmd_phys;147__le32 *arg_buf;148const __le32 *res_buf;149150cmd = kzalloc(PAGE_ALIGN(alloc_len), GFP_KERNEL);151if (!cmd)152return -ENOMEM;153154cmd->len = cpu_to_le32(alloc_len);155cmd->buf_offset = cpu_to_le32(sizeof(*cmd));156cmd->resp_hdr_offset = cpu_to_le32(sizeof(*cmd) + cmd_len);157cmd->id = cpu_to_le32(SCM_LEGACY_FNID(desc->svc, desc->cmd));158159arg_buf = scm_legacy_get_command_buffer(cmd);160for (i = 0; i < arglen; i++)161arg_buf[i] = cpu_to_le32(desc->args[i]);162163rsp = scm_legacy_command_to_response(cmd);164165cmd_phys = dma_map_single(dev, cmd, alloc_len, DMA_TO_DEVICE);166if (dma_mapping_error(dev, cmd_phys)) {167kfree(cmd);168return -ENOMEM;169}170171smc.args[0] = 1;172smc.args[1] = (unsigned long)&context_id;173smc.args[2] = cmd_phys;174175mutex_lock(&qcom_scm_lock);176__scm_legacy_do(&smc, &smc_res);177if (smc_res.a0)178ret = qcom_scm_remap_error(smc_res.a0);179mutex_unlock(&qcom_scm_lock);180if (ret)181goto out;182183do {184dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len,185sizeof(*rsp), DMA_FROM_DEVICE);186} while (!rsp->is_complete);187188dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len +189le32_to_cpu(rsp->buf_offset),190resp_len, DMA_FROM_DEVICE);191192if (res) {193res_buf = scm_legacy_get_response_buffer(rsp);194for (i = 0; i < MAX_QCOM_SCM_RETS; i++)195res->result[i] = le32_to_cpu(res_buf[i]);196}197out:198dma_unmap_single(dev, cmd_phys, alloc_len, DMA_TO_DEVICE);199kfree(cmd);200return ret;201}202203#define SCM_LEGACY_ATOMIC_N_REG_ARGS 5204#define SCM_LEGACY_ATOMIC_FIRST_REG_IDX 2205#define SCM_LEGACY_CLASS_REGISTER (0x2 << 8)206#define SCM_LEGACY_MASK_IRQS BIT(5)207#define SCM_LEGACY_ATOMIC_ID(svc, cmd, n) \208((SCM_LEGACY_FNID(svc, cmd) << 12) | \209SCM_LEGACY_CLASS_REGISTER | \210SCM_LEGACY_MASK_IRQS | \211(n & 0xf))212213/**214* scm_legacy_call_atomic() - Send an atomic SCM command with up to 5 arguments215* and 3 return values216* @unused: device, legacy argument, not used, can be NULL217* @desc: SCM call descriptor containing arguments218* @res: SCM call return values219*220* This shall only be used with commands that are guaranteed to be221* uninterruptable, atomic and SMP safe.222*/223int scm_legacy_call_atomic(struct device *unused,224const struct qcom_scm_desc *desc,225struct qcom_scm_res *res)226{227int context_id;228struct arm_smccc_res smc_res;229size_t arglen = desc->arginfo & 0xf;230231BUG_ON(arglen > SCM_LEGACY_ATOMIC_N_REG_ARGS);232233arm_smccc_smc(SCM_LEGACY_ATOMIC_ID(desc->svc, desc->cmd, arglen),234(unsigned long)&context_id,235desc->args[0], desc->args[1], desc->args[2],236desc->args[3], desc->args[4], 0, &smc_res);237238if (res) {239res->result[0] = smc_res.a1;240res->result[1] = smc_res.a2;241res->result[2] = smc_res.a3;242}243244return smc_res.a0;245}246247248