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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/drivers/firmware/xilinx/zynqmp.c
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1
// SPDX-License-Identifier: GPL-2.0
2
/*
3
* Xilinx Zynq MPSoC Firmware layer
4
*
5
* Copyright (C) 2014-2022 Xilinx, Inc.
6
* Copyright (C) 2022 - 2025 Advanced Micro Devices, Inc.
7
*
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* Michal Simek <[email protected]>
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* Davorin Mista <[email protected]>
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* Jolly Shah <[email protected]>
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* Rajan Vaja <[email protected]>
12
*/
13
14
#include <linux/arm-smccc.h>
15
#include <linux/compiler.h>
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#include <linux/device.h>
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#include <linux/init.h>
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#include <linux/mfd/core.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/pm_domain.h>
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#include <linux/slab.h>
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#include <linux/uaccess.h>
26
#include <linux/hashtable.h>
27
28
#include <linux/firmware/xlnx-zynqmp.h>
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#include <linux/firmware/xlnx-event-manager.h>
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#include "zynqmp-debug.h"
31
32
/* Max HashMap Order for PM API feature check (1<<7 = 128) */
33
#define PM_API_FEATURE_CHECK_MAX_ORDER 7
34
35
/* CRL registers and bitfields */
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#define CRL_APB_BASE 0xFF5E0000U
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/* BOOT_PIN_CTRL- Used to control the mode pins after boot */
38
#define CRL_APB_BOOT_PIN_CTRL (CRL_APB_BASE + (0x250U))
39
/* BOOT_PIN_CTRL_MASK- out_val[11:8], out_en[3:0] */
40
#define CRL_APB_BOOTPIN_CTRL_MASK 0xF0FU
41
42
/* IOCTL/QUERY feature payload size */
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#define FEATURE_PAYLOAD_SIZE 2
44
45
static bool feature_check_enabled;
46
static DEFINE_HASHTABLE(pm_api_features_map, PM_API_FEATURE_CHECK_MAX_ORDER);
47
static u32 ioctl_features[FEATURE_PAYLOAD_SIZE];
48
static u32 query_features[FEATURE_PAYLOAD_SIZE];
49
50
static u32 sip_svc_version;
51
static struct platform_device *em_dev;
52
53
/**
54
* struct zynqmp_devinfo - Structure for Zynqmp device instance
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* @dev: Device Pointer
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* @feature_conf_id: Feature conf id
57
*/
58
struct zynqmp_devinfo {
59
struct device *dev;
60
u32 feature_conf_id;
61
};
62
63
/**
64
* struct pm_api_feature_data - PM API Feature data
65
* @pm_api_id: PM API Id, used as key to index into hashmap
66
* @feature_status: status of PM API feature: valid, invalid
67
* @hentry: hlist_node that hooks this entry into hashtable
68
*/
69
struct pm_api_feature_data {
70
u32 pm_api_id;
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int feature_status;
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struct hlist_node hentry;
73
};
74
75
struct platform_fw_data {
76
/*
77
* Family code for platform.
78
*/
79
const u32 family_code;
80
};
81
82
static struct platform_fw_data *active_platform_fw_data;
83
84
static const struct mfd_cell firmware_devs[] = {
85
{
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.name = "zynqmp_power_controller",
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},
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};
89
90
/**
91
* zynqmp_pm_ret_code() - Convert PMU-FW error codes to Linux error codes
92
* @ret_status: PMUFW return code
93
*
94
* Return: corresponding Linux error code
95
*/
96
static int zynqmp_pm_ret_code(u32 ret_status)
97
{
98
switch (ret_status) {
99
case XST_PM_SUCCESS:
100
case XST_PM_DOUBLE_REQ:
101
return 0;
102
case XST_PM_NO_FEATURE:
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return -ENOTSUPP;
104
case XST_PM_INVALID_VERSION:
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return -EOPNOTSUPP;
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case XST_PM_NO_ACCESS:
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return -EACCES;
108
case XST_PM_ABORT_SUSPEND:
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return -ECANCELED;
110
case XST_PM_MULT_USER:
111
return -EUSERS;
112
case XST_PM_INTERNAL:
113
case XST_PM_CONFLICT:
114
case XST_PM_INVALID_NODE:
115
case XST_PM_INVALID_CRC:
116
default:
117
return -EINVAL;
118
}
119
}
120
121
static noinline int do_fw_call_fail(u32 *ret_payload, u32 num_args, ...)
122
{
123
return -ENODEV;
124
}
125
126
/*
127
* PM function call wrapper
128
* Invoke do_fw_call_smc or do_fw_call_hvc, depending on the configuration
129
*/
130
static int (*do_fw_call)(u32 *ret_payload, u32, ...) = do_fw_call_fail;
131
132
/**
133
* do_fw_call_smc() - Call system-level platform management layer (SMC)
134
* @num_args: Number of variable arguments should be <= 8
135
* @ret_payload: Returned value array
136
*
137
* Invoke platform management function via SMC call (no hypervisor present).
138
*
139
* Return: Returns status, either success or error+reason
140
*/
141
static noinline int do_fw_call_smc(u32 *ret_payload, u32 num_args, ...)
142
{
143
struct arm_smccc_res res;
144
u64 args[8] = {0};
145
va_list arg_list;
146
u8 i;
147
148
if (num_args > 8)
149
return -EINVAL;
150
151
va_start(arg_list, num_args);
152
153
for (i = 0; i < num_args; i++)
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args[i] = va_arg(arg_list, u64);
155
156
va_end(arg_list);
157
158
arm_smccc_smc(args[0], args[1], args[2], args[3], args[4], args[5], args[6], args[7], &res);
159
160
if (ret_payload) {
161
ret_payload[0] = lower_32_bits(res.a0);
162
ret_payload[1] = upper_32_bits(res.a0);
163
ret_payload[2] = lower_32_bits(res.a1);
164
ret_payload[3] = upper_32_bits(res.a1);
165
ret_payload[4] = lower_32_bits(res.a2);
166
ret_payload[5] = upper_32_bits(res.a2);
167
ret_payload[6] = lower_32_bits(res.a3);
168
}
169
170
return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
171
}
172
173
/**
174
* do_fw_call_hvc() - Call system-level platform management layer (HVC)
175
* @num_args: Number of variable arguments should be <= 8
176
* @ret_payload: Returned value array
177
*
178
* Invoke platform management function via HVC
179
* HVC-based for communication through hypervisor
180
* (no direct communication with ATF).
181
*
182
* Return: Returns status, either success or error+reason
183
*/
184
static noinline int do_fw_call_hvc(u32 *ret_payload, u32 num_args, ...)
185
{
186
struct arm_smccc_res res;
187
u64 args[8] = {0};
188
va_list arg_list;
189
u8 i;
190
191
if (num_args > 8)
192
return -EINVAL;
193
194
va_start(arg_list, num_args);
195
196
for (i = 0; i < num_args; i++)
197
args[i] = va_arg(arg_list, u64);
198
199
va_end(arg_list);
200
201
arm_smccc_hvc(args[0], args[1], args[2], args[3], args[4], args[5], args[6], args[7], &res);
202
203
if (ret_payload) {
204
ret_payload[0] = lower_32_bits(res.a0);
205
ret_payload[1] = upper_32_bits(res.a0);
206
ret_payload[2] = lower_32_bits(res.a1);
207
ret_payload[3] = upper_32_bits(res.a1);
208
ret_payload[4] = lower_32_bits(res.a2);
209
ret_payload[5] = upper_32_bits(res.a2);
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ret_payload[6] = lower_32_bits(res.a3);
211
}
212
213
return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
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}
215
216
static int __do_feature_check_call(const u32 api_id, u32 *ret_payload)
217
{
218
int ret;
219
u64 smc_arg[2];
220
u32 module_id;
221
u32 feature_check_api_id;
222
223
module_id = FIELD_GET(MODULE_ID_MASK, api_id);
224
225
/*
226
* Feature check of APIs belonging to PM, XSEM, and TF-A are handled by calling
227
* PM_FEATURE_CHECK API. For other modules, call PM_API_FEATURES API.
228
*/
229
if (module_id == PM_MODULE_ID || module_id == XSEM_MODULE_ID || module_id == TF_A_MODULE_ID)
230
feature_check_api_id = PM_FEATURE_CHECK;
231
else
232
feature_check_api_id = PM_API_FEATURES;
233
234
/*
235
* Feature check of TF-A APIs is done in the TF-A layer and it expects for
236
* MODULE_ID_MASK bits of SMC's arg[0] to be the same as PM_MODULE_ID.
237
*/
238
if (module_id == TF_A_MODULE_ID) {
239
module_id = PM_MODULE_ID;
240
smc_arg[1] = api_id;
241
} else {
242
smc_arg[1] = (api_id & API_ID_MASK);
243
}
244
245
smc_arg[0] = PM_SIP_SVC | FIELD_PREP(MODULE_ID_MASK, module_id) | feature_check_api_id;
246
247
ret = do_fw_call(ret_payload, 2, smc_arg[0], smc_arg[1]);
248
if (ret)
249
ret = -EOPNOTSUPP;
250
else
251
ret = ret_payload[1];
252
253
return ret;
254
}
255
256
static int do_feature_check_call(const u32 api_id)
257
{
258
int ret;
259
u32 ret_payload[PAYLOAD_ARG_CNT];
260
struct pm_api_feature_data *feature_data;
261
262
/* Check for existing entry in hash table for given api */
263
hash_for_each_possible(pm_api_features_map, feature_data, hentry,
264
api_id) {
265
if (feature_data->pm_api_id == api_id)
266
return feature_data->feature_status;
267
}
268
269
/* Add new entry if not present */
270
feature_data = kmalloc(sizeof(*feature_data), GFP_ATOMIC);
271
if (!feature_data)
272
return -ENOMEM;
273
274
feature_data->pm_api_id = api_id;
275
ret = __do_feature_check_call(api_id, ret_payload);
276
277
feature_data->feature_status = ret;
278
hash_add(pm_api_features_map, &feature_data->hentry, api_id);
279
280
if (api_id == PM_IOCTL)
281
/* Store supported IOCTL IDs mask */
282
memcpy(ioctl_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4);
283
else if (api_id == PM_QUERY_DATA)
284
/* Store supported QUERY IDs mask */
285
memcpy(query_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4);
286
287
return ret;
288
}
289
290
/**
291
* zynqmp_pm_feature() - Check whether given feature is supported or not and
292
* store supported IOCTL/QUERY ID mask
293
* @api_id: API ID to check
294
*
295
* Return: Returns status, either success or error+reason
296
*/
297
int zynqmp_pm_feature(const u32 api_id)
298
{
299
int ret;
300
301
if (!feature_check_enabled)
302
return 0;
303
304
ret = do_feature_check_call(api_id);
305
306
return ret;
307
}
308
EXPORT_SYMBOL_GPL(zynqmp_pm_feature);
309
310
/**
311
* zynqmp_pm_is_function_supported() - Check whether given IOCTL/QUERY function
312
* is supported or not
313
* @api_id: PM_IOCTL or PM_QUERY_DATA
314
* @id: IOCTL or QUERY function IDs
315
*
316
* Return: Returns status, either success or error+reason
317
*/
318
int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id)
319
{
320
int ret;
321
u32 *bit_mask;
322
323
/* Input arguments validation */
324
if (id >= 64 || (api_id != PM_IOCTL && api_id != PM_QUERY_DATA))
325
return -EINVAL;
326
327
/* Check feature check API version */
328
ret = do_feature_check_call(PM_FEATURE_CHECK);
329
if (ret < 0)
330
return ret;
331
332
/* Check if feature check version 2 is supported or not */
333
if ((ret & FIRMWARE_VERSION_MASK) == PM_API_VERSION_2) {
334
/*
335
* Call feature check for IOCTL/QUERY API to get IOCTL ID or
336
* QUERY ID feature status.
337
*/
338
ret = do_feature_check_call(api_id);
339
if (ret < 0)
340
return ret;
341
342
bit_mask = (api_id == PM_IOCTL) ? ioctl_features : query_features;
343
344
if ((bit_mask[(id / 32)] & BIT((id % 32))) == 0U)
345
return -EOPNOTSUPP;
346
} else {
347
return -ENODATA;
348
}
349
350
return 0;
351
}
352
EXPORT_SYMBOL_GPL(zynqmp_pm_is_function_supported);
353
354
/**
355
* zynqmp_pm_invoke_fw_fn() - Invoke the system-level platform management layer
356
* caller function depending on the configuration
357
* @pm_api_id: Requested PM-API call
358
* @ret_payload: Returned value array
359
* @num_args: Number of arguments to requested PM-API call
360
*
361
* Invoke platform management function for SMC or HVC call, depending on
362
* configuration.
363
* Following SMC Calling Convention (SMCCC) for SMC64:
364
* Pm Function Identifier,
365
* PM_SIP_SVC + PASS_THROUGH_FW_CMD_ID =
366
* ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT)
367
* ((SMC_64) << FUNCID_CC_SHIFT)
368
* ((SIP_START) << FUNCID_OEN_SHIFT)
369
* (PASS_THROUGH_FW_CMD_ID))
370
*
371
* PM_SIP_SVC - Registered ZynqMP SIP Service Call.
372
* PASS_THROUGH_FW_CMD_ID - Fixed SiP SVC call ID for FW specific calls.
373
*
374
* Return: Returns status, either success or error+reason
375
*/
376
int zynqmp_pm_invoke_fw_fn(u32 pm_api_id, u32 *ret_payload, u32 num_args, ...)
377
{
378
/*
379
* Added SIP service call Function Identifier
380
* Make sure to stay in x0 register
381
*/
382
u64 smc_arg[SMC_ARG_CNT_64];
383
int ret, i;
384
va_list arg_list;
385
u32 args[SMC_ARG_CNT_32] = {0};
386
u32 module_id;
387
388
if (num_args > SMC_ARG_CNT_32)
389
return -EINVAL;
390
391
va_start(arg_list, num_args);
392
393
/* Check if feature is supported or not */
394
ret = zynqmp_pm_feature(pm_api_id);
395
if (ret < 0)
396
return ret;
397
398
for (i = 0; i < num_args; i++)
399
args[i] = va_arg(arg_list, u32);
400
401
va_end(arg_list);
402
403
module_id = FIELD_GET(PLM_MODULE_ID_MASK, pm_api_id);
404
405
if (module_id == 0)
406
module_id = XPM_MODULE_ID;
407
408
smc_arg[0] = PM_SIP_SVC | PASS_THROUGH_FW_CMD_ID;
409
smc_arg[1] = ((u64)args[0] << 32U) | FIELD_PREP(PLM_MODULE_ID_MASK, module_id) |
410
(pm_api_id & API_ID_MASK);
411
for (i = 1; i < (SMC_ARG_CNT_64 - 1); i++)
412
smc_arg[i + 1] = ((u64)args[(i * 2)] << 32U) | args[(i * 2) - 1];
413
414
return do_fw_call(ret_payload, 8, smc_arg[0], smc_arg[1], smc_arg[2], smc_arg[3],
415
smc_arg[4], smc_arg[5], smc_arg[6], smc_arg[7]);
416
}
417
418
/**
419
* zynqmp_pm_invoke_fn() - Invoke the system-level platform management layer
420
* caller function depending on the configuration
421
* @pm_api_id: Requested PM-API call
422
* @ret_payload: Returned value array
423
* @num_args: Number of arguments to requested PM-API call
424
*
425
* Invoke platform management function for SMC or HVC call, depending on
426
* configuration.
427
* Following SMC Calling Convention (SMCCC) for SMC64:
428
* Pm Function Identifier,
429
* PM_SIP_SVC + PM_API_ID =
430
* ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT)
431
* ((SMC_64) << FUNCID_CC_SHIFT)
432
* ((SIP_START) << FUNCID_OEN_SHIFT)
433
* ((PM_API_ID) & FUNCID_NUM_MASK))
434
*
435
* PM_SIP_SVC - Registered ZynqMP SIP Service Call.
436
* PM_API_ID - Platform Management API ID.
437
*
438
* Return: Returns status, either success or error+reason
439
*/
440
int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 *ret_payload, u32 num_args, ...)
441
{
442
/*
443
* Added SIP service call Function Identifier
444
* Make sure to stay in x0 register
445
*/
446
u64 smc_arg[8];
447
int ret, i;
448
va_list arg_list;
449
u32 args[14] = {0};
450
451
if (num_args > 14)
452
return -EINVAL;
453
454
va_start(arg_list, num_args);
455
456
/* Check if feature is supported or not */
457
ret = zynqmp_pm_feature(pm_api_id);
458
if (ret < 0)
459
return ret;
460
461
for (i = 0; i < num_args; i++)
462
args[i] = va_arg(arg_list, u32);
463
464
va_end(arg_list);
465
466
smc_arg[0] = PM_SIP_SVC | pm_api_id;
467
for (i = 0; i < 7; i++)
468
smc_arg[i + 1] = ((u64)args[(i * 2) + 1] << 32) | args[i * 2];
469
470
return do_fw_call(ret_payload, 8, smc_arg[0], smc_arg[1], smc_arg[2], smc_arg[3],
471
smc_arg[4], smc_arg[5], smc_arg[6], smc_arg[7]);
472
}
473
474
static u32 pm_api_version;
475
static u32 pm_tz_version;
476
477
int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset)
478
{
479
int ret;
480
481
ret = zynqmp_pm_invoke_fn(TF_A_PM_REGISTER_SGI, NULL, 2, sgi_num, reset);
482
if (ret != -EOPNOTSUPP && !ret)
483
return ret;
484
485
/* try old implementation as fallback strategy if above fails */
486
return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, IOCTL_REGISTER_SGI, sgi_num, reset);
487
}
488
489
/**
490
* zynqmp_pm_get_api_version() - Get version number of PMU PM firmware
491
* @version: Returned version value
492
*
493
* Return: Returns status, either success or error+reason
494
*/
495
int zynqmp_pm_get_api_version(u32 *version)
496
{
497
u32 ret_payload[PAYLOAD_ARG_CNT];
498
int ret;
499
500
if (!version)
501
return -EINVAL;
502
503
/* Check is PM API version already verified */
504
if (pm_api_version > 0) {
505
*version = pm_api_version;
506
return 0;
507
}
508
ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, ret_payload, 0);
509
*version = ret_payload[1];
510
511
return ret;
512
}
513
EXPORT_SYMBOL_GPL(zynqmp_pm_get_api_version);
514
515
/**
516
* zynqmp_pm_get_chipid - Get silicon ID registers
517
* @idcode: IDCODE register
518
* @version: version register
519
*
520
* Return: Returns the status of the operation and the idcode and version
521
* registers in @idcode and @version.
522
*/
523
int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
524
{
525
u32 ret_payload[PAYLOAD_ARG_CNT];
526
int ret;
527
528
if (!idcode || !version)
529
return -EINVAL;
530
531
ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, ret_payload, 0);
532
*idcode = ret_payload[1];
533
*version = ret_payload[2];
534
535
return ret;
536
}
537
EXPORT_SYMBOL_GPL(zynqmp_pm_get_chipid);
538
539
/**
540
* zynqmp_pm_get_family_info() - Get family info of platform
541
* @family: Returned family code value
542
*
543
* Return: Returns status, either success or error+reason
544
*/
545
int zynqmp_pm_get_family_info(u32 *family)
546
{
547
if (!active_platform_fw_data)
548
return -ENODEV;
549
550
if (!family)
551
return -EINVAL;
552
553
*family = active_platform_fw_data->family_code;
554
555
return 0;
556
}
557
EXPORT_SYMBOL_GPL(zynqmp_pm_get_family_info);
558
559
/**
560
* zynqmp_pm_get_sip_svc_version() - Get SiP service call version
561
* @version: Returned version value
562
*
563
* Return: Returns status, either success or error+reason
564
*/
565
static int zynqmp_pm_get_sip_svc_version(u32 *version)
566
{
567
struct arm_smccc_res res;
568
u64 args[SMC_ARG_CNT_64] = {0};
569
570
if (!version)
571
return -EINVAL;
572
573
/* Check if SiP SVC version already verified */
574
if (sip_svc_version > 0) {
575
*version = sip_svc_version;
576
return 0;
577
}
578
579
args[0] = GET_SIP_SVC_VERSION;
580
581
arm_smccc_smc(args[0], args[1], args[2], args[3], args[4], args[5], args[6], args[7], &res);
582
583
*version = ((lower_32_bits(res.a0) << 16U) | lower_32_bits(res.a1));
584
585
return zynqmp_pm_ret_code(XST_PM_SUCCESS);
586
}
587
588
/**
589
* zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version
590
* @version: Returned version value
591
*
592
* Return: Returns status, either success or error+reason
593
*/
594
static int zynqmp_pm_get_trustzone_version(u32 *version)
595
{
596
u32 ret_payload[PAYLOAD_ARG_CNT];
597
int ret;
598
599
if (!version)
600
return -EINVAL;
601
602
/* Check is PM trustzone version already verified */
603
if (pm_tz_version > 0) {
604
*version = pm_tz_version;
605
return 0;
606
}
607
ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, ret_payload, 0);
608
*version = ret_payload[1];
609
610
return ret;
611
}
612
613
/**
614
* get_set_conduit_method() - Choose SMC or HVC based communication
615
* @np: Pointer to the device_node structure
616
*
617
* Use SMC or HVC-based functions to communicate with EL2/EL3.
618
*
619
* Return: Returns 0 on success or error code
620
*/
621
static int get_set_conduit_method(struct device_node *np)
622
{
623
const char *method;
624
625
if (of_property_read_string(np, "method", &method)) {
626
pr_warn("%s missing \"method\" property\n", __func__);
627
return -ENXIO;
628
}
629
630
if (!strcmp("hvc", method)) {
631
do_fw_call = do_fw_call_hvc;
632
} else if (!strcmp("smc", method)) {
633
do_fw_call = do_fw_call_smc;
634
} else {
635
pr_warn("%s Invalid \"method\" property: %s\n",
636
__func__, method);
637
return -EINVAL;
638
}
639
640
return 0;
641
}
642
643
/**
644
* zynqmp_pm_query_data() - Get query data from firmware
645
* @qdata: Variable to the zynqmp_pm_query_data structure
646
* @out: Returned output value
647
*
648
* Return: Returns status, either success or error+reason
649
*/
650
int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out)
651
{
652
int ret, i = 0;
653
u32 ret_payload[PAYLOAD_ARG_CNT] = {0};
654
655
if (sip_svc_version >= SIP_SVC_PASSTHROUGH_VERSION) {
656
ret = zynqmp_pm_invoke_fw_fn(PM_QUERY_DATA, ret_payload, 4,
657
qdata.qid, qdata.arg1,
658
qdata.arg2, qdata.arg3);
659
/* To support backward compatibility */
660
if (!ret && !ret_payload[0]) {
661
/*
662
* TF-A passes return status on 0th index but
663
* api to get clock name reads data from 0th
664
* index so pass data at 0th index instead of
665
* return status
666
*/
667
if (qdata.qid == PM_QID_CLOCK_GET_NAME ||
668
qdata.qid == PM_QID_PINCTRL_GET_FUNCTION_NAME)
669
i = 1;
670
671
for (; i < PAYLOAD_ARG_CNT; i++, out++)
672
*out = ret_payload[i];
673
674
return ret;
675
}
676
}
677
678
ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, out, 4, qdata.qid,
679
qdata.arg1, qdata.arg2, qdata.arg3);
680
681
/*
682
* For clock name query, all bytes in SMC response are clock name
683
* characters and return code is always success. For invalid clocks,
684
* clock name bytes would be zeros.
685
*/
686
return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret;
687
}
688
EXPORT_SYMBOL_GPL(zynqmp_pm_query_data);
689
690
/**
691
* zynqmp_pm_clock_enable() - Enable the clock for given id
692
* @clock_id: ID of the clock to be enabled
693
*
694
* This function is used by master to enable the clock
695
* including peripherals and PLL clocks.
696
*
697
* Return: Returns status, either success or error+reason
698
*/
699
int zynqmp_pm_clock_enable(u32 clock_id)
700
{
701
return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, NULL, 1, clock_id);
702
}
703
EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable);
704
705
/**
706
* zynqmp_pm_clock_disable() - Disable the clock for given id
707
* @clock_id: ID of the clock to be disable
708
*
709
* This function is used by master to disable the clock
710
* including peripherals and PLL clocks.
711
*
712
* Return: Returns status, either success or error+reason
713
*/
714
int zynqmp_pm_clock_disable(u32 clock_id)
715
{
716
return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, NULL, 1, clock_id);
717
}
718
EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable);
719
720
/**
721
* zynqmp_pm_clock_getstate() - Get the clock state for given id
722
* @clock_id: ID of the clock to be queried
723
* @state: 1/0 (Enabled/Disabled)
724
*
725
* This function is used by master to get the state of clock
726
* including peripherals and PLL clocks.
727
*
728
* Return: Returns status, either success or error+reason
729
*/
730
int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state)
731
{
732
u32 ret_payload[PAYLOAD_ARG_CNT];
733
int ret;
734
735
ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, ret_payload, 1, clock_id);
736
*state = ret_payload[1];
737
738
return ret;
739
}
740
EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate);
741
742
/**
743
* zynqmp_pm_clock_setdivider() - Set the clock divider for given id
744
* @clock_id: ID of the clock
745
* @divider: divider value
746
*
747
* This function is used by master to set divider for any clock
748
* to achieve desired rate.
749
*
750
* Return: Returns status, either success or error+reason
751
*/
752
int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider)
753
{
754
return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, NULL, 2, clock_id, divider);
755
}
756
EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider);
757
758
/**
759
* zynqmp_pm_clock_getdivider() - Get the clock divider for given id
760
* @clock_id: ID of the clock
761
* @divider: divider value
762
*
763
* This function is used by master to get divider values
764
* for any clock.
765
*
766
* Return: Returns status, either success or error+reason
767
*/
768
int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider)
769
{
770
u32 ret_payload[PAYLOAD_ARG_CNT];
771
int ret;
772
773
ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, ret_payload, 1, clock_id);
774
*divider = ret_payload[1];
775
776
return ret;
777
}
778
EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider);
779
780
/**
781
* zynqmp_pm_clock_setparent() - Set the clock parent for given id
782
* @clock_id: ID of the clock
783
* @parent_id: parent id
784
*
785
* This function is used by master to set parent for any clock.
786
*
787
* Return: Returns status, either success or error+reason
788
*/
789
int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id)
790
{
791
return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, NULL, 2, clock_id, parent_id);
792
}
793
EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent);
794
795
/**
796
* zynqmp_pm_clock_getparent() - Get the clock parent for given id
797
* @clock_id: ID of the clock
798
* @parent_id: parent id
799
*
800
* This function is used by master to get parent index
801
* for any clock.
802
*
803
* Return: Returns status, either success or error+reason
804
*/
805
int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id)
806
{
807
u32 ret_payload[PAYLOAD_ARG_CNT];
808
int ret;
809
810
ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, ret_payload, 1, clock_id);
811
*parent_id = ret_payload[1];
812
813
return ret;
814
}
815
EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent);
816
817
/**
818
* zynqmp_pm_set_pll_frac_mode() - PM API for set PLL mode
819
*
820
* @clk_id: PLL clock ID
821
* @mode: PLL mode (PLL_MODE_FRAC/PLL_MODE_INT)
822
*
823
* This function sets PLL mode
824
*
825
* Return: Returns status, either success or error+reason
826
*/
827
int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode)
828
{
829
return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_PLL_FRAC_MODE, clk_id, mode);
830
}
831
EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode);
832
833
/**
834
* zynqmp_pm_get_pll_frac_mode() - PM API for get PLL mode
835
*
836
* @clk_id: PLL clock ID
837
* @mode: PLL mode
838
*
839
* This function return current PLL mode
840
*
841
* Return: Returns status, either success or error+reason
842
*/
843
int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode)
844
{
845
return zynqmp_pm_invoke_fn(PM_IOCTL, mode, 3, 0, IOCTL_GET_PLL_FRAC_MODE, clk_id);
846
}
847
EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode);
848
849
/**
850
* zynqmp_pm_set_pll_frac_data() - PM API for setting pll fraction data
851
*
852
* @clk_id: PLL clock ID
853
* @data: fraction data
854
*
855
* This function sets fraction data.
856
* It is valid for fraction mode only.
857
*
858
* Return: Returns status, either success or error+reason
859
*/
860
int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data)
861
{
862
return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_PLL_FRAC_DATA, clk_id, data);
863
}
864
EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data);
865
866
/**
867
* zynqmp_pm_get_pll_frac_data() - PM API for getting pll fraction data
868
*
869
* @clk_id: PLL clock ID
870
* @data: fraction data
871
*
872
* This function returns fraction data value.
873
*
874
* Return: Returns status, either success or error+reason
875
*/
876
int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data)
877
{
878
return zynqmp_pm_invoke_fn(PM_IOCTL, data, 3, 0, IOCTL_GET_PLL_FRAC_DATA, clk_id);
879
}
880
EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data);
881
882
/**
883
* zynqmp_pm_set_sd_tapdelay() - Set tap delay for the SD device
884
*
885
* @node_id: Node ID of the device
886
* @type: Type of tap delay to set (input/output)
887
* @value: Value to set fot the tap delay
888
*
889
* This function sets input/output tap delay for the SD device.
890
*
891
* Return: Returns status, either success or error+reason
892
*/
893
int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value)
894
{
895
u32 reg = (type == PM_TAPDELAY_INPUT) ? SD_ITAPDLY : SD_OTAPDLYSEL;
896
u32 mask = (node_id == NODE_SD_0) ? GENMASK(15, 0) : GENMASK(31, 16);
897
898
if (value) {
899
return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node_id, IOCTL_SET_SD_TAPDELAY, type,
900
value);
901
}
902
903
/*
904
* Work around completely misdesigned firmware API on Xilinx ZynqMP.
905
* The IOCTL_SET_SD_TAPDELAY firmware call allows the caller to only
906
* ever set IOU_SLCR SD_ITAPDLY Register SD0_ITAPDLYENA/SD1_ITAPDLYENA
907
* bits, but there is no matching call to clear those bits. If those
908
* bits are not cleared, SDMMC tuning may fail.
909
*
910
* Luckily, there are PM_MMIO_READ/PM_MMIO_WRITE calls which seem to
911
* allow complete unrestricted access to all address space, including
912
* IOU_SLCR SD_ITAPDLY Register and all the other registers, access
913
* to which was supposed to be protected by the current firmware API.
914
*
915
* Use PM_MMIO_READ/PM_MMIO_WRITE to re-implement the missing counter
916
* part of IOCTL_SET_SD_TAPDELAY which clears SDx_ITAPDLYENA bits.
917
*/
918
return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, NULL, 2, reg, mask);
919
}
920
EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay);
921
922
/**
923
* zynqmp_pm_sd_dll_reset() - Reset DLL logic
924
*
925
* @node_id: Node ID of the device
926
* @type: Reset type
927
*
928
* This function resets DLL logic for the SD device.
929
*
930
* Return: Returns status, either success or error+reason
931
*/
932
int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type)
933
{
934
return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, node_id, IOCTL_SD_DLL_RESET, type);
935
}
936
EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset);
937
938
/**
939
* zynqmp_pm_ospi_mux_select() - OSPI Mux selection
940
*
941
* @dev_id: Device Id of the OSPI device.
942
* @select: OSPI Mux select value.
943
*
944
* This function select the OSPI Mux.
945
*
946
* Return: Returns status, either success or error+reason
947
*/
948
int zynqmp_pm_ospi_mux_select(u32 dev_id, u32 select)
949
{
950
return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, dev_id, IOCTL_OSPI_MUX_SELECT, select);
951
}
952
EXPORT_SYMBOL_GPL(zynqmp_pm_ospi_mux_select);
953
954
/**
955
* zynqmp_pm_write_ggs() - PM API for writing global general storage (ggs)
956
* @index: GGS register index
957
* @value: Register value to be written
958
*
959
* This function writes value to GGS register.
960
*
961
* Return: Returns status, either success or error+reason
962
*/
963
int zynqmp_pm_write_ggs(u32 index, u32 value)
964
{
965
return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_WRITE_GGS, index, value);
966
}
967
EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs);
968
969
/**
970
* zynqmp_pm_read_ggs() - PM API for reading global general storage (ggs)
971
* @index: GGS register index
972
* @value: Register value to be written
973
*
974
* This function returns GGS register value.
975
*
976
* Return: Returns status, either success or error+reason
977
*/
978
int zynqmp_pm_read_ggs(u32 index, u32 *value)
979
{
980
return zynqmp_pm_invoke_fn(PM_IOCTL, value, 3, 0, IOCTL_READ_GGS, index);
981
}
982
EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs);
983
984
/**
985
* zynqmp_pm_write_pggs() - PM API for writing persistent global general
986
* storage (pggs)
987
* @index: PGGS register index
988
* @value: Register value to be written
989
*
990
* This function writes value to PGGS register.
991
*
992
* Return: Returns status, either success or error+reason
993
*/
994
int zynqmp_pm_write_pggs(u32 index, u32 value)
995
{
996
return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_WRITE_PGGS, index, value);
997
}
998
EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs);
999
1000
/**
1001
* zynqmp_pm_read_pggs() - PM API for reading persistent global general
1002
* storage (pggs)
1003
* @index: PGGS register index
1004
* @value: Register value to be written
1005
*
1006
* This function returns PGGS register value.
1007
*
1008
* Return: Returns status, either success or error+reason
1009
*/
1010
int zynqmp_pm_read_pggs(u32 index, u32 *value)
1011
{
1012
return zynqmp_pm_invoke_fn(PM_IOCTL, value, 3, 0, IOCTL_READ_PGGS, index);
1013
}
1014
EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs);
1015
1016
int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value)
1017
{
1018
return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_TAPDELAY_BYPASS, index, value);
1019
}
1020
EXPORT_SYMBOL_GPL(zynqmp_pm_set_tapdelay_bypass);
1021
1022
/**
1023
* zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status
1024
* @value: Status value to be written
1025
*
1026
* This function sets healthy bit value to indicate boot health status
1027
* to firmware.
1028
*
1029
* Return: Returns status, either success or error+reason
1030
*/
1031
int zynqmp_pm_set_boot_health_status(u32 value)
1032
{
1033
return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, 0, IOCTL_SET_BOOT_HEALTH_STATUS, value);
1034
}
1035
1036
/**
1037
* zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release)
1038
* @reset: Reset to be configured
1039
* @assert_flag: Flag stating should reset be asserted (1) or
1040
* released (0)
1041
*
1042
* Return: Returns status, either success or error+reason
1043
*/
1044
int zynqmp_pm_reset_assert(const u32 reset,
1045
const enum zynqmp_pm_reset_action assert_flag)
1046
{
1047
return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, NULL, 2, reset, assert_flag);
1048
}
1049
EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert);
1050
1051
/**
1052
* zynqmp_pm_reset_get_status - Get status of the reset
1053
* @reset: Reset whose status should be returned
1054
* @status: Returned status
1055
*
1056
* Return: Returns status, either success or error+reason
1057
*/
1058
int zynqmp_pm_reset_get_status(const u32 reset, u32 *status)
1059
{
1060
u32 ret_payload[PAYLOAD_ARG_CNT];
1061
int ret;
1062
1063
if (!status)
1064
return -EINVAL;
1065
1066
ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, ret_payload, 1, reset);
1067
*status = ret_payload[1];
1068
1069
return ret;
1070
}
1071
EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status);
1072
1073
/**
1074
* zynqmp_pm_fpga_load - Perform the fpga load
1075
* @address: Address to write to
1076
* @size: pl bitstream size
1077
* @flags: Bitstream type
1078
* -XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration
1079
* -XILINX_ZYNQMP_PM_FPGA_PARTIAL: FPGA partial reconfiguration
1080
*
1081
* This function provides access to pmufw. To transfer
1082
* the required bitstream into PL.
1083
*
1084
* Return: Returns status, either success or error+reason
1085
*/
1086
int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags)
1087
{
1088
u32 ret_payload[PAYLOAD_ARG_CNT];
1089
int ret;
1090
1091
ret = zynqmp_pm_invoke_fn(PM_FPGA_LOAD, ret_payload, 4, lower_32_bits(address),
1092
upper_32_bits(address), size, flags);
1093
if (ret_payload[0])
1094
return -ret_payload[0];
1095
1096
return ret;
1097
}
1098
EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load);
1099
1100
/**
1101
* zynqmp_pm_fpga_get_status - Read value from PCAP status register
1102
* @value: Value to read
1103
*
1104
* This function provides access to the pmufw to get the PCAP
1105
* status
1106
*
1107
* Return: Returns status, either success or error+reason
1108
*/
1109
int zynqmp_pm_fpga_get_status(u32 *value)
1110
{
1111
u32 ret_payload[PAYLOAD_ARG_CNT];
1112
int ret;
1113
1114
if (!value)
1115
return -EINVAL;
1116
1117
ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, ret_payload, 0);
1118
*value = ret_payload[1];
1119
1120
return ret;
1121
}
1122
EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status);
1123
1124
/**
1125
* zynqmp_pm_fpga_get_config_status - Get the FPGA configuration status.
1126
* @value: Buffer to store FPGA configuration status.
1127
*
1128
* This function provides access to the pmufw to get the FPGA configuration
1129
* status
1130
*
1131
* Return: 0 on success, a negative value on error
1132
*/
1133
int zynqmp_pm_fpga_get_config_status(u32 *value)
1134
{
1135
u32 ret_payload[PAYLOAD_ARG_CNT];
1136
int ret;
1137
1138
if (!value)
1139
return -EINVAL;
1140
1141
ret = zynqmp_pm_invoke_fn(PM_FPGA_READ, ret_payload, 4,
1142
XILINX_ZYNQMP_PM_FPGA_CONFIG_STAT_OFFSET, 0, 0,
1143
XILINX_ZYNQMP_PM_FPGA_READ_CONFIG_REG);
1144
1145
*value = ret_payload[1];
1146
1147
return ret;
1148
}
1149
EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_config_status);
1150
1151
/**
1152
* zynqmp_pm_pinctrl_request - Request Pin from firmware
1153
* @pin: Pin number to request
1154
*
1155
* This function requests pin from firmware.
1156
*
1157
* Return: Returns status, either success or error+reason.
1158
*/
1159
int zynqmp_pm_pinctrl_request(const u32 pin)
1160
{
1161
return zynqmp_pm_invoke_fn(PM_PINCTRL_REQUEST, NULL, 1, pin);
1162
}
1163
EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_request);
1164
1165
/**
1166
* zynqmp_pm_pinctrl_release - Inform firmware that Pin control is released
1167
* @pin: Pin number to release
1168
*
1169
* This function release pin from firmware.
1170
*
1171
* Return: Returns status, either success or error+reason.
1172
*/
1173
int zynqmp_pm_pinctrl_release(const u32 pin)
1174
{
1175
return zynqmp_pm_invoke_fn(PM_PINCTRL_RELEASE, NULL, 1, pin);
1176
}
1177
EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_release);
1178
1179
/**
1180
* zynqmp_pm_pinctrl_set_function - Set requested function for the pin
1181
* @pin: Pin number
1182
* @id: Function ID to set
1183
*
1184
* This function sets requested function for the given pin.
1185
*
1186
* Return: Returns status, either success or error+reason.
1187
*/
1188
int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id)
1189
{
1190
return zynqmp_pm_invoke_fn(PM_PINCTRL_SET_FUNCTION, NULL, 2, pin, id);
1191
}
1192
EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_function);
1193
1194
/**
1195
* zynqmp_pm_pinctrl_get_config - Get configuration parameter for the pin
1196
* @pin: Pin number
1197
* @param: Parameter to get
1198
* @value: Buffer to store parameter value
1199
*
1200
* This function gets requested configuration parameter for the given pin.
1201
*
1202
* Return: Returns status, either success or error+reason.
1203
*/
1204
int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param,
1205
u32 *value)
1206
{
1207
u32 ret_payload[PAYLOAD_ARG_CNT];
1208
int ret;
1209
1210
if (!value)
1211
return -EINVAL;
1212
1213
ret = zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_GET, ret_payload, 2, pin, param);
1214
*value = ret_payload[1];
1215
1216
return ret;
1217
}
1218
EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_config);
1219
1220
/**
1221
* zynqmp_pm_pinctrl_set_config - Set configuration parameter for the pin
1222
* @pin: Pin number
1223
* @param: Parameter to set
1224
* @value: Parameter value to set
1225
*
1226
* This function sets requested configuration parameter for the given pin.
1227
*
1228
* Return: Returns status, either success or error+reason.
1229
*/
1230
int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param,
1231
u32 value)
1232
{
1233
int ret;
1234
u32 pm_family_code;
1235
1236
ret = zynqmp_pm_get_family_info(&pm_family_code);
1237
if (ret)
1238
return ret;
1239
1240
if (pm_family_code == PM_ZYNQMP_FAMILY_CODE &&
1241
param == PM_PINCTRL_CONFIG_TRI_STATE) {
1242
ret = zynqmp_pm_feature(PM_PINCTRL_CONFIG_PARAM_SET);
1243
if (ret < PM_PINCTRL_PARAM_SET_VERSION) {
1244
pr_warn("The requested pinctrl feature is not supported in the current firmware.\n"
1245
"Expected firmware version is 2023.1 and above for this feature to work.\r\n");
1246
return -EOPNOTSUPP;
1247
}
1248
}
1249
1250
return zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_SET, NULL, 3, pin, param, value);
1251
}
1252
EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_config);
1253
1254
/**
1255
* zynqmp_pm_bootmode_read() - PM Config API for read bootpin status
1256
* @ps_mode: Returned output value of ps_mode
1257
*
1258
* This API function is to be used for notify the power management controller
1259
* to read bootpin status.
1260
*
1261
* Return: status, either success or error+reason
1262
*/
1263
unsigned int zynqmp_pm_bootmode_read(u32 *ps_mode)
1264
{
1265
unsigned int ret;
1266
u32 ret_payload[PAYLOAD_ARG_CNT];
1267
1268
ret = zynqmp_pm_invoke_fn(PM_MMIO_READ, ret_payload, 1, CRL_APB_BOOT_PIN_CTRL);
1269
1270
*ps_mode = ret_payload[1];
1271
1272
return ret;
1273
}
1274
EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_read);
1275
1276
/**
1277
* zynqmp_pm_bootmode_write() - PM Config API for Configure bootpin
1278
* @ps_mode: Value to be written to the bootpin ctrl register
1279
*
1280
* This API function is to be used for notify the power management controller
1281
* to configure bootpin.
1282
*
1283
* Return: Returns status, either success or error+reason
1284
*/
1285
int zynqmp_pm_bootmode_write(u32 ps_mode)
1286
{
1287
return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, NULL, 3, CRL_APB_BOOT_PIN_CTRL,
1288
CRL_APB_BOOTPIN_CTRL_MASK, ps_mode);
1289
}
1290
EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_write);
1291
1292
/**
1293
* zynqmp_pm_init_finalize() - PM call to inform firmware that the caller
1294
* master has initialized its own power management
1295
*
1296
* Return: Returns status, either success or error+reason
1297
*
1298
* This API function is to be used for notify the power management controller
1299
* about the completed power management initialization.
1300
*/
1301
static int zynqmp_pm_init_finalize(void)
1302
{
1303
return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, NULL, 0);
1304
}
1305
1306
/**
1307
* zynqmp_pm_set_suspend_mode() - Set system suspend mode
1308
* @mode: Mode to set for system suspend
1309
*
1310
* This API function is used to set mode of system suspend.
1311
*
1312
* Return: Returns status, either success or error+reason
1313
*/
1314
int zynqmp_pm_set_suspend_mode(u32 mode)
1315
{
1316
return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, NULL, 1, mode);
1317
}
1318
EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode);
1319
1320
/**
1321
* zynqmp_pm_request_node() - Request a node with specific capabilities
1322
* @node: Node ID of the slave
1323
* @capabilities: Requested capabilities of the slave
1324
* @qos: Quality of service (not supported)
1325
* @ack: Flag to specify whether acknowledge is requested
1326
*
1327
* This function is used by master to request particular node from firmware.
1328
* Every master must request node before using it.
1329
*
1330
* Return: Returns status, either success or error+reason
1331
*/
1332
int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
1333
const u32 qos, const enum zynqmp_pm_request_ack ack)
1334
{
1335
return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, NULL, 4, node, capabilities, qos, ack);
1336
}
1337
EXPORT_SYMBOL_GPL(zynqmp_pm_request_node);
1338
1339
/**
1340
* zynqmp_pm_release_node() - Release a node
1341
* @node: Node ID of the slave
1342
*
1343
* This function is used by master to inform firmware that master
1344
* has released node. Once released, master must not use that node
1345
* without re-request.
1346
*
1347
* Return: Returns status, either success or error+reason
1348
*/
1349
int zynqmp_pm_release_node(const u32 node)
1350
{
1351
return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, NULL, 1, node);
1352
}
1353
EXPORT_SYMBOL_GPL(zynqmp_pm_release_node);
1354
1355
/**
1356
* zynqmp_pm_get_rpu_mode() - Get RPU mode
1357
* @node_id: Node ID of the device
1358
* @rpu_mode: return by reference value
1359
* either split or lockstep
1360
*
1361
* Return: return 0 on success or error+reason.
1362
* if success, then rpu_mode will be set
1363
* to current rpu mode.
1364
*/
1365
int zynqmp_pm_get_rpu_mode(u32 node_id, enum rpu_oper_mode *rpu_mode)
1366
{
1367
u32 ret_payload[PAYLOAD_ARG_CNT];
1368
int ret;
1369
1370
ret = zynqmp_pm_invoke_fn(PM_IOCTL, ret_payload, 2, node_id, IOCTL_GET_RPU_OPER_MODE);
1371
1372
/* only set rpu_mode if no error */
1373
if (ret == XST_PM_SUCCESS)
1374
*rpu_mode = ret_payload[0];
1375
1376
return ret;
1377
}
1378
EXPORT_SYMBOL_GPL(zynqmp_pm_get_rpu_mode);
1379
1380
/**
1381
* zynqmp_pm_set_rpu_mode() - Set RPU mode
1382
* @node_id: Node ID of the device
1383
* @rpu_mode: Argument 1 to requested IOCTL call. either split or lockstep
1384
*
1385
* This function is used to set RPU mode to split or
1386
* lockstep
1387
*
1388
* Return: Returns status, either success or error+reason
1389
*/
1390
int zynqmp_pm_set_rpu_mode(u32 node_id, enum rpu_oper_mode rpu_mode)
1391
{
1392
return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, node_id, IOCTL_SET_RPU_OPER_MODE,
1393
(u32)rpu_mode);
1394
}
1395
EXPORT_SYMBOL_GPL(zynqmp_pm_set_rpu_mode);
1396
1397
/**
1398
* zynqmp_pm_set_tcm_config - configure TCM
1399
* @node_id: Firmware specific TCM subsystem ID
1400
* @tcm_mode: Argument 1 to requested IOCTL call
1401
* either PM_RPU_TCM_COMB or PM_RPU_TCM_SPLIT
1402
*
1403
* This function is used to set RPU mode to split or combined
1404
*
1405
* Return: status: 0 for success, else failure
1406
*/
1407
int zynqmp_pm_set_tcm_config(u32 node_id, enum rpu_tcm_comb tcm_mode)
1408
{
1409
return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, node_id, IOCTL_TCM_COMB_CONFIG,
1410
(u32)tcm_mode);
1411
}
1412
EXPORT_SYMBOL_GPL(zynqmp_pm_set_tcm_config);
1413
1414
/**
1415
* zynqmp_pm_get_node_status - PM call to request a node's current power state
1416
* @node: ID of the component or sub-system in question
1417
* @status: Current operating state of the requested node
1418
* @requirements: Current requirements asserted on the node,
1419
* used for slave nodes only.
1420
* @usage: Usage information, used for slave nodes only:
1421
* PM_USAGE_NO_MASTER - No master is currently using
1422
* the node
1423
* PM_USAGE_CURRENT_MASTER - Only requesting master is
1424
* currently using the node
1425
* PM_USAGE_OTHER_MASTER - Only other masters are
1426
* currently using the node
1427
* PM_USAGE_BOTH_MASTERS - Both the current and at least
1428
* one other master is currently
1429
* using the node
1430
*
1431
* Return: Returns status, either success or error+reason
1432
*/
1433
int zynqmp_pm_get_node_status(const u32 node, u32 *const status,
1434
u32 *const requirements, u32 *const usage)
1435
{
1436
u32 ret_payload[PAYLOAD_ARG_CNT];
1437
int ret;
1438
1439
if (!status || !requirements || !usage)
1440
return -EINVAL;
1441
1442
ret = zynqmp_pm_invoke_fn(PM_GET_NODE_STATUS, ret_payload, 1, node);
1443
if (ret_payload[0] == XST_PM_SUCCESS) {
1444
*status = ret_payload[1];
1445
*requirements = ret_payload[2];
1446
*usage = ret_payload[3];
1447
}
1448
1449
return ret;
1450
}
1451
EXPORT_SYMBOL_GPL(zynqmp_pm_get_node_status);
1452
1453
/**
1454
* zynqmp_pm_force_pwrdwn - PM call to request for another PU or subsystem to
1455
* be powered down forcefully
1456
* @node: Node ID of the targeted PU or subsystem
1457
* @ack: Flag to specify whether acknowledge is requested
1458
*
1459
* Return: status, either success or error+reason
1460
*/
1461
int zynqmp_pm_force_pwrdwn(const u32 node,
1462
const enum zynqmp_pm_request_ack ack)
1463
{
1464
return zynqmp_pm_invoke_fn(PM_FORCE_POWERDOWN, NULL, 2, node, ack);
1465
}
1466
EXPORT_SYMBOL_GPL(zynqmp_pm_force_pwrdwn);
1467
1468
/**
1469
* zynqmp_pm_request_wake - PM call to wake up selected master or subsystem
1470
* @node: Node ID of the master or subsystem
1471
* @set_addr: Specifies whether the address argument is relevant
1472
* @address: Address from which to resume when woken up
1473
* @ack: Flag to specify whether acknowledge requested
1474
*
1475
* Return: status, either success or error+reason
1476
*/
1477
int zynqmp_pm_request_wake(const u32 node,
1478
const bool set_addr,
1479
const u64 address,
1480
const enum zynqmp_pm_request_ack ack)
1481
{
1482
/* set_addr flag is encoded into 1st bit of address */
1483
return zynqmp_pm_invoke_fn(PM_REQUEST_WAKEUP, NULL, 4, node, address | set_addr,
1484
address >> 32, ack);
1485
}
1486
EXPORT_SYMBOL_GPL(zynqmp_pm_request_wake);
1487
1488
/**
1489
* zynqmp_pm_set_requirement() - PM call to set requirement for PM slaves
1490
* @node: Node ID of the slave
1491
* @capabilities: Requested capabilities of the slave
1492
* @qos: Quality of service (not supported)
1493
* @ack: Flag to specify whether acknowledge is requested
1494
*
1495
* This API function is to be used for slaves a PU already has requested
1496
* to change its capabilities.
1497
*
1498
* Return: Returns status, either success or error+reason
1499
*/
1500
int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
1501
const u32 qos,
1502
const enum zynqmp_pm_request_ack ack)
1503
{
1504
return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, NULL, 4, node, capabilities, qos, ack);
1505
}
1506
EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement);
1507
1508
/**
1509
* zynqmp_pm_load_pdi - Load and process PDI
1510
* @src: Source device where PDI is located
1511
* @address: PDI src address
1512
*
1513
* This function provides support to load PDI from linux
1514
*
1515
* Return: Returns status, either success or error+reason
1516
*/
1517
int zynqmp_pm_load_pdi(const u32 src, const u64 address)
1518
{
1519
return zynqmp_pm_invoke_fn(PM_LOAD_PDI, NULL, 3, src, lower_32_bits(address),
1520
upper_32_bits(address));
1521
}
1522
EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi);
1523
1524
/**
1525
* zynqmp_pm_efuse_access - Provides access to efuse memory.
1526
* @address: Address of the efuse params structure
1527
* @out: Returned output value
1528
*
1529
* Return: Returns status, either success or error code.
1530
*/
1531
int zynqmp_pm_efuse_access(const u64 address, u32 *out)
1532
{
1533
u32 ret_payload[PAYLOAD_ARG_CNT];
1534
int ret;
1535
1536
if (!out)
1537
return -EINVAL;
1538
1539
ret = zynqmp_pm_invoke_fn(PM_EFUSE_ACCESS, ret_payload, 2,
1540
upper_32_bits(address),
1541
lower_32_bits(address));
1542
*out = ret_payload[1];
1543
1544
return ret;
1545
}
1546
EXPORT_SYMBOL_GPL(zynqmp_pm_efuse_access);
1547
1548
/**
1549
* zynqmp_pm_register_notifier() - PM API for register a subsystem
1550
* to be notified about specific
1551
* event/error.
1552
* @node: Node ID to which the event is related.
1553
* @event: Event Mask of Error events for which wants to get notified.
1554
* @wake: Wake subsystem upon capturing the event if value 1
1555
* @enable: Enable the registration for value 1, disable for value 0
1556
*
1557
* This function is used to register/un-register for particular node-event
1558
* combination in firmware.
1559
*
1560
* Return: Returns status, either success or error+reason
1561
*/
1562
1563
int zynqmp_pm_register_notifier(const u32 node, const u32 event,
1564
const u32 wake, const u32 enable)
1565
{
1566
return zynqmp_pm_invoke_fn(PM_REGISTER_NOTIFIER, NULL, 4, node, event, wake, enable);
1567
}
1568
EXPORT_SYMBOL_GPL(zynqmp_pm_register_notifier);
1569
1570
/**
1571
* zynqmp_pm_system_shutdown - PM call to request a system shutdown or restart
1572
* @type: Shutdown or restart? 0 for shutdown, 1 for restart
1573
* @subtype: Specifies which system should be restarted or shut down
1574
*
1575
* Return: Returns status, either success or error+reason
1576
*/
1577
int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype)
1578
{
1579
return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, NULL, 2, type, subtype);
1580
}
1581
1582
/**
1583
* zynqmp_pm_set_feature_config - PM call to request IOCTL for feature config
1584
* @id: The config ID of the feature to be configured
1585
* @value: The config value of the feature to be configured
1586
*
1587
* Return: Returns 0 on success or error value on failure.
1588
*/
1589
int zynqmp_pm_set_feature_config(enum pm_feature_config_id id, u32 value)
1590
{
1591
return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_FEATURE_CONFIG, id, value);
1592
}
1593
1594
/**
1595
* zynqmp_pm_get_feature_config - PM call to get value of configured feature
1596
* @id: The config id of the feature to be queried
1597
* @payload: Returned value array
1598
*
1599
* Return: Returns 0 on success or error value on failure.
1600
*/
1601
int zynqmp_pm_get_feature_config(enum pm_feature_config_id id,
1602
u32 *payload)
1603
{
1604
return zynqmp_pm_invoke_fn(PM_IOCTL, payload, 3, 0, IOCTL_GET_FEATURE_CONFIG, id);
1605
}
1606
1607
/**
1608
* zynqmp_pm_sec_read_reg - PM call to securely read from given offset
1609
* of the node
1610
* @node_id: Node Id of the device
1611
* @offset: Offset to be used (20-bit)
1612
* @ret_value: Output data read from the given offset after
1613
* firmware access policy is successfully enforced
1614
*
1615
* Return: Returns 0 on success or error value on failure
1616
*/
1617
int zynqmp_pm_sec_read_reg(u32 node_id, u32 offset, u32 *ret_value)
1618
{
1619
u32 ret_payload[PAYLOAD_ARG_CNT];
1620
u32 count = 1;
1621
int ret;
1622
1623
if (!ret_value)
1624
return -EINVAL;
1625
1626
ret = zynqmp_pm_invoke_fn(PM_IOCTL, ret_payload, 4, node_id, IOCTL_READ_REG,
1627
offset, count);
1628
1629
*ret_value = ret_payload[1];
1630
1631
return ret;
1632
}
1633
EXPORT_SYMBOL_GPL(zynqmp_pm_sec_read_reg);
1634
1635
/**
1636
* zynqmp_pm_sec_mask_write_reg - PM call to securely write to given offset
1637
* of the node
1638
* @node_id: Node Id of the device
1639
* @offset: Offset to be used (20-bit)
1640
* @mask: Mask to be used
1641
* @value: Value to be written
1642
*
1643
* Return: Returns 0 on success or error value on failure
1644
*/
1645
int zynqmp_pm_sec_mask_write_reg(const u32 node_id, const u32 offset, u32 mask,
1646
u32 value)
1647
{
1648
return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 5, node_id, IOCTL_MASK_WRITE_REG,
1649
offset, mask, value);
1650
}
1651
EXPORT_SYMBOL_GPL(zynqmp_pm_sec_mask_write_reg);
1652
1653
/**
1654
* zynqmp_pm_set_sd_config - PM call to set value of SD config registers
1655
* @node: SD node ID
1656
* @config: The config type of SD registers
1657
* @value: Value to be set
1658
*
1659
* Return: Returns 0 on success or error value on failure.
1660
*/
1661
int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value)
1662
{
1663
return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node, IOCTL_SET_SD_CONFIG, config, value);
1664
}
1665
EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_config);
1666
1667
/**
1668
* zynqmp_pm_set_gem_config - PM call to set value of GEM config registers
1669
* @node: GEM node ID
1670
* @config: The config type of GEM registers
1671
* @value: Value to be set
1672
*
1673
* Return: Returns 0 on success or error value on failure.
1674
*/
1675
int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config,
1676
u32 value)
1677
{
1678
return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node, IOCTL_SET_GEM_CONFIG, config, value);
1679
}
1680
EXPORT_SYMBOL_GPL(zynqmp_pm_set_gem_config);
1681
1682
/**
1683
* struct zynqmp_pm_shutdown_scope - Struct for shutdown scope
1684
* @subtype: Shutdown subtype
1685
* @name: Matching string for scope argument
1686
*
1687
* This struct encapsulates mapping between shutdown scope ID and string.
1688
*/
1689
struct zynqmp_pm_shutdown_scope {
1690
const enum zynqmp_pm_shutdown_subtype subtype;
1691
const char *name;
1692
};
1693
1694
static struct zynqmp_pm_shutdown_scope shutdown_scopes[] = {
1695
[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM] = {
1696
.subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM,
1697
.name = "subsystem",
1698
},
1699
[ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY] = {
1700
.subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY,
1701
.name = "ps_only",
1702
},
1703
[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM] = {
1704
.subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM,
1705
.name = "system",
1706
},
1707
};
1708
1709
static struct zynqmp_pm_shutdown_scope *selected_scope =
1710
&shutdown_scopes[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM];
1711
1712
/**
1713
* zynqmp_pm_is_shutdown_scope_valid - Check if shutdown scope string is valid
1714
* @scope_string: Shutdown scope string
1715
*
1716
* Return: Return pointer to matching shutdown scope struct from
1717
* array of available options in system if string is valid,
1718
* otherwise returns NULL.
1719
*/
1720
static struct zynqmp_pm_shutdown_scope*
1721
zynqmp_pm_is_shutdown_scope_valid(const char *scope_string)
1722
{
1723
int count;
1724
1725
for (count = 0; count < ARRAY_SIZE(shutdown_scopes); count++)
1726
if (sysfs_streq(scope_string, shutdown_scopes[count].name))
1727
return &shutdown_scopes[count];
1728
1729
return NULL;
1730
}
1731
1732
static ssize_t shutdown_scope_show(struct device *device,
1733
struct device_attribute *attr,
1734
char *buf)
1735
{
1736
int i;
1737
1738
for (i = 0; i < ARRAY_SIZE(shutdown_scopes); i++) {
1739
if (&shutdown_scopes[i] == selected_scope) {
1740
strcat(buf, "[");
1741
strcat(buf, shutdown_scopes[i].name);
1742
strcat(buf, "]");
1743
} else {
1744
strcat(buf, shutdown_scopes[i].name);
1745
}
1746
strcat(buf, " ");
1747
}
1748
strcat(buf, "\n");
1749
1750
return strlen(buf);
1751
}
1752
1753
static ssize_t shutdown_scope_store(struct device *device,
1754
struct device_attribute *attr,
1755
const char *buf, size_t count)
1756
{
1757
int ret;
1758
struct zynqmp_pm_shutdown_scope *scope;
1759
1760
scope = zynqmp_pm_is_shutdown_scope_valid(buf);
1761
if (!scope)
1762
return -EINVAL;
1763
1764
ret = zynqmp_pm_system_shutdown(ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY,
1765
scope->subtype);
1766
if (ret) {
1767
pr_err("unable to set shutdown scope %s\n", buf);
1768
return ret;
1769
}
1770
1771
selected_scope = scope;
1772
1773
return count;
1774
}
1775
1776
static DEVICE_ATTR_RW(shutdown_scope);
1777
1778
static ssize_t health_status_store(struct device *device,
1779
struct device_attribute *attr,
1780
const char *buf, size_t count)
1781
{
1782
int ret;
1783
unsigned int value;
1784
1785
ret = kstrtouint(buf, 10, &value);
1786
if (ret)
1787
return ret;
1788
1789
ret = zynqmp_pm_set_boot_health_status(value);
1790
if (ret) {
1791
dev_err(device, "unable to set healthy bit value to %u\n",
1792
value);
1793
return ret;
1794
}
1795
1796
return count;
1797
}
1798
1799
static DEVICE_ATTR_WO(health_status);
1800
1801
static ssize_t ggs_show(struct device *device,
1802
struct device_attribute *attr,
1803
char *buf,
1804
u32 reg)
1805
{
1806
int ret;
1807
u32 ret_payload[PAYLOAD_ARG_CNT];
1808
1809
ret = zynqmp_pm_read_ggs(reg, ret_payload);
1810
if (ret)
1811
return ret;
1812
1813
return sprintf(buf, "0x%x\n", ret_payload[1]);
1814
}
1815
1816
static ssize_t ggs_store(struct device *device,
1817
struct device_attribute *attr,
1818
const char *buf, size_t count,
1819
u32 reg)
1820
{
1821
long value;
1822
int ret;
1823
1824
if (reg >= GSS_NUM_REGS)
1825
return -EINVAL;
1826
1827
ret = kstrtol(buf, 16, &value);
1828
if (ret) {
1829
count = -EFAULT;
1830
goto err;
1831
}
1832
1833
ret = zynqmp_pm_write_ggs(reg, value);
1834
if (ret)
1835
count = -EFAULT;
1836
err:
1837
return count;
1838
}
1839
1840
/* GGS register show functions */
1841
#define GGS0_SHOW(N) \
1842
ssize_t ggs##N##_show(struct device *device, \
1843
struct device_attribute *attr, \
1844
char *buf) \
1845
{ \
1846
return ggs_show(device, attr, buf, N); \
1847
}
1848
1849
static GGS0_SHOW(0);
1850
static GGS0_SHOW(1);
1851
static GGS0_SHOW(2);
1852
static GGS0_SHOW(3);
1853
1854
/* GGS register store function */
1855
#define GGS0_STORE(N) \
1856
ssize_t ggs##N##_store(struct device *device, \
1857
struct device_attribute *attr, \
1858
const char *buf, \
1859
size_t count) \
1860
{ \
1861
return ggs_store(device, attr, buf, count, N); \
1862
}
1863
1864
static GGS0_STORE(0);
1865
static GGS0_STORE(1);
1866
static GGS0_STORE(2);
1867
static GGS0_STORE(3);
1868
1869
static ssize_t pggs_show(struct device *device,
1870
struct device_attribute *attr,
1871
char *buf,
1872
u32 reg)
1873
{
1874
int ret;
1875
u32 ret_payload[PAYLOAD_ARG_CNT];
1876
1877
ret = zynqmp_pm_read_pggs(reg, ret_payload);
1878
if (ret)
1879
return ret;
1880
1881
return sprintf(buf, "0x%x\n", ret_payload[1]);
1882
}
1883
1884
static ssize_t pggs_store(struct device *device,
1885
struct device_attribute *attr,
1886
const char *buf, size_t count,
1887
u32 reg)
1888
{
1889
long value;
1890
int ret;
1891
1892
if (reg >= GSS_NUM_REGS)
1893
return -EINVAL;
1894
1895
ret = kstrtol(buf, 16, &value);
1896
if (ret) {
1897
count = -EFAULT;
1898
goto err;
1899
}
1900
1901
ret = zynqmp_pm_write_pggs(reg, value);
1902
if (ret)
1903
count = -EFAULT;
1904
1905
err:
1906
return count;
1907
}
1908
1909
#define PGGS0_SHOW(N) \
1910
ssize_t pggs##N##_show(struct device *device, \
1911
struct device_attribute *attr, \
1912
char *buf) \
1913
{ \
1914
return pggs_show(device, attr, buf, N); \
1915
}
1916
1917
#define PGGS0_STORE(N) \
1918
ssize_t pggs##N##_store(struct device *device, \
1919
struct device_attribute *attr, \
1920
const char *buf, \
1921
size_t count) \
1922
{ \
1923
return pggs_store(device, attr, buf, count, N); \
1924
}
1925
1926
/* PGGS register show functions */
1927
static PGGS0_SHOW(0);
1928
static PGGS0_SHOW(1);
1929
static PGGS0_SHOW(2);
1930
static PGGS0_SHOW(3);
1931
1932
/* PGGS register store functions */
1933
static PGGS0_STORE(0);
1934
static PGGS0_STORE(1);
1935
static PGGS0_STORE(2);
1936
static PGGS0_STORE(3);
1937
1938
/* GGS register attributes */
1939
static DEVICE_ATTR_RW(ggs0);
1940
static DEVICE_ATTR_RW(ggs1);
1941
static DEVICE_ATTR_RW(ggs2);
1942
static DEVICE_ATTR_RW(ggs3);
1943
1944
/* PGGS register attributes */
1945
static DEVICE_ATTR_RW(pggs0);
1946
static DEVICE_ATTR_RW(pggs1);
1947
static DEVICE_ATTR_RW(pggs2);
1948
static DEVICE_ATTR_RW(pggs3);
1949
1950
static ssize_t feature_config_id_show(struct device *device,
1951
struct device_attribute *attr,
1952
char *buf)
1953
{
1954
struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1955
1956
return sysfs_emit(buf, "%d\n", devinfo->feature_conf_id);
1957
}
1958
1959
static ssize_t feature_config_id_store(struct device *device,
1960
struct device_attribute *attr,
1961
const char *buf, size_t count)
1962
{
1963
u32 config_id;
1964
int ret;
1965
struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1966
1967
if (!buf)
1968
return -EINVAL;
1969
1970
ret = kstrtou32(buf, 10, &config_id);
1971
if (ret)
1972
return ret;
1973
1974
devinfo->feature_conf_id = config_id;
1975
1976
return count;
1977
}
1978
1979
static DEVICE_ATTR_RW(feature_config_id);
1980
1981
static ssize_t feature_config_value_show(struct device *device,
1982
struct device_attribute *attr,
1983
char *buf)
1984
{
1985
int ret;
1986
u32 ret_payload[PAYLOAD_ARG_CNT];
1987
struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1988
1989
ret = zynqmp_pm_get_feature_config(devinfo->feature_conf_id,
1990
ret_payload);
1991
if (ret)
1992
return ret;
1993
1994
return sysfs_emit(buf, "%d\n", ret_payload[1]);
1995
}
1996
1997
static ssize_t feature_config_value_store(struct device *device,
1998
struct device_attribute *attr,
1999
const char *buf, size_t count)
2000
{
2001
u32 value;
2002
int ret;
2003
struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
2004
2005
if (!buf)
2006
return -EINVAL;
2007
2008
ret = kstrtou32(buf, 10, &value);
2009
if (ret)
2010
return ret;
2011
2012
ret = zynqmp_pm_set_feature_config(devinfo->feature_conf_id,
2013
value);
2014
if (ret)
2015
return ret;
2016
2017
return count;
2018
}
2019
2020
static DEVICE_ATTR_RW(feature_config_value);
2021
2022
static struct attribute *zynqmp_firmware_attrs[] = {
2023
&dev_attr_ggs0.attr,
2024
&dev_attr_ggs1.attr,
2025
&dev_attr_ggs2.attr,
2026
&dev_attr_ggs3.attr,
2027
&dev_attr_pggs0.attr,
2028
&dev_attr_pggs1.attr,
2029
&dev_attr_pggs2.attr,
2030
&dev_attr_pggs3.attr,
2031
&dev_attr_shutdown_scope.attr,
2032
&dev_attr_health_status.attr,
2033
&dev_attr_feature_config_id.attr,
2034
&dev_attr_feature_config_value.attr,
2035
NULL,
2036
};
2037
2038
ATTRIBUTE_GROUPS(zynqmp_firmware);
2039
2040
static int zynqmp_firmware_probe(struct platform_device *pdev)
2041
{
2042
struct device *dev = &pdev->dev;
2043
struct zynqmp_devinfo *devinfo;
2044
u32 pm_family_code;
2045
int ret;
2046
2047
ret = get_set_conduit_method(dev->of_node);
2048
if (ret)
2049
return ret;
2050
2051
/* Get platform-specific firmware data from device tree match */
2052
active_platform_fw_data = (struct platform_fw_data *)device_get_match_data(dev);
2053
if (!active_platform_fw_data)
2054
return -EINVAL;
2055
2056
/* Get SiP SVC version number */
2057
ret = zynqmp_pm_get_sip_svc_version(&sip_svc_version);
2058
if (ret)
2059
return ret;
2060
2061
ret = do_feature_check_call(PM_FEATURE_CHECK);
2062
if (ret >= 0 && ((ret & FIRMWARE_VERSION_MASK) >= PM_API_VERSION_1))
2063
feature_check_enabled = true;
2064
2065
devinfo = devm_kzalloc(dev, sizeof(*devinfo), GFP_KERNEL);
2066
if (!devinfo)
2067
return -ENOMEM;
2068
2069
devinfo->dev = dev;
2070
2071
platform_set_drvdata(pdev, devinfo);
2072
2073
/* Check PM API version number */
2074
ret = zynqmp_pm_get_api_version(&pm_api_version);
2075
if (ret)
2076
return ret;
2077
2078
if (pm_api_version < ZYNQMP_PM_VERSION) {
2079
panic("%s Platform Management API version error. Expected: v%d.%d - Found: v%d.%d\n",
2080
__func__,
2081
ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR,
2082
pm_api_version >> 16, pm_api_version & 0xFFFF);
2083
}
2084
2085
pr_info("%s Platform Management API v%d.%d\n", __func__,
2086
pm_api_version >> 16, pm_api_version & 0xFFFF);
2087
2088
/* Get the Family code of platform */
2089
ret = zynqmp_pm_get_family_info(&pm_family_code);
2090
if (ret < 0)
2091
return ret;
2092
2093
/* Check trustzone version number */
2094
ret = zynqmp_pm_get_trustzone_version(&pm_tz_version);
2095
if (ret)
2096
panic("Legacy trustzone found without version support\n");
2097
2098
if (pm_tz_version < ZYNQMP_TZ_VERSION)
2099
panic("%s Trustzone version error. Expected: v%d.%d - Found: v%d.%d\n",
2100
__func__,
2101
ZYNQMP_TZ_VERSION_MAJOR, ZYNQMP_TZ_VERSION_MINOR,
2102
pm_tz_version >> 16, pm_tz_version & 0xFFFF);
2103
2104
pr_info("%s Trustzone version v%d.%d\n", __func__,
2105
pm_tz_version >> 16, pm_tz_version & 0xFFFF);
2106
2107
ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs,
2108
ARRAY_SIZE(firmware_devs), NULL, 0, NULL);
2109
if (ret) {
2110
dev_err(&pdev->dev, "failed to add MFD devices %d\n", ret);
2111
return ret;
2112
}
2113
2114
zynqmp_pm_api_debugfs_init();
2115
2116
if (pm_family_code != PM_ZYNQMP_FAMILY_CODE) {
2117
em_dev = platform_device_register_data(&pdev->dev, "xlnx_event_manager",
2118
-1, NULL, 0);
2119
if (IS_ERR(em_dev))
2120
dev_err_probe(&pdev->dev, PTR_ERR(em_dev), "EM register fail with error\n");
2121
}
2122
2123
return of_platform_populate(dev->of_node, NULL, NULL, dev);
2124
}
2125
2126
static void zynqmp_firmware_remove(struct platform_device *pdev)
2127
{
2128
struct pm_api_feature_data *feature_data;
2129
struct hlist_node *tmp;
2130
int i;
2131
2132
mfd_remove_devices(&pdev->dev);
2133
zynqmp_pm_api_debugfs_exit();
2134
2135
hash_for_each_safe(pm_api_features_map, i, tmp, feature_data, hentry) {
2136
hash_del(&feature_data->hentry);
2137
kfree(feature_data);
2138
}
2139
2140
platform_device_unregister(em_dev);
2141
}
2142
2143
static void zynqmp_firmware_sync_state(struct device *dev)
2144
{
2145
struct device_node *np = dev->of_node;
2146
2147
if (!of_device_is_compatible(np, "xlnx,zynqmp-firmware"))
2148
return;
2149
2150
of_genpd_sync_state(np);
2151
2152
if (zynqmp_pm_init_finalize())
2153
dev_warn(dev, "failed to release power management to firmware\n");
2154
}
2155
2156
static const struct platform_fw_data platform_fw_data_versal = {
2157
.family_code = PM_VERSAL_FAMILY_CODE,
2158
};
2159
2160
static const struct platform_fw_data platform_fw_data_versal_net = {
2161
.family_code = PM_VERSAL_NET_FAMILY_CODE,
2162
};
2163
2164
static const struct platform_fw_data platform_fw_data_zynqmp = {
2165
.family_code = PM_ZYNQMP_FAMILY_CODE,
2166
};
2167
2168
static const struct of_device_id zynqmp_firmware_of_match[] = {
2169
{.compatible = "xlnx,zynqmp-firmware", .data = &platform_fw_data_zynqmp},
2170
{.compatible = "xlnx,versal-firmware", .data = &platform_fw_data_versal},
2171
{.compatible = "xlnx,versal-net-firmware", .data = &platform_fw_data_versal_net},
2172
{},
2173
};
2174
MODULE_DEVICE_TABLE(of, zynqmp_firmware_of_match);
2175
2176
static struct platform_driver zynqmp_firmware_driver = {
2177
.driver = {
2178
.name = "zynqmp_firmware",
2179
.of_match_table = zynqmp_firmware_of_match,
2180
.dev_groups = zynqmp_firmware_groups,
2181
.sync_state = zynqmp_firmware_sync_state,
2182
},
2183
.probe = zynqmp_firmware_probe,
2184
.remove = zynqmp_firmware_remove,
2185
};
2186
module_platform_driver(zynqmp_firmware_driver);
2187
2188