/* SPDX-License-Identifier: GPL-2.0 */1/*2* Header file for FPGA Management Engine (FME) Driver3*4* Copyright (C) 2017-2018 Intel Corporation, Inc.5*6* Authors:7* Kang Luwei <[email protected]>8* Xiao Guangrong <[email protected]>9* Wu Hao <[email protected]>10* Joseph Grecco <[email protected]>11* Enno Luebbers <[email protected]>12* Tim Whisonant <[email protected]>13* Ananda Ravuri <[email protected]>14* Henry Mitchel <[email protected]>15*/1617#ifndef __DFL_FME_H18#define __DFL_FME_H1920/**21* struct dfl_fme - dfl fme private data22*23* @mgr: FME's FPGA manager platform device.24* @region_list: linked list of FME's FPGA regions.25* @bridge_list: linked list of FME's FPGA bridges.26*/27struct dfl_fme {28struct platform_device *mgr;29struct list_head region_list;30struct list_head bridge_list;31};3233extern const struct dfl_feature_ops fme_pr_mgmt_ops;34extern const struct dfl_feature_id fme_pr_mgmt_id_table[];35extern const struct dfl_feature_ops fme_global_err_ops;36extern const struct dfl_feature_id fme_global_err_id_table[];37extern const struct attribute_group fme_global_err_group;38extern const struct dfl_feature_ops fme_perf_ops;39extern const struct dfl_feature_id fme_perf_id_table[];4041#endif /* __DFL_FME_H */424344