/* SPDX-License-Identifier: GPL-2.0 */12/***************************************************************************3* copyright : (C) 2002 by Frank Mori Hess *4***************************************************************************/56#ifndef _HP82335_H7#define _HP82335_H89#include "tms9914.h"10#include "gpibP.h"1112// struct which defines private_data for board13struct hp82335_priv {14struct tms9914_priv tms9914_priv;15unsigned int irq;16unsigned long raw_iobase;17};1819// size of io memory region used20static const int hp82335_rom_size = 0x2000;21static const int hp82335_upper_iomem_size = 0x2000;2223// hp82335 register offsets24enum hp_read_regs {25HPREG_CSR = 0x17f8,26HPREG_STATUS = 0x1ffc,27};2829enum hp_write_regs {30HPREG_INTR_CLEAR = 0x17f7,31HPREG_CCR = HPREG_CSR,32};3334enum ccr_bits {35DMA_ENABLE = (1 << 0), /* DMA enable */36DMA_CHAN_SELECT = (1 << 1), /* DMA channel select O=3,1=2 */37INTR_ENABLE = (1 << 2), /* interrupt enable */38SYS_DISABLE = (1 << 3), /* system controller disable */39};4041enum csr_bits {42SWITCH6 = (1 << 0), /* switch 6 position */43SWITCH5 = (1 << 1), /* switch 5 position */44SYS_CONTROLLER = (1 << 2), /* system controller bit */45DMA_ENABLE_STATUS = (1 << 4), /* DMA enabled */46DMA_CHAN_STATUS = (1 << 5), /* DMA channel 0=3,1=2 */47INTR_ENABLE_STATUS = (1 << 6), /* Interrupt enable */48INTR_PENDING = (1 << 7), /* Interrupt Pending */49};5051#endif // _HP82335_H525354