Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
torvalds
GitHub Repository: torvalds/linux
Path: blob/master/drivers/gpu/drm/amd/display/dc/dc_dsc.h
26535 views
1
#ifndef DC_DSC_H_
2
#define DC_DSC_H_
3
/*
4
* Copyright 2019 Advanced Micro Devices, Inc.
5
*
6
* Permission is hereby granted, free of charge, to any person obtaining a
7
* copy of this software and associated documentation files (the "Software"),
8
* to deal in the Software without restriction, including without limitation
9
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
10
* and/or sell copies of the Software, and to permit persons to whom the
11
* Software is furnished to do so, subject to the following conditions:
12
*
13
* The above copyright notice and this permission notice shall be included in
14
* all copies or substantial portions of the Software.
15
*
16
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22
* OTHER DEALINGS IN THE SOFTWARE.
23
*
24
* Author: AMD
25
*/
26
27
/* put it here temporarily until linux has the new addresses official defined */
28
/* DP Extended DSC Capabilities */
29
#define DP_DSC_BRANCH_OVERALL_THROUGHPUT_0 0x0a0 /* DP 1.4a SCR */
30
#define DP_DSC_BRANCH_OVERALL_THROUGHPUT_1 0x0a1
31
#define DP_DSC_BRANCH_MAX_LINE_WIDTH 0x0a2
32
#include "dc_types.h"
33
34
struct dc_dsc_bw_range {
35
uint32_t min_kbps; /* Bandwidth if min_target_bpp_x16 is used */
36
uint32_t min_target_bpp_x16;
37
uint32_t max_kbps; /* Bandwidth if max_target_bpp_x16 is used */
38
uint32_t max_target_bpp_x16;
39
uint32_t stream_kbps; /* Uncompressed stream bandwidth */
40
};
41
42
struct display_stream_compressor {
43
const struct dsc_funcs *funcs;
44
struct dc_context *ctx;
45
int inst;
46
};
47
48
struct dc_dsc_policy {
49
bool use_min_slices_h;
50
int max_slices_h; // Maximum available if 0
51
int min_slice_height; // Must not be less than 8
52
uint32_t max_target_bpp;
53
uint32_t min_target_bpp;
54
bool enable_dsc_when_not_needed;
55
};
56
57
struct dc_dsc_config_options {
58
uint32_t dsc_min_slice_height_override;
59
uint32_t max_target_bpp_limit_override_x16;
60
uint32_t slice_height_granularity;
61
uint32_t dsc_force_odm_hslice_override;
62
bool force_dsc_when_not_needed;
63
};
64
65
bool dc_dsc_parse_dsc_dpcd(const struct dc *dc,
66
const uint8_t *dpcd_dsc_basic_data,
67
const uint8_t *dpcd_dsc_ext_data,
68
struct dsc_dec_dpcd_caps *dsc_sink_caps);
69
70
bool dc_dsc_compute_bandwidth_range(
71
const struct display_stream_compressor *dsc,
72
uint32_t dsc_min_slice_height_override,
73
uint32_t min_bpp_x16,
74
uint32_t max_bpp_x16,
75
const struct dsc_dec_dpcd_caps *dsc_sink_caps,
76
const struct dc_crtc_timing *timing,
77
const enum dc_link_encoding_format link_encoding,
78
struct dc_dsc_bw_range *range);
79
80
bool dc_dsc_compute_config(
81
const struct display_stream_compressor *dsc,
82
const struct dsc_dec_dpcd_caps *dsc_sink_caps,
83
const struct dc_dsc_config_options *options,
84
uint32_t target_bandwidth_kbps,
85
const struct dc_crtc_timing *timing,
86
const enum dc_link_encoding_format link_encoding,
87
struct dc_dsc_config *dsc_cfg);
88
89
uint32_t dc_dsc_stream_bandwidth_in_kbps(const struct dc_crtc_timing *timing,
90
uint32_t bpp_x16, uint32_t num_slices_h, bool is_dp);
91
92
uint32_t dc_dsc_stream_bandwidth_overhead_in_kbps(
93
const struct dc_crtc_timing *timing,
94
const int num_slices_h,
95
const bool is_dp);
96
97
void dc_dsc_dump_decoder_caps(const struct display_stream_compressor *dsc,
98
const struct dsc_dec_dpcd_caps *dsc_sink_caps);
99
void dc_dsc_dump_encoder_caps(const struct display_stream_compressor *dsc,
100
const struct dc_crtc_timing *timing);
101
102
/* TODO - Hardware/specs limitation should be owned by dc dsc and returned to DM,
103
* and DM can choose to OVERRIDE the limitation on CASE BY CASE basis.
104
* Hardware/specs limitation should not be writable by DM.
105
* It should be decoupled from DM specific policy and named differently.
106
*/
107
void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing,
108
uint32_t max_target_bpp_limit_override_x16,
109
struct dc_dsc_policy *policy,
110
const enum dc_link_encoding_format link_encoding);
111
112
void dc_dsc_policy_set_max_target_bpp_limit(uint32_t limit);
113
114
void dc_dsc_policy_set_enable_dsc_when_not_needed(bool enable);
115
116
void dc_dsc_policy_set_disable_dsc_stream_overhead(bool disable);
117
118
void dc_dsc_get_default_config_option(const struct dc *dc, struct dc_dsc_config_options *options);
119
120
#endif
121
122