Path: blob/master/drivers/gpu/drm/amd/display/dc/dm_helpers.h
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/*1* Copyright 2012-15 Advanced Micro Devices, Inc.2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice shall be included in11* all copies or substantial portions of the Software.12*13* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR14* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,15* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL16* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR17* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,18* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR19* OTHER DEALINGS IN THE SOFTWARE.20*21* Authors: AMD22*23*/2425/**26* This file defines helper functions provided by the Display Manager to27* Display Core.28*/29#ifndef __DM_HELPERS__30#define __DM_HELPERS__3132#include "dc_types.h"33#include "dc.h"3435struct dc_dp_mst_stream_allocation_table;36struct aux_payload;37enum aux_return_code_type;38enum set_config_status;3940/*41* Allocate memory accessible by the GPU42*43* frame buffer allocations must be aligned to a 4096-byte boundary44*45* Returns virtual address, sets addr to physical address46*/47void *dm_helpers_allocate_gpu_mem(48struct dc_context *ctx,49enum dc_gpu_mem_alloc_type type,50size_t size,51long long *addr);5253/*54* Free the GPU-accessible memory at the virtual address pvMem55*/56void dm_helpers_free_gpu_mem(57struct dc_context *ctx,58enum dc_gpu_mem_alloc_type type,59void *pvMem);6061enum dc_edid_status dm_helpers_parse_edid_caps(62struct dc_link *link,63const struct dc_edid *edid,64struct dc_edid_caps *edid_caps);656667/*68* Update DP branch info69*/70void dm_helpers_dp_update_branch_info(71struct dc_context *ctx,72const struct dc_link *link);7374/*75* Writes payload allocation table in immediate downstream device.76*/77bool dm_helpers_dp_mst_write_payload_allocation_table(78struct dc_context *ctx,79const struct dc_stream_state *stream,80struct dc_dp_mst_stream_allocation_table *proposed_table,81bool enable);8283/*84* poll pending down reply85*/86void dm_helpers_dp_mst_poll_pending_down_reply(87struct dc_context *ctx,88const struct dc_link *link);8990/*91* Clear payload allocation table before enable MST DP link.92*/93void dm_helpers_dp_mst_clear_payload_allocation_table(94struct dc_context *ctx,95const struct dc_link *link);9697/*98* Polls for ACT (allocation change trigger) handled and99*/100enum act_return_status dm_helpers_dp_mst_poll_for_allocation_change_trigger(101struct dc_context *ctx,102const struct dc_stream_state *stream);103/*104* Sends ALLOCATE_PAYLOAD message.105*/106void dm_helpers_dp_mst_send_payload_allocation(107struct dc_context *ctx,108const struct dc_stream_state *stream);109110/*111* Update mst manager relevant variables112*/113void dm_helpers_dp_mst_update_mst_mgr_for_deallocation(114struct dc_context *ctx,115const struct dc_stream_state *stream);116117bool dm_helpers_dp_mst_start_top_mgr(118struct dc_context *ctx,119const struct dc_link *link,120bool boot);121122bool dm_helpers_dp_mst_stop_top_mgr(123struct dc_context *ctx,124struct dc_link *link);125126void dm_helpers_dp_mst_update_branch_bandwidth(127struct dc_context *ctx,128struct dc_link *link);129130/**131* OS specific aux read callback.132*/133bool dm_helpers_dp_read_dpcd(134struct dc_context *ctx,135const struct dc_link *link,136uint32_t address,137uint8_t *data,138uint32_t size);139140/**141* OS specific aux write callback.142*/143bool dm_helpers_dp_write_dpcd(144struct dc_context *ctx,145const struct dc_link *link,146uint32_t address,147const uint8_t *data,148uint32_t size);149150bool dm_helpers_submit_i2c(151struct dc_context *ctx,152const struct dc_link *link,153struct i2c_command *cmd);154155bool dm_helpers_execute_fused_io(156struct dc_context *ctx,157struct dc_link *link,158union dmub_rb_cmd *commands,159uint8_t count,160uint32_t timeout_us161);162163bool dm_helpers_dp_write_dsc_enable(164struct dc_context *ctx,165const struct dc_stream_state *stream,166bool enable167);168169bool dm_helpers_dp_write_hblank_reduction(170struct dc_context *ctx,171const struct dc_stream_state *stream);172173bool dm_helpers_is_dp_sink_present(174struct dc_link *link);175176void dm_helpers_mst_enable_stream_features(const struct dc_stream_state *stream);177178enum dc_edid_status dm_helpers_read_local_edid(179struct dc_context *ctx,180struct dc_link *link,181struct dc_sink *sink);182183bool dm_helpers_dp_handle_test_pattern_request(184struct dc_context *ctx,185const struct dc_link *link,186union link_test_pattern dpcd_test_pattern,187union test_misc dpcd_test_params);188189void dm_set_dcn_clocks(190struct dc_context *ctx,191struct dc_clocks *clks);192193void dm_helpers_enable_periodic_detection(struct dc_context *ctx, bool enable);194195void dm_set_phyd32clk(struct dc_context *ctx, int freq_khz);196197bool dm_helpers_dmub_outbox_interrupt_control(struct dc_context *ctx, bool enable);198199void dm_helpers_smu_timeout(struct dc_context *ctx, unsigned int msg_id, unsigned int param, unsigned int timeout_us);200201// 0x1 = Result_OK, 0xFE = Result_UnkmownCmd, 0x0 = Status_Busy202#define IS_SMU_TIMEOUT(result) \203(result == 0x0)204void dm_helpers_init_panel_settings(205struct dc_context *ctx,206struct dc_panel_config *config,207struct dc_sink *sink);208void dm_helpers_override_panel_settings(209struct dc_context *ctx,210struct dc_panel_config *config);211int dm_helper_dmub_aux_transfer_sync(212struct dc_context *ctx,213const struct dc_link *link,214struct aux_payload *payload,215enum aux_return_code_type *operation_result);216217int dm_helpers_dmub_set_config_sync(struct dc_context *ctx,218const struct dc_link *link,219struct set_config_cmd_payload *payload,220enum set_config_status *operation_result);221enum adaptive_sync_type dm_get_adaptive_sync_support_type(struct dc_link *link);222223enum dc_edid_status dm_helpers_get_sbios_edid(struct dc_link *link, struct dc_edid *edid);224225bool dm_helpers_is_fullscreen(struct dc_context *ctx, struct dc_stream_state *stream);226bool dm_helpers_is_hdr_on(struct dc_context *ctx, struct dc_stream_state *stream);227228#endif /* __DM_HELPERS__ */229230231