Path: blob/master/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
51589 views
/*1* Copyright 2019 Advanced Micro Devices, Inc.2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice shall be included in11* all copies or substantial portions of the Software.12*13* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR14* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,15* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL16* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR17* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,18* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR19* OTHER DEALINGS IN THE SOFTWARE.20*21* Authors: AMD22*23*/2425#ifndef _DMUB_SRV_H_26#define _DMUB_SRV_H_2728/**29* DOC: DMUB interface and operation30*31* DMUB is the interface to the display DMCUB microcontroller on DCN hardware.32* It delegates hardware initialization and command submission to the33* microcontroller. DMUB is the shortname for DMCUB.34*35* This interface is not thread-safe. Ensure that all access to the interface36* is properly synchronized by the caller.37*38* Initialization and usage of the DMUB service should be done in the39* steps given below:40*41* 1. dmub_srv_create()42* 2. dmub_srv_has_hw_support()43* 3. dmub_srv_calc_region_info()44* 4. dmub_srv_hw_init()45*46* The call to dmub_srv_create() is required to use the server.47*48* The calls to dmub_srv_has_hw_support() and dmub_srv_calc_region_info()49* are helpers to query cache window size and allocate framebuffer(s)50* for the cache windows.51*52* The call to dmub_srv_hw_init() programs the DMCUB registers to prepare53* for command submission. Commands can be queued via dmub_srv_fb_cmd_queue()54* and executed via dmub_srv_fb_cmd_execute().55*56* If the queue is full the dmub_srv_wait_for_idle() call can be used to57* wait until the queue has been cleared.58*59* Destroying the DMUB service can be done by calling dmub_srv_destroy().60* This does not clear DMUB hardware state, only software state.61*62* The interface is intended to be standalone and should not depend on any63* other component within DAL.64*/6566#include "inc/dmub_cmd.h"67#include "dc/dc_types.h"6869#define DMUB_PC_SNAPSHOT_COUNT 107071/* Default tracebuffer size if meta is absent. */72#define DMUB_TRACE_BUFFER_SIZE (64 * 1024)7374#define PSP_HEADER_BYTES_256 0x100 // 256 bytes75#define PSP_FOOTER_BYTES_256 0x100 // 256 bytes7677/* Forward declarations */78struct dmub_srv;79struct dmub_srv_common_regs;80struct dmub_srv_dcn31_regs;8182struct dmcub_trace_buf_entry;8384/* enum dmub_window_memory_type - memory location type specification for windows */85enum dmub_window_memory_type {86DMUB_WINDOW_MEMORY_TYPE_FB = 0,87DMUB_WINDOW_MEMORY_TYPE_GART88};8990/* enum dmub_status - return code for dmcub functions */91enum dmub_status {92DMUB_STATUS_OK = 0,93DMUB_STATUS_NO_CTX,94DMUB_STATUS_QUEUE_FULL,95DMUB_STATUS_TIMEOUT,96DMUB_STATUS_INVALID,97DMUB_STATUS_HW_FAILURE,98DMUB_STATUS_POWER_STATE_D399};100101/* enum dmub_asic - dmub asic identifier */102enum dmub_asic {103DMUB_ASIC_NONE = 0,104DMUB_ASIC_DCN20,105DMUB_ASIC_DCN21,106DMUB_ASIC_DCN30,107DMUB_ASIC_DCN301,108DMUB_ASIC_DCN302,109DMUB_ASIC_DCN303,110DMUB_ASIC_DCN31,111DMUB_ASIC_DCN31B,112DMUB_ASIC_DCN314,113DMUB_ASIC_DCN315,114DMUB_ASIC_DCN316,115DMUB_ASIC_DCN32,116DMUB_ASIC_DCN321,117DMUB_ASIC_DCN35,118DMUB_ASIC_DCN351,119DMUB_ASIC_DCN36,120DMUB_ASIC_DCN401,121DMUB_ASIC_MAX,122};123124/* enum dmub_window_id - dmub window identifier */125enum dmub_window_id {126DMUB_WINDOW_0_INST_CONST = 0,127DMUB_WINDOW_1_STACK,128DMUB_WINDOW_2_BSS_DATA,129DMUB_WINDOW_3_VBIOS,130DMUB_WINDOW_4_MAILBOX,131DMUB_WINDOW_5_TRACEBUFF,132DMUB_WINDOW_6_FW_STATE,133DMUB_WINDOW_7_SCRATCH_MEM,134DMUB_WINDOW_IB_MEM,135DMUB_WINDOW_SHARED_STATE,136DMUB_WINDOW_LSDMA_BUFFER,137DMUB_WINDOW_CURSOR_OFFLOAD,138DMUB_WINDOW_TOTAL,139};140141/* enum dmub_notification_type - dmub outbox notification identifier */142enum dmub_notification_type {143DMUB_NOTIFICATION_NO_DATA = 0,144DMUB_NOTIFICATION_AUX_REPLY,145DMUB_NOTIFICATION_HPD,146DMUB_NOTIFICATION_HPD_IRQ,147DMUB_NOTIFICATION_SET_CONFIG_REPLY,148DMUB_NOTIFICATION_DPIA_NOTIFICATION,149DMUB_NOTIFICATION_HPD_SENSE_NOTIFY,150DMUB_NOTIFICATION_FUSED_IO,151DMUB_NOTIFICATION_MAX152};153154/**155* DPIA NOTIFICATION Response Type156*/157enum dpia_notify_bw_alloc_status {158159DPIA_BW_REQ_FAILED = 0,160DPIA_BW_REQ_SUCCESS,161DPIA_EST_BW_CHANGED,162DPIA_BW_ALLOC_CAPS_CHANGED163};164165/* enum dmub_memory_access_type - memory access method */166enum dmub_memory_access_type {167DMUB_MEMORY_ACCESS_DEFAULT,168DMUB_MEMORY_ACCESS_CPU = DMUB_MEMORY_ACCESS_DEFAULT,169DMUB_MEMORY_ACCESS_DMA170};171172/* enum dmub_power_state type - to track DC power state in dmub_srv */173enum dmub_srv_power_state_type {174DMUB_POWER_STATE_UNDEFINED = 0,175DMUB_POWER_STATE_D0 = 1,176DMUB_POWER_STATE_D3 = 8177};178179/* enum dmub_inbox_cmd_interface type - defines default interface for host->dmub commands */180enum dmub_inbox_cmd_interface_type {181DMUB_CMD_INTERFACE_DEFAULT = 0,182DMUB_CMD_INTERFACE_FB = 1,183DMUB_CMD_INTERFACE_REG = 2,184};185186/**187* struct dmub_region - dmub hw memory region188* @base: base address for region, must be 256 byte aligned189* @top: top address for region190*/191struct dmub_region {192uint32_t base;193uint32_t top;194};195196/**197* struct dmub_window - dmub hw cache window198* @off: offset to the fb memory in gpu address space199* @r: region in uc address space for cache window200*/201struct dmub_window {202union dmub_addr offset;203struct dmub_region region;204};205206/**207* struct dmub_fb - defines a dmub framebuffer memory region208* @cpu_addr: cpu virtual address for the region, NULL if invalid209* @gpu_addr: gpu virtual address for the region, NULL if invalid210* @size: size of the region in bytes, zero if invalid211*/212struct dmub_fb {213void *cpu_addr;214uint64_t gpu_addr;215uint32_t size;216};217218/**219* struct dmub_srv_region_params - params used for calculating dmub regions220* @inst_const_size: size of the fw inst const section221* @bss_data_size: size of the fw bss data section222* @vbios_size: size of the vbios data223* @fw_bss_data: raw firmware bss data section224*/225struct dmub_srv_region_params {226uint32_t inst_const_size;227uint32_t bss_data_size;228uint32_t vbios_size;229const uint8_t *fw_inst_const;230const uint8_t *fw_bss_data;231const enum dmub_window_memory_type *window_memory_type;232const struct dmub_fw_meta_info *fw_info;233};234235/**236* struct dmub_srv_fw_meta_info_params - params used for fetching fw meta info from fw_image237* @inst_const_size: size of the fw inst const section238* @bss_data_size: size of the fw bss data section239* @fw_inst_const: raw firmware inst const section240* @fw_bss_data: raw firmware bss data section241* @custom_psp_footer_size: custom psp footer size to use when indexing for fw meta info242*/243struct dmub_srv_fw_meta_info_params {244uint32_t inst_const_size;245uint32_t bss_data_size;246const uint8_t *fw_inst_const;247const uint8_t *fw_bss_data;248uint32_t custom_psp_footer_size;249};250251/**252* struct dmub_srv_region_info - output region info from the dmub service253* @fb_size: required minimum fb size for all regions, aligned to 4096 bytes254* @num_regions: number of regions used by the dmub service255* @regions: region info256*257* The regions are aligned such that they can be all placed within the258* same framebuffer but they can also be placed into different framebuffers.259*260* The size of each region can be calculated by the caller:261* size = reg.top - reg.base262*263* Care must be taken when performing custom allocations to ensure that each264* region base address is 256 byte aligned.265*/266struct dmub_srv_region_info {267uint32_t fb_size;268uint32_t gart_size;269uint8_t num_regions;270struct dmub_region regions[DMUB_WINDOW_TOTAL];271uint32_t verified_psp_footer_size;272};273274/**275* struct dmub_srv_memory_params - parameters used for driver fb setup276* @region_info: region info calculated by dmub service277* @cpu_fb_addr: base cpu address for the framebuffer278* @cpu_inbox_addr: base cpu address for the gart279* @gpu_fb_addr: base gpu virtual address for the framebuffer280* @gpu_inbox_addr: base gpu virtual address for the gart281*/282struct dmub_srv_memory_params {283const struct dmub_srv_region_info *region_info;284void *cpu_fb_addr;285void *cpu_gart_addr;286uint64_t gpu_fb_addr;287uint64_t gpu_gart_addr;288const enum dmub_window_memory_type *window_memory_type;289};290291/**292* struct dmub_srv_fb_info - output fb info from the dmub service293* @num_fbs: number of required dmub framebuffers294* @fbs: fb data for each region295*296* Output from the dmub service helper that can be used by the297* driver to prepare dmub_fb that can be passed into the dmub298* hw init service.299*300* Assumes that all regions are within the same framebuffer301* and have been setup according to the region_info generated302* by the dmub service.303*/304struct dmub_srv_fb_info {305uint8_t num_fb;306struct dmub_fb fb[DMUB_WINDOW_TOTAL];307};308309/**310* struct dmub_soc_fb_info - relevant addresses from the frame buffer311* @fb_base: base of the framebuffer aperture312* @fb_offset: offset of the framebuffer aperture313*/314struct dmub_soc_fb_info {315uint64_t fb_base;316uint64_t fb_offset;317};318319/*320* struct dmub_srv_hw_params - params for dmub hardware initialization321* @fb: framebuffer info for each region322* @fb_base: base of the framebuffer aperture323* @fb_offset: offset of the framebuffer aperture324* @psp_version: psp version to pass for DMCU init325* @load_inst_const: true if DMUB should load inst const fw326*/327struct dmub_srv_hw_params {328struct dmub_fb *fb[DMUB_WINDOW_TOTAL];329struct dmub_soc_fb_info soc_fb_info;330uint32_t psp_version;331bool load_inst_const;332bool skip_panel_power_sequence;333bool disable_z10;334bool power_optimization;335bool dpia_supported;336bool disable_dpia;337bool usb4_cm_version;338bool fw_in_system_memory;339bool dpia_hpd_int_enable_supported;340bool disable_clock_gate;341bool disallow_dispclk_dppclk_ds;342bool ips_sequential_ono;343enum dmub_memory_access_type mem_access_type;344enum dmub_ips_disable_type disable_ips;345bool disallow_phy_access;346bool disable_sldo_opt;347bool enable_non_transparent_setconfig;348bool lower_hbr3_phy_ssc;349bool override_hbr3_pll_vco;350bool disable_dpia_bw_allocation;351};352353/**354* struct dmub_srv_debug - Debug info for dmub_srv355* @timeout_occured: Indicates a timeout occured on any message from driver to dmub356* @timeout_cmd: first cmd sent from driver that timed out - subsequent timeouts are not stored357*/358struct dmub_timeout_info {359bool timeout_occured;360union dmub_rb_cmd timeout_cmd;361unsigned long long timestamp;362};363364/**365* struct dmub_diagnostic_data - Diagnostic data retrieved from DMCUB for366* debugging purposes, including logging, crash analysis, etc.367*/368struct dmub_diagnostic_data {369uint32_t dmcub_version;370uint32_t scratch[17];371uint32_t pc[DMUB_PC_SNAPSHOT_COUNT];372uint32_t undefined_address_fault_addr;373uint32_t inst_fetch_fault_addr;374uint32_t data_write_fault_addr;375uint32_t inbox1_rptr;376uint32_t inbox1_wptr;377uint32_t inbox1_size;378uint32_t inbox0_rptr;379uint32_t inbox0_wptr;380uint32_t inbox0_size;381uint32_t outbox1_rptr;382uint32_t outbox1_wptr;383uint32_t outbox1_size;384uint32_t gpint_datain0;385struct dmub_timeout_info timeout_info;386uint8_t is_dmcub_enabled : 1;387uint8_t is_dmcub_soft_reset : 1;388uint8_t is_dmcub_secure_reset : 1;389uint8_t is_traceport_en : 1;390uint8_t is_cw0_enabled : 1;391uint8_t is_cw6_enabled : 1;392uint8_t is_pwait : 1;393};394395/**396* struct dmub_preos_info - preos fw info before loading post os fw.397*/398struct dmub_preos_info {399uint64_t fb_base;400uint64_t fb_offset;401uint64_t trace_buffer_phy_addr;402uint32_t trace_buffer_size;403uint32_t fw_version;404uint32_t boot_status;405uint32_t boot_options;406};407408struct dmub_srv_inbox {409/* generic status */410uint64_t num_submitted;411uint64_t num_reported;412union {413/* frame buffer mailbox status */414struct dmub_rb rb;415/* register mailbox status */416struct {417bool is_pending;418bool is_multi_pending;419};420};421};422423/**424* struct dmub_srv_base_funcs - Driver specific base callbacks425*/426struct dmub_srv_base_funcs {427/**428* @reg_read:429*430* Hook for reading a register.431*432* Return: The 32-bit register value from the given address.433*/434uint32_t (*reg_read)(void *ctx, uint32_t address);435436/**437* @reg_write:438*439* Hook for writing a value to the register specified by address.440*/441void (*reg_write)(void *ctx, uint32_t address, uint32_t value);442};443444/**445* struct dmub_srv_hw_funcs - hardware sequencer funcs for dmub446*/447struct dmub_srv_hw_funcs {448/* private: internal use only */449450void (*init)(struct dmub_srv *dmub);451452void (*reset)(struct dmub_srv *dmub);453454void (*reset_release)(struct dmub_srv *dmub);455456void (*backdoor_load)(struct dmub_srv *dmub,457const struct dmub_window *cw0,458const struct dmub_window *cw1);459460void (*backdoor_load_zfb_mode)(struct dmub_srv *dmub,461const struct dmub_window *cw0,462const struct dmub_window *cw1);463void (*setup_windows)(struct dmub_srv *dmub,464const struct dmub_window *cw2,465const struct dmub_window *cw3,466const struct dmub_window *cw4,467const struct dmub_window *cw5,468const struct dmub_window *cw6,469const struct dmub_window *region6);470471void (*setup_mailbox)(struct dmub_srv *dmub,472const struct dmub_region *inbox1);473474uint32_t (*get_inbox1_wptr)(struct dmub_srv *dmub);475476uint32_t (*get_inbox1_rptr)(struct dmub_srv *dmub);477478void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);479480void (*setup_out_mailbox)(struct dmub_srv *dmub,481const struct dmub_region *outbox1);482483uint32_t (*get_outbox1_wptr)(struct dmub_srv *dmub);484485void (*set_outbox1_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);486487void (*setup_outbox0)(struct dmub_srv *dmub,488const struct dmub_region *outbox0);489490uint32_t (*get_outbox0_wptr)(struct dmub_srv *dmub);491492void (*set_outbox0_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);493494uint32_t (*emul_get_inbox1_rptr)(struct dmub_srv *dmub);495496uint32_t (*emul_get_inbox1_wptr)(struct dmub_srv *dmub);497498void (*emul_set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);499500bool (*is_supported)(struct dmub_srv *dmub);501502bool (*is_psrsu_supported)(struct dmub_srv *dmub);503504bool (*is_hw_init)(struct dmub_srv *dmub);505bool (*is_hw_powered_up)(struct dmub_srv *dmub);506507void (*enable_dmub_boot_options)(struct dmub_srv *dmub,508const struct dmub_srv_hw_params *params);509510void (*skip_dmub_panel_power_sequence)(struct dmub_srv *dmub, bool skip);511512union dmub_fw_boot_status (*get_fw_status)(struct dmub_srv *dmub);513514union dmub_fw_boot_options (*get_fw_boot_option)(struct dmub_srv *dmub);515516void (*set_gpint)(struct dmub_srv *dmub,517union dmub_gpint_data_register reg);518519bool (*is_gpint_acked)(struct dmub_srv *dmub,520union dmub_gpint_data_register reg);521522uint32_t (*get_gpint_response)(struct dmub_srv *dmub);523524uint32_t (*get_gpint_dataout)(struct dmub_srv *dmub);525526void (*configure_dmub_in_system_memory)(struct dmub_srv *dmub);527void (*clear_inbox0_ack_register)(struct dmub_srv *dmub);528uint32_t (*read_inbox0_ack_register)(struct dmub_srv *dmub);529void (*send_inbox0_cmd)(struct dmub_srv *dmub, union dmub_inbox0_data_register data);530uint32_t (*get_current_time)(struct dmub_srv *dmub);531532void (*get_diagnostic_data)(struct dmub_srv *dmub);533bool (*get_preos_fw_info)(struct dmub_srv *dmub);534535bool (*should_detect)(struct dmub_srv *dmub);536void (*init_reg_offsets)(struct dmub_srv *dmub, struct dc_context *ctx);537538void (*subvp_save_surf_addr)(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);539540void (*send_reg_inbox0_cmd_msg)(struct dmub_srv *dmub,541union dmub_rb_cmd *cmd);542uint32_t (*read_reg_inbox0_rsp_int_status)(struct dmub_srv *dmub);543void (*read_reg_inbox0_cmd_rsp)(struct dmub_srv *dmub,544union dmub_rb_cmd *cmd);545void (*write_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub);546void (*clear_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub);547void (*enable_reg_inbox0_rsp_int)(struct dmub_srv *dmub, bool enable);548549uint32_t (*read_reg_outbox0_rdy_int_status)(struct dmub_srv *dmub);550void (*write_reg_outbox0_rdy_int_ack)(struct dmub_srv *dmub);551void (*read_reg_outbox0_msg)(struct dmub_srv *dmub, uint32_t *msg);552void (*write_reg_outbox0_rsp)(struct dmub_srv *dmub, uint32_t *rsp);553uint32_t (*read_reg_outbox0_rsp_int_status)(struct dmub_srv *dmub);554void (*enable_reg_outbox0_rdy_int)(struct dmub_srv *dmub, bool enable);555};556557/**558* struct dmub_srv_create_params - params for dmub service creation559* @base_funcs: driver supplied base routines560* @hw_funcs: optional overrides for hw funcs561* @user_ctx: context data for callback funcs562* @asic: driver supplied asic563* @fw_version: the current firmware version, if any564* @is_virtual: false for hw support only565*/566struct dmub_srv_create_params {567struct dmub_srv_base_funcs funcs;568struct dmub_srv_hw_funcs *hw_funcs;569void *user_ctx;570enum dmub_asic asic;571uint32_t fw_version;572bool is_virtual;573enum dmub_inbox_cmd_interface_type inbox_type;574};575576/**577* struct dmub_srv - software state for dmcub578* @asic: dmub asic identifier579* @user_ctx: user provided context for the dmub_srv580* @fw_version: the current firmware version, if any581* @is_virtual: false if hardware support only582* @shared_state: dmub shared state between firmware and driver583* @cursor_offload_v1: Cursor offload state584* @fw_state: dmub firmware state pointer (debug purpose only)585*/586struct dmub_srv {587enum dmub_asic asic;588void *user_ctx;589uint32_t fw_version;590bool is_virtual;591struct dmub_fb scratch_mem_fb;592struct dmub_fb ib_mem_gart;593struct dmub_fb cursor_offload_fb;594volatile struct dmub_shared_state_feature_block *shared_state;595volatile struct dmub_cursor_offload_v1 *cursor_offload_v1;596volatile const struct dmub_fw_state *fw_state;597598/* private: internal use only */599const struct dmub_srv_common_regs *regs;600const struct dmub_srv_dcn31_regs *regs_dcn31;601struct dmub_srv_dcn32_regs *regs_dcn32;602struct dmub_srv_dcn35_regs *regs_dcn35;603const struct dmub_srv_dcn401_regs *regs_dcn401;604struct dmub_srv_base_funcs funcs;605struct dmub_srv_hw_funcs hw_funcs;606struct dmub_srv_inbox inbox1;607uint32_t inbox1_last_wptr;608struct dmub_srv_inbox reg_inbox0;609/**610* outbox1_rb is accessed without locks (dal & dc)611* and to be used only in dmub_srv_stat_get_notification()612*/613struct dmub_rb outbox1_rb;614615struct dmub_rb outbox0_rb;616617bool sw_init;618bool hw_init;619bool dpia_supported;620621struct dmub_soc_fb_info soc_fb_info;622uint32_t psp_version;623624/* Feature capabilities reported by fw */625struct dmub_fw_meta_info meta_info;626struct dmub_feature_caps feature_caps;627struct dmub_visual_confirm_color visual_confirm_color;628enum dmub_inbox_cmd_interface_type inbox_type;629630enum dmub_srv_power_state_type power_state;631struct dmub_diagnostic_data debug;632struct dmub_fb lsdma_rb_fb;633struct dmub_preos_info preos_info;634};635636/**637* struct dmub_notification - dmub notification data638* @type: dmub notification type639* @link_index: link index to identify aux connection640* @result: USB4 status returned from dmub641* @pending_notification: Indicates there are other pending notifications642* @aux_reply: aux reply643* @hpd_status: hpd status644* @bw_alloc_reply: BW Allocation reply from CM/DPIA645*/646struct dmub_notification {647enum dmub_notification_type type;648uint8_t link_index;649uint8_t result;650/* notify instance from DMUB */651uint8_t instance;652bool pending_notification;653union {654struct aux_reply_data aux_reply;655enum dp_hpd_status hpd_status;656enum set_config_status sc_status;657struct dmub_rb_cmd_hpd_sense_notify_data hpd_sense_notify;658struct dmub_cmd_fused_request fused_request;659};660};661662/**663* DMUB firmware version helper macro - useful for checking if the version664* of a firmware to know if feature or functionality is supported or present.665*/666#define DMUB_FW_VERSION(major, minor, revision) \667((((major) & 0xFF) << 24) | (((minor) & 0xFF) << 16) | (((revision) & 0xFF) << 8))668669/**670* dmub_srv_create() - creates the DMUB service.671* @dmub: the dmub service672* @params: creation parameters for the service673*674* Return:675* DMUB_STATUS_OK - success676* DMUB_STATUS_INVALID - unspecified error677*/678enum dmub_status dmub_srv_create(struct dmub_srv *dmub,679const struct dmub_srv_create_params *params);680681/**682* dmub_srv_destroy() - destroys the DMUB service.683* @dmub: the dmub service684*/685void dmub_srv_destroy(struct dmub_srv *dmub);686687/**688* dmub_srv_calc_region_info() - retreives region info from the dmub service689* @dmub: the dmub service690* @params: parameters used to calculate region locations691* @info_out: the output region info from dmub692*693* Calculates the base and top address for all relevant dmub regions694* using the parameters given (if any).695*696* Return:697* DMUB_STATUS_OK - success698* DMUB_STATUS_INVALID - unspecified error699*/700enum dmub_status701dmub_srv_calc_region_info(struct dmub_srv *dmub,702const struct dmub_srv_region_params *params,703struct dmub_srv_region_info *out);704705/**706* dmub_srv_calc_region_info() - retreives fb info from the dmub service707* @dmub: the dmub service708* @params: parameters used to calculate fb locations709* @info_out: the output fb info from dmub710*711* Calculates the base and top address for all relevant dmub regions712* using the parameters given (if any).713*714* Return:715* DMUB_STATUS_OK - success716* DMUB_STATUS_INVALID - unspecified error717*/718enum dmub_status dmub_srv_calc_mem_info(struct dmub_srv *dmub,719const struct dmub_srv_memory_params *params,720struct dmub_srv_fb_info *out);721722/**723* dmub_srv_has_hw_support() - returns hw support state for dmcub724* @dmub: the dmub service725* @is_supported: hw support state726*727* Queries the hardware for DMCUB support and returns the result.728*729* Can be called before dmub_srv_hw_init().730*731* Return:732* DMUB_STATUS_OK - success733* DMUB_STATUS_INVALID - unspecified error734*/735enum dmub_status dmub_srv_has_hw_support(struct dmub_srv *dmub,736bool *is_supported);737738/**739* dmub_srv_is_hw_init() - returns hardware init state740*741* Return:742* DMUB_STATUS_OK - success743* DMUB_STATUS_INVALID - unspecified error744*/745enum dmub_status dmub_srv_is_hw_init(struct dmub_srv *dmub, bool *is_hw_init);746747/**748* dmub_srv_hw_init() - initializes the underlying DMUB hardware749* @dmub: the dmub service750* @params: params for hardware initialization751*752* Resets the DMUB hardware and performs backdoor loading of the753* required cache regions based on the input framebuffer regions.754*755* Return:756* DMUB_STATUS_OK - success757* DMUB_STATUS_NO_CTX - dmcub context not initialized758* DMUB_STATUS_INVALID - unspecified error759*/760enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub,761const struct dmub_srv_hw_params *params);762763/**764* dmub_srv_hw_reset() - puts the DMUB hardware in reset state if initialized765* @dmub: the dmub service766*767* Before destroying the DMUB service or releasing the backing framebuffer768* memory we'll need to put the DMCUB into reset first.769*770* A subsequent call to dmub_srv_hw_init() will re-enable the DMCUB.771*772* Return:773* DMUB_STATUS_OK - success774* DMUB_STATUS_INVALID - unspecified error775*/776enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub);777778/**779* dmub_srv_fb_cmd_queue() - queues a command to the DMUB780* @dmub: the dmub service781* @cmd: the command to queue782*783* Queues a command to the DMUB service but does not begin execution784* immediately.785*786* Return:787* DMUB_STATUS_OK - success788* DMUB_STATUS_QUEUE_FULL - no remaining room in queue789* DMUB_STATUS_INVALID - unspecified error790*/791enum dmub_status dmub_srv_fb_cmd_queue(struct dmub_srv *dmub,792const union dmub_rb_cmd *cmd);793794/**795* dmub_srv_fb_cmd_execute() - Executes a queued sequence to the dmub796* @dmub: the dmub service797*798* Begins execution of queued commands on the dmub.799*800* Return:801* DMUB_STATUS_OK - success802* DMUB_STATUS_INVALID - unspecified error803*/804enum dmub_status dmub_srv_fb_cmd_execute(struct dmub_srv *dmub);805806/**807* dmub_srv_wait_for_hw_pwr_up() - Waits for firmware hardware power up is completed808* @dmub: the dmub service809* @timeout_us: the maximum number of microseconds to wait810*811* Waits until firmware hardware is powered up. The maximum812* wait time is given in microseconds to prevent spinning forever.813*814* Return:815* DMUB_STATUS_OK - success816* DMUB_STATUS_TIMEOUT - timed out817* DMUB_STATUS_INVALID - unspecified error818*/819enum dmub_status dmub_srv_wait_for_hw_pwr_up(struct dmub_srv *dmub,820uint32_t timeout_us);821822bool dmub_srv_is_hw_pwr_up(struct dmub_srv *dmub);823824/**825* dmub_srv_wait_for_auto_load() - Waits for firmware auto load to complete826* @dmub: the dmub service827* @timeout_us: the maximum number of microseconds to wait828*829* Waits until firmware has been autoloaded by the DMCUB. The maximum830* wait time is given in microseconds to prevent spinning forever.831*832* On ASICs without firmware autoload support this function will return833* immediately.834*835* Return:836* DMUB_STATUS_OK - success837* DMUB_STATUS_TIMEOUT - wait for phy init timed out838* DMUB_STATUS_INVALID - unspecified error839*/840enum dmub_status dmub_srv_wait_for_auto_load(struct dmub_srv *dmub,841uint32_t timeout_us);842843/**844* dmub_srv_wait_for_phy_init() - Waits for DMUB PHY init to complete845* @dmub: the dmub service846* @timeout_us: the maximum number of microseconds to wait847*848* Waits until the PHY has been initialized by the DMUB. The maximum849* wait time is given in microseconds to prevent spinning forever.850*851* On ASICs without PHY init support this function will return852* immediately.853*854* Return:855* DMUB_STATUS_OK - success856* DMUB_STATUS_TIMEOUT - wait for phy init timed out857* DMUB_STATUS_INVALID - unspecified error858*/859enum dmub_status dmub_srv_wait_for_phy_init(struct dmub_srv *dmub,860uint32_t timeout_us);861862/**863* dmub_srv_wait_for_pending() - Re-entrant wait for messages currently pending864* @dmub: the dmub service865* @timeout_us: the maximum number of microseconds to wait866*867* Waits until the commands queued prior to this call are complete.868* If interfaces remain busy due to additional work being submitted869* concurrently, this function will not continue to wait.870*871* Return:872* DMUB_STATUS_OK - success873* DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out874* DMUB_STATUS_INVALID - unspecified error875*/876enum dmub_status dmub_srv_wait_for_pending(struct dmub_srv *dmub,877uint32_t timeout_us);878879/**880* dmub_srv_wait_for_idle() - Waits for the DMUB to be idle881* @dmub: the dmub service882* @timeout_us: the maximum number of microseconds to wait883*884* Waits until the DMUB buffer is empty and all commands have885* finished processing. The maximum wait time is given in886* microseconds to prevent spinning forever.887*888* Return:889* DMUB_STATUS_OK - success890* DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out891* DMUB_STATUS_INVALID - unspecified error892*/893enum dmub_status dmub_srv_wait_for_idle(struct dmub_srv *dmub,894uint32_t timeout_us);895896/**897* dmub_srv_send_gpint_command() - Sends a GPINT based command.898* @dmub: the dmub service899* @command_code: the command code to send900* @param: the command parameter to send901* @timeout_us: the maximum number of microseconds to wait902*903* Sends a command via the general purpose interrupt (GPINT).904* Waits for the number of microseconds specified by timeout_us905* for the command ACK before returning.906*907* Can be called after software initialization.908*909* Return:910* DMUB_STATUS_OK - success911* DMUB_STATUS_TIMEOUT - wait for ACK timed out912* DMUB_STATUS_INVALID - unspecified error913*/914enum dmub_status915dmub_srv_send_gpint_command(struct dmub_srv *dmub,916enum dmub_gpint_command command_code,917uint16_t param, uint32_t timeout_us);918919/**920* dmub_srv_get_gpint_response() - Queries the GPINT response.921* @dmub: the dmub service922* @response: the response for the last GPINT923*924* Returns the response code for the last GPINT interrupt.925*926* Can be called after software initialization.927*928* Return:929* DMUB_STATUS_OK - success930* DMUB_STATUS_INVALID - unspecified error931*/932enum dmub_status dmub_srv_get_gpint_response(struct dmub_srv *dmub,933uint32_t *response);934935/**936* dmub_srv_get_gpint_dataout() - Queries the GPINT DATAOUT.937* @dmub: the dmub service938* @dataout: the data for the GPINT DATAOUT939*940* Returns the response code for the last GPINT DATAOUT interrupt.941*942* Can be called after software initialization.943*944* Return:945* DMUB_STATUS_OK - success946* DMUB_STATUS_INVALID - unspecified error947*/948enum dmub_status dmub_srv_get_gpint_dataout(struct dmub_srv *dmub,949uint32_t *dataout);950951/**952* dmub_flush_buffer_mem() - Read back entire frame buffer region.953* This ensures that the write from x86 has been flushed and will not954* hang the DMCUB.955* @fb: frame buffer to flush956*957* Can be called after software initialization.958*/959void dmub_flush_buffer_mem(const struct dmub_fb *fb);960961/**962* dmub_srv_get_fw_boot_status() - Returns the DMUB boot status bits.963*964* @dmub: the dmub service965* @status: out pointer for firmware status966*967* Return:968* DMUB_STATUS_OK - success969* DMUB_STATUS_INVALID - unspecified error, unsupported970*/971enum dmub_status dmub_srv_get_fw_boot_status(struct dmub_srv *dmub,972union dmub_fw_boot_status *status);973974enum dmub_status dmub_srv_get_fw_boot_option(struct dmub_srv *dmub,975union dmub_fw_boot_options *option);976977enum dmub_status dmub_srv_set_skip_panel_power_sequence(struct dmub_srv *dmub,978bool skip);979980bool dmub_srv_get_outbox0_msg(struct dmub_srv *dmub, struct dmcub_trace_buf_entry *entry);981982bool dmub_srv_get_diagnostic_data(struct dmub_srv *dmub);983984bool dmub_srv_should_detect(struct dmub_srv *dmub);985986/**987* dmub_srv_send_inbox0_cmd() - Send command to DMUB using INBOX0988* @dmub: the dmub service989* @data: the data to be sent in the INBOX0 command990*991* Send command by writing directly to INBOX0 WPTR992*993* Return:994* DMUB_STATUS_OK - success995* DMUB_STATUS_INVALID - hw_init false or hw function does not exist996*/997enum dmub_status dmub_srv_send_inbox0_cmd(struct dmub_srv *dmub, union dmub_inbox0_data_register data);998999/**1000* dmub_srv_wait_for_inbox0_ack() - wait for DMUB to ACK INBOX0 command1001* @dmub: the dmub service1002* @timeout_us: the maximum number of microseconds to wait1003*1004* Wait for DMUB to ACK the INBOX0 message1005*1006* Return:1007* DMUB_STATUS_OK - success1008* DMUB_STATUS_INVALID - hw_init false or hw function does not exist1009* DMUB_STATUS_TIMEOUT - wait for ack timed out1010*/1011enum dmub_status dmub_srv_wait_for_inbox0_ack(struct dmub_srv *dmub, uint32_t timeout_us);10121013/**1014* dmub_srv_wait_for_inbox0_ack() - clear ACK register for INBOX01015* @dmub: the dmub service1016*1017* Clear ACK register for INBOX01018*1019* Return:1020* DMUB_STATUS_OK - success1021* DMUB_STATUS_INVALID - hw_init false or hw function does not exist1022*/1023enum dmub_status dmub_srv_clear_inbox0_ack(struct dmub_srv *dmub);10241025/**1026* dmub_srv_subvp_save_surf_addr() - Save primary and meta address for subvp on each flip1027* @dmub: The dmub service1028* @addr: The surface address to be programmed on the current flip1029* @subvp_index: Index of subvp pipe, indicates which subvp pipe the address should be saved for1030*1031* Function to save the surface flip addr into scratch registers. This is to fix a race condition1032* between FW and driver reading / writing to the surface address at the same time. This is1033* required because there is no EARLIEST_IN_USE_META.1034*1035* Return:1036* void1037*/1038void dmub_srv_subvp_save_surf_addr(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);10391040/**1041* dmub_srv_set_power_state() - Track DC power state in dmub_srv1042* @dmub: The dmub service1043* @power_state: DC power state setting1044*1045* Store DC power state in dmub_srv. If dmub_srv is in D3, then don't send messages to DMUB1046*1047* Return:1048* void1049*/1050void dmub_srv_set_power_state(struct dmub_srv *dmub, enum dmub_srv_power_state_type dmub_srv_power_state);10511052/**1053* dmub_srv_reg_cmd_execute() - Executes provided command to the dmub1054* @dmub: the dmub service1055* @cmd: the command packet to be executed1056*1057* Executes a single command for the dmub.1058*1059* Return:1060* DMUB_STATUS_OK - success1061* DMUB_STATUS_INVALID - unspecified error1062*/1063enum dmub_status dmub_srv_reg_cmd_execute(struct dmub_srv *dmub, union dmub_rb_cmd *cmd);106410651066/**1067* dmub_srv_cmd_get_response() - Copies return data for command into buffer1068* @dmub: the dmub service1069* @cmd_rsp: response buffer1070*1071* Copies return data for command into buffer1072*/1073void dmub_srv_cmd_get_response(struct dmub_srv *dmub,1074union dmub_rb_cmd *cmd_rsp);10751076/**1077* dmub_srv_sync_inboxes() - Sync inbox state1078* @dmub: the dmub service1079*1080* Sync inbox state1081*1082* Return:1083* DMUB_STATUS_OK - success1084* DMUB_STATUS_INVALID - unspecified error1085*/1086enum dmub_status dmub_srv_sync_inboxes(struct dmub_srv *dmub);10871088/**1089* dmub_srv_wait_for_inbox_free() - Waits for space in the DMUB inbox to free up1090* @dmub: the dmub service1091* @timeout_us: the maximum number of microseconds to wait1092* @num_free_required: number of free entries required1093*1094* Waits until the DMUB buffer is freed to the specified number.1095* The maximum wait time is given in microseconds to prevent spinning1096* forever.1097*1098* Return:1099* DMUB_STATUS_OK - success1100* DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out1101* DMUB_STATUS_INVALID - unspecified error1102*/1103enum dmub_status dmub_srv_wait_for_inbox_free(struct dmub_srv *dmub,1104uint32_t timeout_us,1105uint32_t num_free_required);11061107/**1108* dmub_srv_update_inbox_status() - Updates pending status for inbox & reg inbox01109* @dmub: the dmub service1110*1111* Return:1112* DMUB_STATUS_OK - success1113* DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out1114* DMUB_STATUS_HW_FAILURE - issue with HW programming1115* DMUB_STATUS_INVALID - unspecified error1116*/1117enum dmub_status dmub_srv_update_inbox_status(struct dmub_srv *dmub);11181119/**1120* dmub_srv_get_preos_info() - retrieves preos fw info1121* @dmub: the dmub service1122*1123* Return:1124* true - preos fw info retrieved successfully1125* false - preos fw info not retrieved successfully1126*/1127bool dmub_srv_get_preos_info(struct dmub_srv *dmub);11281129/**1130* dmub_srv_get_fw_meta_info_from_raw_fw() - Fetch firmware metadata info from raw firmware image1131* @params: parameters for fetching firmware metadata info1132* @fw_info_out: output buffer for firmware metadata info1133*1134* Return:1135* DMUB_STATUS_OK - success1136* DMUB_STATUS_INVALID - no FW meta info found1137*/1138enum dmub_status dmub_srv_get_fw_meta_info_from_raw_fw(struct dmub_srv_fw_meta_info_params *params,1139struct dmub_fw_meta_info *fw_info_out);11401141#endif /* _DMUB_SRV_H_ */114211431144