Path: blob/master/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
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/*1* Copyright 2019 Advanced Micro Devices, Inc.2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice shall be included in11* all copies or substantial portions of the Software.12*13* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR14* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,15* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL16* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR17* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,18* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR19* OTHER DEALINGS IN THE SOFTWARE.20*21* Authors: AMD22*23*/2425#ifndef _DMUB_SRV_H_26#define _DMUB_SRV_H_2728/**29* DOC: DMUB interface and operation30*31* DMUB is the interface to the display DMCUB microcontroller on DCN hardware.32* It delegates hardware initialization and command submission to the33* microcontroller. DMUB is the shortname for DMCUB.34*35* This interface is not thread-safe. Ensure that all access to the interface36* is properly synchronized by the caller.37*38* Initialization and usage of the DMUB service should be done in the39* steps given below:40*41* 1. dmub_srv_create()42* 2. dmub_srv_has_hw_support()43* 3. dmub_srv_calc_region_info()44* 4. dmub_srv_hw_init()45*46* The call to dmub_srv_create() is required to use the server.47*48* The calls to dmub_srv_has_hw_support() and dmub_srv_calc_region_info()49* are helpers to query cache window size and allocate framebuffer(s)50* for the cache windows.51*52* The call to dmub_srv_hw_init() programs the DMCUB registers to prepare53* for command submission. Commands can be queued via dmub_srv_fb_cmd_queue()54* and executed via dmub_srv_fb_cmd_execute().55*56* If the queue is full the dmub_srv_wait_for_idle() call can be used to57* wait until the queue has been cleared.58*59* Destroying the DMUB service can be done by calling dmub_srv_destroy().60* This does not clear DMUB hardware state, only software state.61*62* The interface is intended to be standalone and should not depend on any63* other component within DAL.64*/6566#include "inc/dmub_cmd.h"67#include "dc/dc_types.h"6869#define DMUB_PC_SNAPSHOT_COUNT 107071/* Default tracebuffer size if meta is absent. */72#define DMUB_TRACE_BUFFER_SIZE (64 * 1024)7374/* Forward declarations */75struct dmub_srv;76struct dmub_srv_common_regs;77struct dmub_srv_dcn31_regs;7879struct dmcub_trace_buf_entry;8081/* enum dmub_window_memory_type - memory location type specification for windows */82enum dmub_window_memory_type {83DMUB_WINDOW_MEMORY_TYPE_FB = 0,84DMUB_WINDOW_MEMORY_TYPE_GART85};8687/* enum dmub_status - return code for dmcub functions */88enum dmub_status {89DMUB_STATUS_OK = 0,90DMUB_STATUS_NO_CTX,91DMUB_STATUS_QUEUE_FULL,92DMUB_STATUS_TIMEOUT,93DMUB_STATUS_INVALID,94DMUB_STATUS_HW_FAILURE,95DMUB_STATUS_POWER_STATE_D396};9798/* enum dmub_asic - dmub asic identifier */99enum dmub_asic {100DMUB_ASIC_NONE = 0,101DMUB_ASIC_DCN20,102DMUB_ASIC_DCN21,103DMUB_ASIC_DCN30,104DMUB_ASIC_DCN301,105DMUB_ASIC_DCN302,106DMUB_ASIC_DCN303,107DMUB_ASIC_DCN31,108DMUB_ASIC_DCN31B,109DMUB_ASIC_DCN314,110DMUB_ASIC_DCN315,111DMUB_ASIC_DCN316,112DMUB_ASIC_DCN32,113DMUB_ASIC_DCN321,114DMUB_ASIC_DCN35,115DMUB_ASIC_DCN351,116DMUB_ASIC_DCN36,117DMUB_ASIC_DCN401,118DMUB_ASIC_MAX,119};120121/* enum dmub_window_id - dmub window identifier */122enum dmub_window_id {123DMUB_WINDOW_0_INST_CONST = 0,124DMUB_WINDOW_1_STACK,125DMUB_WINDOW_2_BSS_DATA,126DMUB_WINDOW_3_VBIOS,127DMUB_WINDOW_4_MAILBOX,128DMUB_WINDOW_5_TRACEBUFF,129DMUB_WINDOW_6_FW_STATE,130DMUB_WINDOW_7_SCRATCH_MEM,131DMUB_WINDOW_IB_MEM,132DMUB_WINDOW_SHARED_STATE,133DMUB_WINDOW_LSDMA_BUFFER,134DMUB_WINDOW_TOTAL,135};136137/* enum dmub_notification_type - dmub outbox notification identifier */138enum dmub_notification_type {139DMUB_NOTIFICATION_NO_DATA = 0,140DMUB_NOTIFICATION_AUX_REPLY,141DMUB_NOTIFICATION_HPD,142DMUB_NOTIFICATION_HPD_IRQ,143DMUB_NOTIFICATION_SET_CONFIG_REPLY,144DMUB_NOTIFICATION_DPIA_NOTIFICATION,145DMUB_NOTIFICATION_HPD_SENSE_NOTIFY,146DMUB_NOTIFICATION_FUSED_IO,147DMUB_NOTIFICATION_MAX148};149150/**151* DPIA NOTIFICATION Response Type152*/153enum dpia_notify_bw_alloc_status {154155DPIA_BW_REQ_FAILED = 0,156DPIA_BW_REQ_SUCCESS,157DPIA_EST_BW_CHANGED,158DPIA_BW_ALLOC_CAPS_CHANGED159};160161/* enum dmub_memory_access_type - memory access method */162enum dmub_memory_access_type {163DMUB_MEMORY_ACCESS_DEFAULT,164DMUB_MEMORY_ACCESS_CPU = DMUB_MEMORY_ACCESS_DEFAULT,165DMUB_MEMORY_ACCESS_DMA166};167168/* enum dmub_power_state type - to track DC power state in dmub_srv */169enum dmub_srv_power_state_type {170DMUB_POWER_STATE_UNDEFINED = 0,171DMUB_POWER_STATE_D0 = 1,172DMUB_POWER_STATE_D3 = 8173};174175/* enum dmub_inbox_cmd_interface type - defines default interface for host->dmub commands */176enum dmub_inbox_cmd_interface_type {177DMUB_CMD_INTERFACE_DEFAULT = 0,178DMUB_CMD_INTERFACE_FB = 1,179DMUB_CMD_INTERFACE_REG = 2,180};181182/**183* struct dmub_region - dmub hw memory region184* @base: base address for region, must be 256 byte aligned185* @top: top address for region186*/187struct dmub_region {188uint32_t base;189uint32_t top;190};191192/**193* struct dmub_window - dmub hw cache window194* @off: offset to the fb memory in gpu address space195* @r: region in uc address space for cache window196*/197struct dmub_window {198union dmub_addr offset;199struct dmub_region region;200};201202/**203* struct dmub_fb - defines a dmub framebuffer memory region204* @cpu_addr: cpu virtual address for the region, NULL if invalid205* @gpu_addr: gpu virtual address for the region, NULL if invalid206* @size: size of the region in bytes, zero if invalid207*/208struct dmub_fb {209void *cpu_addr;210uint64_t gpu_addr;211uint32_t size;212};213214/**215* struct dmub_srv_region_params - params used for calculating dmub regions216* @inst_const_size: size of the fw inst const section217* @bss_data_size: size of the fw bss data section218* @vbios_size: size of the vbios data219* @fw_bss_data: raw firmware bss data section220*/221struct dmub_srv_region_params {222uint32_t inst_const_size;223uint32_t bss_data_size;224uint32_t vbios_size;225const uint8_t *fw_inst_const;226const uint8_t *fw_bss_data;227const enum dmub_window_memory_type *window_memory_type;228};229230/**231* struct dmub_srv_region_info - output region info from the dmub service232* @fb_size: required minimum fb size for all regions, aligned to 4096 bytes233* @num_regions: number of regions used by the dmub service234* @regions: region info235*236* The regions are aligned such that they can be all placed within the237* same framebuffer but they can also be placed into different framebuffers.238*239* The size of each region can be calculated by the caller:240* size = reg.top - reg.base241*242* Care must be taken when performing custom allocations to ensure that each243* region base address is 256 byte aligned.244*/245struct dmub_srv_region_info {246uint32_t fb_size;247uint32_t gart_size;248uint8_t num_regions;249struct dmub_region regions[DMUB_WINDOW_TOTAL];250};251252/**253* struct dmub_srv_memory_params - parameters used for driver fb setup254* @region_info: region info calculated by dmub service255* @cpu_fb_addr: base cpu address for the framebuffer256* @cpu_inbox_addr: base cpu address for the gart257* @gpu_fb_addr: base gpu virtual address for the framebuffer258* @gpu_inbox_addr: base gpu virtual address for the gart259*/260struct dmub_srv_memory_params {261const struct dmub_srv_region_info *region_info;262void *cpu_fb_addr;263void *cpu_gart_addr;264uint64_t gpu_fb_addr;265uint64_t gpu_gart_addr;266const enum dmub_window_memory_type *window_memory_type;267};268269/**270* struct dmub_srv_fb_info - output fb info from the dmub service271* @num_fbs: number of required dmub framebuffers272* @fbs: fb data for each region273*274* Output from the dmub service helper that can be used by the275* driver to prepare dmub_fb that can be passed into the dmub276* hw init service.277*278* Assumes that all regions are within the same framebuffer279* and have been setup according to the region_info generated280* by the dmub service.281*/282struct dmub_srv_fb_info {283uint8_t num_fb;284struct dmub_fb fb[DMUB_WINDOW_TOTAL];285};286287/*288* struct dmub_srv_hw_params - params for dmub hardware initialization289* @fb: framebuffer info for each region290* @fb_base: base of the framebuffer aperture291* @fb_offset: offset of the framebuffer aperture292* @psp_version: psp version to pass for DMCU init293* @load_inst_const: true if DMUB should load inst const fw294*/295struct dmub_srv_hw_params {296struct dmub_fb *fb[DMUB_WINDOW_TOTAL];297uint64_t fb_base;298uint64_t fb_offset;299uint32_t psp_version;300bool load_inst_const;301bool skip_panel_power_sequence;302bool disable_z10;303bool power_optimization;304bool dpia_supported;305bool disable_dpia;306bool usb4_cm_version;307bool fw_in_system_memory;308bool dpia_hpd_int_enable_supported;309bool disable_clock_gate;310bool disallow_dispclk_dppclk_ds;311bool ips_sequential_ono;312enum dmub_memory_access_type mem_access_type;313enum dmub_ips_disable_type disable_ips;314bool disallow_phy_access;315bool disable_sldo_opt;316bool enable_non_transparent_setconfig;317bool lower_hbr3_phy_ssc;318};319320/**321* struct dmub_srv_debug - Debug info for dmub_srv322* @timeout_occured: Indicates a timeout occured on any message from driver to dmub323* @timeout_cmd: first cmd sent from driver that timed out - subsequent timeouts are not stored324*/325struct dmub_timeout_info {326bool timeout_occured;327union dmub_rb_cmd timeout_cmd;328unsigned long long timestamp;329};330331/**332* struct dmub_diagnostic_data - Diagnostic data retrieved from DMCUB for333* debugging purposes, including logging, crash analysis, etc.334*/335struct dmub_diagnostic_data {336uint32_t dmcub_version;337uint32_t scratch[17];338uint32_t pc[DMUB_PC_SNAPSHOT_COUNT];339uint32_t undefined_address_fault_addr;340uint32_t inst_fetch_fault_addr;341uint32_t data_write_fault_addr;342uint32_t inbox1_rptr;343uint32_t inbox1_wptr;344uint32_t inbox1_size;345uint32_t inbox0_rptr;346uint32_t inbox0_wptr;347uint32_t inbox0_size;348uint32_t outbox1_rptr;349uint32_t outbox1_wptr;350uint32_t outbox1_size;351uint32_t gpint_datain0;352struct dmub_timeout_info timeout_info;353uint8_t is_dmcub_enabled : 1;354uint8_t is_dmcub_soft_reset : 1;355uint8_t is_dmcub_secure_reset : 1;356uint8_t is_traceport_en : 1;357uint8_t is_cw0_enabled : 1;358uint8_t is_cw6_enabled : 1;359uint8_t is_pwait : 1;360};361362struct dmub_srv_inbox {363/* generic status */364uint64_t num_submitted;365uint64_t num_reported;366union {367/* frame buffer mailbox status */368struct dmub_rb rb;369/* register mailbox status */370struct {371bool is_pending;372bool is_multi_pending;373};374};375};376377/**378* struct dmub_srv_base_funcs - Driver specific base callbacks379*/380struct dmub_srv_base_funcs {381/**382* @reg_read:383*384* Hook for reading a register.385*386* Return: The 32-bit register value from the given address.387*/388uint32_t (*reg_read)(void *ctx, uint32_t address);389390/**391* @reg_write:392*393* Hook for writing a value to the register specified by address.394*/395void (*reg_write)(void *ctx, uint32_t address, uint32_t value);396};397398/**399* struct dmub_srv_hw_funcs - hardware sequencer funcs for dmub400*/401struct dmub_srv_hw_funcs {402/* private: internal use only */403404void (*init)(struct dmub_srv *dmub);405406void (*reset)(struct dmub_srv *dmub);407408void (*reset_release)(struct dmub_srv *dmub);409410void (*backdoor_load)(struct dmub_srv *dmub,411const struct dmub_window *cw0,412const struct dmub_window *cw1);413414void (*backdoor_load_zfb_mode)(struct dmub_srv *dmub,415const struct dmub_window *cw0,416const struct dmub_window *cw1);417void (*setup_windows)(struct dmub_srv *dmub,418const struct dmub_window *cw2,419const struct dmub_window *cw3,420const struct dmub_window *cw4,421const struct dmub_window *cw5,422const struct dmub_window *cw6,423const struct dmub_window *region6);424425void (*setup_mailbox)(struct dmub_srv *dmub,426const struct dmub_region *inbox1);427428uint32_t (*get_inbox1_wptr)(struct dmub_srv *dmub);429430uint32_t (*get_inbox1_rptr)(struct dmub_srv *dmub);431432void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);433434void (*setup_out_mailbox)(struct dmub_srv *dmub,435const struct dmub_region *outbox1);436437uint32_t (*get_outbox1_wptr)(struct dmub_srv *dmub);438439void (*set_outbox1_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);440441void (*setup_outbox0)(struct dmub_srv *dmub,442const struct dmub_region *outbox0);443444uint32_t (*get_outbox0_wptr)(struct dmub_srv *dmub);445446void (*set_outbox0_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);447448uint32_t (*emul_get_inbox1_rptr)(struct dmub_srv *dmub);449450uint32_t (*emul_get_inbox1_wptr)(struct dmub_srv *dmub);451452void (*emul_set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);453454bool (*is_supported)(struct dmub_srv *dmub);455456bool (*is_psrsu_supported)(struct dmub_srv *dmub);457458bool (*is_hw_init)(struct dmub_srv *dmub);459bool (*is_hw_powered_up)(struct dmub_srv *dmub);460461void (*enable_dmub_boot_options)(struct dmub_srv *dmub,462const struct dmub_srv_hw_params *params);463464void (*skip_dmub_panel_power_sequence)(struct dmub_srv *dmub, bool skip);465466union dmub_fw_boot_status (*get_fw_status)(struct dmub_srv *dmub);467468union dmub_fw_boot_options (*get_fw_boot_option)(struct dmub_srv *dmub);469470void (*set_gpint)(struct dmub_srv *dmub,471union dmub_gpint_data_register reg);472473bool (*is_gpint_acked)(struct dmub_srv *dmub,474union dmub_gpint_data_register reg);475476uint32_t (*get_gpint_response)(struct dmub_srv *dmub);477478uint32_t (*get_gpint_dataout)(struct dmub_srv *dmub);479480void (*configure_dmub_in_system_memory)(struct dmub_srv *dmub);481void (*clear_inbox0_ack_register)(struct dmub_srv *dmub);482uint32_t (*read_inbox0_ack_register)(struct dmub_srv *dmub);483void (*send_inbox0_cmd)(struct dmub_srv *dmub, union dmub_inbox0_data_register data);484uint32_t (*get_current_time)(struct dmub_srv *dmub);485486void (*get_diagnostic_data)(struct dmub_srv *dmub);487488bool (*should_detect)(struct dmub_srv *dmub);489void (*init_reg_offsets)(struct dmub_srv *dmub, struct dc_context *ctx);490491void (*subvp_save_surf_addr)(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);492493void (*send_reg_inbox0_cmd_msg)(struct dmub_srv *dmub,494union dmub_rb_cmd *cmd);495uint32_t (*read_reg_inbox0_rsp_int_status)(struct dmub_srv *dmub);496void (*read_reg_inbox0_cmd_rsp)(struct dmub_srv *dmub,497union dmub_rb_cmd *cmd);498void (*write_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub);499void (*clear_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub);500void (*enable_reg_inbox0_rsp_int)(struct dmub_srv *dmub, bool enable);501502uint32_t (*read_reg_outbox0_rdy_int_status)(struct dmub_srv *dmub);503void (*write_reg_outbox0_rdy_int_ack)(struct dmub_srv *dmub);504void (*read_reg_outbox0_msg)(struct dmub_srv *dmub, uint32_t *msg);505void (*write_reg_outbox0_rsp)(struct dmub_srv *dmub, uint32_t *rsp);506uint32_t (*read_reg_outbox0_rsp_int_status)(struct dmub_srv *dmub);507void (*enable_reg_outbox0_rdy_int)(struct dmub_srv *dmub, bool enable);508};509510/**511* struct dmub_srv_create_params - params for dmub service creation512* @base_funcs: driver supplied base routines513* @hw_funcs: optional overrides for hw funcs514* @user_ctx: context data for callback funcs515* @asic: driver supplied asic516* @fw_version: the current firmware version, if any517* @is_virtual: false for hw support only518*/519struct dmub_srv_create_params {520struct dmub_srv_base_funcs funcs;521struct dmub_srv_hw_funcs *hw_funcs;522void *user_ctx;523enum dmub_asic asic;524uint32_t fw_version;525bool is_virtual;526enum dmub_inbox_cmd_interface_type inbox_type;527};528529/**530* struct dmub_srv - software state for dmcub531* @asic: dmub asic identifier532* @user_ctx: user provided context for the dmub_srv533* @fw_version: the current firmware version, if any534* @is_virtual: false if hardware support only535* @shared_state: dmub shared state between firmware and driver536* @fw_state: dmub firmware state pointer537*/538struct dmub_srv {539enum dmub_asic asic;540void *user_ctx;541uint32_t fw_version;542bool is_virtual;543struct dmub_fb scratch_mem_fb;544struct dmub_fb ib_mem_gart;545volatile struct dmub_shared_state_feature_block *shared_state;546volatile const struct dmub_fw_state *fw_state;547548/* private: internal use only */549const struct dmub_srv_common_regs *regs;550const struct dmub_srv_dcn31_regs *regs_dcn31;551struct dmub_srv_dcn32_regs *regs_dcn32;552struct dmub_srv_dcn35_regs *regs_dcn35;553const struct dmub_srv_dcn401_regs *regs_dcn401;554struct dmub_srv_base_funcs funcs;555struct dmub_srv_hw_funcs hw_funcs;556struct dmub_srv_inbox inbox1;557uint32_t inbox1_last_wptr;558struct dmub_srv_inbox reg_inbox0;559/**560* outbox1_rb is accessed without locks (dal & dc)561* and to be used only in dmub_srv_stat_get_notification()562*/563struct dmub_rb outbox1_rb;564565struct dmub_rb outbox0_rb;566567bool sw_init;568bool hw_init;569570uint64_t fb_base;571uint64_t fb_offset;572uint32_t psp_version;573574/* Feature capabilities reported by fw */575struct dmub_fw_meta_info meta_info;576struct dmub_feature_caps feature_caps;577struct dmub_visual_confirm_color visual_confirm_color;578enum dmub_inbox_cmd_interface_type inbox_type;579580enum dmub_srv_power_state_type power_state;581struct dmub_diagnostic_data debug;582struct dmub_fb lsdma_rb_fb;583};584585/**586* struct dmub_notification - dmub notification data587* @type: dmub notification type588* @link_index: link index to identify aux connection589* @result: USB4 status returned from dmub590* @pending_notification: Indicates there are other pending notifications591* @aux_reply: aux reply592* @hpd_status: hpd status593* @bw_alloc_reply: BW Allocation reply from CM/DPIA594*/595struct dmub_notification {596enum dmub_notification_type type;597uint8_t link_index;598uint8_t result;599bool pending_notification;600union {601struct aux_reply_data aux_reply;602enum dp_hpd_status hpd_status;603enum set_config_status sc_status;604struct dmub_rb_cmd_hpd_sense_notify_data hpd_sense_notify;605struct dmub_cmd_fused_request fused_request;606};607};608609/**610* DMUB firmware version helper macro - useful for checking if the version611* of a firmware to know if feature or functionality is supported or present.612*/613#define DMUB_FW_VERSION(major, minor, revision) \614((((major) & 0xFF) << 24) | (((minor) & 0xFF) << 16) | (((revision) & 0xFF) << 8))615616/**617* dmub_srv_create() - creates the DMUB service.618* @dmub: the dmub service619* @params: creation parameters for the service620*621* Return:622* DMUB_STATUS_OK - success623* DMUB_STATUS_INVALID - unspecified error624*/625enum dmub_status dmub_srv_create(struct dmub_srv *dmub,626const struct dmub_srv_create_params *params);627628/**629* dmub_srv_destroy() - destroys the DMUB service.630* @dmub: the dmub service631*/632void dmub_srv_destroy(struct dmub_srv *dmub);633634/**635* dmub_srv_calc_region_info() - retreives region info from the dmub service636* @dmub: the dmub service637* @params: parameters used to calculate region locations638* @info_out: the output region info from dmub639*640* Calculates the base and top address for all relevant dmub regions641* using the parameters given (if any).642*643* Return:644* DMUB_STATUS_OK - success645* DMUB_STATUS_INVALID - unspecified error646*/647enum dmub_status648dmub_srv_calc_region_info(struct dmub_srv *dmub,649const struct dmub_srv_region_params *params,650struct dmub_srv_region_info *out);651652/**653* dmub_srv_calc_region_info() - retreives fb info from the dmub service654* @dmub: the dmub service655* @params: parameters used to calculate fb locations656* @info_out: the output fb info from dmub657*658* Calculates the base and top address for all relevant dmub regions659* using the parameters given (if any).660*661* Return:662* DMUB_STATUS_OK - success663* DMUB_STATUS_INVALID - unspecified error664*/665enum dmub_status dmub_srv_calc_mem_info(struct dmub_srv *dmub,666const struct dmub_srv_memory_params *params,667struct dmub_srv_fb_info *out);668669/**670* dmub_srv_has_hw_support() - returns hw support state for dmcub671* @dmub: the dmub service672* @is_supported: hw support state673*674* Queries the hardware for DMCUB support and returns the result.675*676* Can be called before dmub_srv_hw_init().677*678* Return:679* DMUB_STATUS_OK - success680* DMUB_STATUS_INVALID - unspecified error681*/682enum dmub_status dmub_srv_has_hw_support(struct dmub_srv *dmub,683bool *is_supported);684685/**686* dmub_srv_is_hw_init() - returns hardware init state687*688* Return:689* DMUB_STATUS_OK - success690* DMUB_STATUS_INVALID - unspecified error691*/692enum dmub_status dmub_srv_is_hw_init(struct dmub_srv *dmub, bool *is_hw_init);693694/**695* dmub_srv_hw_init() - initializes the underlying DMUB hardware696* @dmub: the dmub service697* @params: params for hardware initialization698*699* Resets the DMUB hardware and performs backdoor loading of the700* required cache regions based on the input framebuffer regions.701*702* Return:703* DMUB_STATUS_OK - success704* DMUB_STATUS_NO_CTX - dmcub context not initialized705* DMUB_STATUS_INVALID - unspecified error706*/707enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub,708const struct dmub_srv_hw_params *params);709710/**711* dmub_srv_hw_reset() - puts the DMUB hardware in reset state if initialized712* @dmub: the dmub service713*714* Before destroying the DMUB service or releasing the backing framebuffer715* memory we'll need to put the DMCUB into reset first.716*717* A subsequent call to dmub_srv_hw_init() will re-enable the DMCUB.718*719* Return:720* DMUB_STATUS_OK - success721* DMUB_STATUS_INVALID - unspecified error722*/723enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub);724725/**726* dmub_srv_fb_cmd_queue() - queues a command to the DMUB727* @dmub: the dmub service728* @cmd: the command to queue729*730* Queues a command to the DMUB service but does not begin execution731* immediately.732*733* Return:734* DMUB_STATUS_OK - success735* DMUB_STATUS_QUEUE_FULL - no remaining room in queue736* DMUB_STATUS_INVALID - unspecified error737*/738enum dmub_status dmub_srv_fb_cmd_queue(struct dmub_srv *dmub,739const union dmub_rb_cmd *cmd);740741/**742* dmub_srv_fb_cmd_execute() - Executes a queued sequence to the dmub743* @dmub: the dmub service744*745* Begins execution of queued commands on the dmub.746*747* Return:748* DMUB_STATUS_OK - success749* DMUB_STATUS_INVALID - unspecified error750*/751enum dmub_status dmub_srv_fb_cmd_execute(struct dmub_srv *dmub);752753/**754* dmub_srv_wait_for_hw_pwr_up() - Waits for firmware hardware power up is completed755* @dmub: the dmub service756* @timeout_us: the maximum number of microseconds to wait757*758* Waits until firmware hardware is powered up. The maximum759* wait time is given in microseconds to prevent spinning forever.760*761* Return:762* DMUB_STATUS_OK - success763* DMUB_STATUS_TIMEOUT - timed out764* DMUB_STATUS_INVALID - unspecified error765*/766enum dmub_status dmub_srv_wait_for_hw_pwr_up(struct dmub_srv *dmub,767uint32_t timeout_us);768769bool dmub_srv_is_hw_pwr_up(struct dmub_srv *dmub);770771/**772* dmub_srv_wait_for_auto_load() - Waits for firmware auto load to complete773* @dmub: the dmub service774* @timeout_us: the maximum number of microseconds to wait775*776* Waits until firmware has been autoloaded by the DMCUB. The maximum777* wait time is given in microseconds to prevent spinning forever.778*779* On ASICs without firmware autoload support this function will return780* immediately.781*782* Return:783* DMUB_STATUS_OK - success784* DMUB_STATUS_TIMEOUT - wait for phy init timed out785* DMUB_STATUS_INVALID - unspecified error786*/787enum dmub_status dmub_srv_wait_for_auto_load(struct dmub_srv *dmub,788uint32_t timeout_us);789790/**791* dmub_srv_wait_for_phy_init() - Waits for DMUB PHY init to complete792* @dmub: the dmub service793* @timeout_us: the maximum number of microseconds to wait794*795* Waits until the PHY has been initialized by the DMUB. The maximum796* wait time is given in microseconds to prevent spinning forever.797*798* On ASICs without PHY init support this function will return799* immediately.800*801* Return:802* DMUB_STATUS_OK - success803* DMUB_STATUS_TIMEOUT - wait for phy init timed out804* DMUB_STATUS_INVALID - unspecified error805*/806enum dmub_status dmub_srv_wait_for_phy_init(struct dmub_srv *dmub,807uint32_t timeout_us);808809/**810* dmub_srv_wait_for_pending() - Re-entrant wait for messages currently pending811* @dmub: the dmub service812* @timeout_us: the maximum number of microseconds to wait813*814* Waits until the commands queued prior to this call are complete.815* If interfaces remain busy due to additional work being submitted816* concurrently, this function will not continue to wait.817*818* Return:819* DMUB_STATUS_OK - success820* DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out821* DMUB_STATUS_INVALID - unspecified error822*/823enum dmub_status dmub_srv_wait_for_pending(struct dmub_srv *dmub,824uint32_t timeout_us);825826/**827* dmub_srv_wait_for_idle() - Waits for the DMUB to be idle828* @dmub: the dmub service829* @timeout_us: the maximum number of microseconds to wait830*831* Waits until the DMUB buffer is empty and all commands have832* finished processing. The maximum wait time is given in833* microseconds to prevent spinning forever.834*835* Return:836* DMUB_STATUS_OK - success837* DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out838* DMUB_STATUS_INVALID - unspecified error839*/840enum dmub_status dmub_srv_wait_for_idle(struct dmub_srv *dmub,841uint32_t timeout_us);842843/**844* dmub_srv_send_gpint_command() - Sends a GPINT based command.845* @dmub: the dmub service846* @command_code: the command code to send847* @param: the command parameter to send848* @timeout_us: the maximum number of microseconds to wait849*850* Sends a command via the general purpose interrupt (GPINT).851* Waits for the number of microseconds specified by timeout_us852* for the command ACK before returning.853*854* Can be called after software initialization.855*856* Return:857* DMUB_STATUS_OK - success858* DMUB_STATUS_TIMEOUT - wait for ACK timed out859* DMUB_STATUS_INVALID - unspecified error860*/861enum dmub_status862dmub_srv_send_gpint_command(struct dmub_srv *dmub,863enum dmub_gpint_command command_code,864uint16_t param, uint32_t timeout_us);865866/**867* dmub_srv_get_gpint_response() - Queries the GPINT response.868* @dmub: the dmub service869* @response: the response for the last GPINT870*871* Returns the response code for the last GPINT interrupt.872*873* Can be called after software initialization.874*875* Return:876* DMUB_STATUS_OK - success877* DMUB_STATUS_INVALID - unspecified error878*/879enum dmub_status dmub_srv_get_gpint_response(struct dmub_srv *dmub,880uint32_t *response);881882/**883* dmub_srv_get_gpint_dataout() - Queries the GPINT DATAOUT.884* @dmub: the dmub service885* @dataout: the data for the GPINT DATAOUT886*887* Returns the response code for the last GPINT DATAOUT interrupt.888*889* Can be called after software initialization.890*891* Return:892* DMUB_STATUS_OK - success893* DMUB_STATUS_INVALID - unspecified error894*/895enum dmub_status dmub_srv_get_gpint_dataout(struct dmub_srv *dmub,896uint32_t *dataout);897898/**899* dmub_flush_buffer_mem() - Read back entire frame buffer region.900* This ensures that the write from x86 has been flushed and will not901* hang the DMCUB.902* @fb: frame buffer to flush903*904* Can be called after software initialization.905*/906void dmub_flush_buffer_mem(const struct dmub_fb *fb);907908/**909* dmub_srv_get_fw_boot_status() - Returns the DMUB boot status bits.910*911* @dmub: the dmub service912* @status: out pointer for firmware status913*914* Return:915* DMUB_STATUS_OK - success916* DMUB_STATUS_INVALID - unspecified error, unsupported917*/918enum dmub_status dmub_srv_get_fw_boot_status(struct dmub_srv *dmub,919union dmub_fw_boot_status *status);920921enum dmub_status dmub_srv_get_fw_boot_option(struct dmub_srv *dmub,922union dmub_fw_boot_options *option);923924enum dmub_status dmub_srv_set_skip_panel_power_sequence(struct dmub_srv *dmub,925bool skip);926927bool dmub_srv_get_outbox0_msg(struct dmub_srv *dmub, struct dmcub_trace_buf_entry *entry);928929bool dmub_srv_get_diagnostic_data(struct dmub_srv *dmub);930931bool dmub_srv_should_detect(struct dmub_srv *dmub);932933/**934* dmub_srv_send_inbox0_cmd() - Send command to DMUB using INBOX0935* @dmub: the dmub service936* @data: the data to be sent in the INBOX0 command937*938* Send command by writing directly to INBOX0 WPTR939*940* Return:941* DMUB_STATUS_OK - success942* DMUB_STATUS_INVALID - hw_init false or hw function does not exist943*/944enum dmub_status dmub_srv_send_inbox0_cmd(struct dmub_srv *dmub, union dmub_inbox0_data_register data);945946/**947* dmub_srv_wait_for_inbox0_ack() - wait for DMUB to ACK INBOX0 command948* @dmub: the dmub service949* @timeout_us: the maximum number of microseconds to wait950*951* Wait for DMUB to ACK the INBOX0 message952*953* Return:954* DMUB_STATUS_OK - success955* DMUB_STATUS_INVALID - hw_init false or hw function does not exist956* DMUB_STATUS_TIMEOUT - wait for ack timed out957*/958enum dmub_status dmub_srv_wait_for_inbox0_ack(struct dmub_srv *dmub, uint32_t timeout_us);959960/**961* dmub_srv_wait_for_inbox0_ack() - clear ACK register for INBOX0962* @dmub: the dmub service963*964* Clear ACK register for INBOX0965*966* Return:967* DMUB_STATUS_OK - success968* DMUB_STATUS_INVALID - hw_init false or hw function does not exist969*/970enum dmub_status dmub_srv_clear_inbox0_ack(struct dmub_srv *dmub);971972/**973* dmub_srv_subvp_save_surf_addr() - Save primary and meta address for subvp on each flip974* @dmub: The dmub service975* @addr: The surface address to be programmed on the current flip976* @subvp_index: Index of subvp pipe, indicates which subvp pipe the address should be saved for977*978* Function to save the surface flip addr into scratch registers. This is to fix a race condition979* between FW and driver reading / writing to the surface address at the same time. This is980* required because there is no EARLIEST_IN_USE_META.981*982* Return:983* void984*/985void dmub_srv_subvp_save_surf_addr(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);986987/**988* dmub_srv_set_power_state() - Track DC power state in dmub_srv989* @dmub: The dmub service990* @power_state: DC power state setting991*992* Store DC power state in dmub_srv. If dmub_srv is in D3, then don't send messages to DMUB993*994* Return:995* void996*/997void dmub_srv_set_power_state(struct dmub_srv *dmub, enum dmub_srv_power_state_type dmub_srv_power_state);998999/**1000* dmub_srv_reg_cmd_execute() - Executes provided command to the dmub1001* @dmub: the dmub service1002* @cmd: the command packet to be executed1003*1004* Executes a single command for the dmub.1005*1006* Return:1007* DMUB_STATUS_OK - success1008* DMUB_STATUS_INVALID - unspecified error1009*/1010enum dmub_status dmub_srv_reg_cmd_execute(struct dmub_srv *dmub, union dmub_rb_cmd *cmd);101110121013/**1014* dmub_srv_cmd_get_response() - Copies return data for command into buffer1015* @dmub: the dmub service1016* @cmd_rsp: response buffer1017*1018* Copies return data for command into buffer1019*/1020void dmub_srv_cmd_get_response(struct dmub_srv *dmub,1021union dmub_rb_cmd *cmd_rsp);10221023/**1024* dmub_srv_sync_inboxes() - Sync inbox state1025* @dmub: the dmub service1026*1027* Sync inbox state1028*1029* Return:1030* DMUB_STATUS_OK - success1031* DMUB_STATUS_INVALID - unspecified error1032*/1033enum dmub_status dmub_srv_sync_inboxes(struct dmub_srv *dmub);10341035/**1036* dmub_srv_wait_for_inbox_free() - Waits for space in the DMUB inbox to free up1037* @dmub: the dmub service1038* @timeout_us: the maximum number of microseconds to wait1039* @num_free_required: number of free entries required1040*1041* Waits until the DMUB buffer is freed to the specified number.1042* The maximum wait time is given in microseconds to prevent spinning1043* forever.1044*1045* Return:1046* DMUB_STATUS_OK - success1047* DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out1048* DMUB_STATUS_INVALID - unspecified error1049*/1050enum dmub_status dmub_srv_wait_for_inbox_free(struct dmub_srv *dmub,1051uint32_t timeout_us,1052uint32_t num_free_required);10531054/**1055* dmub_srv_update_inbox_status() - Updates pending status for inbox & reg inbox01056* @dmub: the dmub service1057*1058* Return:1059* DMUB_STATUS_OK - success1060* DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out1061* DMUB_STATUS_HW_FAILURE - issue with HW programming1062* DMUB_STATUS_INVALID - unspecified error1063*/1064enum dmub_status dmub_srv_update_inbox_status(struct dmub_srv *dmub);10651066#endif /* _DMUB_SRV_H_ */106710681069