Path: blob/master/drivers/gpu/drm/amd/pm/powerplay/inc/smumgr.h
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/*1* Copyright 2015 Advanced Micro Devices, Inc.2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice shall be included in11* all copies or substantial portions of the Software.12*13* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR14* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,15* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL16* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR17* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,18* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR19* OTHER DEALINGS IN THE SOFTWARE.20*21*/22#ifndef _SMUMGR_H_23#define _SMUMGR_H_24#include <linux/types.h>25#include "amd_powerplay.h"26#include "hwmgr.h"2728enum SMU_TABLE {29SMU_UVD_TABLE = 0,30SMU_VCE_TABLE,31SMU_BIF_TABLE,32};3334enum SMU_TYPE {35SMU_SoftRegisters = 0,36SMU_Discrete_DpmTable,37};3839enum SMU_MEMBER {40HandshakeDisables = 0,41VoltageChangeTimeout,42AverageGraphicsActivity,43AverageMemoryActivity,44PreVBlankGap,45VBlankTimeout,46UcodeLoadStatus,47UvdBootLevel,48VceBootLevel,49LowSclkInterruptThreshold,50DRAM_LOG_ADDR_H,51DRAM_LOG_ADDR_L,52DRAM_LOG_PHY_ADDR_H,53DRAM_LOG_PHY_ADDR_L,54DRAM_LOG_BUFF_SIZE,55};565758enum SMU_MAC_DEFINITION {59SMU_MAX_LEVELS_GRAPHICS = 0,60SMU_MAX_LEVELS_MEMORY,61SMU_MAX_LEVELS_LINK,62SMU_MAX_ENTRIES_SMIO,63SMU_MAX_LEVELS_VDDC,64SMU_MAX_LEVELS_VDDGFX,65SMU_MAX_LEVELS_VDDCI,66SMU_MAX_LEVELS_MVDD,67SMU_UVD_MCLK_HANDSHAKE_DISABLE,68};6970enum SMU9_TABLE_ID {71PPTABLE = 0,72WMTABLE,73AVFSTABLE,74TOOLSTABLE,75AVFSFUSETABLE76};7778enum SMU10_TABLE_ID {79SMU10_WMTABLE = 0,80SMU10_CLOCKTABLE,81};8283extern int smum_download_powerplay_table(struct pp_hwmgr *hwmgr, void **table);8485extern int smum_upload_powerplay_table(struct pp_hwmgr *hwmgr);8687extern int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg, uint32_t *resp);8889extern int smum_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,90uint16_t msg, uint32_t parameter,91uint32_t *resp);9293extern int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr);9495extern int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type);96extern int smum_process_firmware_header(struct pp_hwmgr *hwmgr);97extern int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr);98extern int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr);99extern int smum_init_smc_table(struct pp_hwmgr *hwmgr);100extern int smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr);101extern int smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr);102extern int smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr);103extern uint32_t smum_get_offsetof(struct pp_hwmgr *hwmgr,104uint32_t type, uint32_t member);105extern uint32_t smum_get_mac_definition(struct pp_hwmgr *hwmgr, uint32_t value);106107extern bool smum_is_dpm_running(struct pp_hwmgr *hwmgr);108109extern bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr);110111extern int smum_update_dpm_settings(struct pp_hwmgr *hwmgr, void *profile_setting);112113extern int smum_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw);114115extern int smum_stop_smc(struct pp_hwmgr *hwmgr);116117#endif118119120