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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* (C) COPYRIGHT 2018 ARM Limited. All rights reserved.
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* Author: James.Qian.Wang <[email protected]>
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*
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*/
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#ifndef _KOMEDA_PIPELINE_H_
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#define _KOMEDA_PIPELINE_H_
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#include <linux/types.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include "malidp_utils.h"
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#include "komeda_color_mgmt.h"
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#define KOMEDA_MAX_PIPELINES 2
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#define KOMEDA_PIPELINE_MAX_LAYERS 4
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#define KOMEDA_PIPELINE_MAX_SCALERS 2
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#define KOMEDA_COMPONENT_N_INPUTS 5
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/* pipeline component IDs */
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enum {
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KOMEDA_COMPONENT_LAYER0 = 0,
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KOMEDA_COMPONENT_LAYER1 = 1,
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KOMEDA_COMPONENT_LAYER2 = 2,
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KOMEDA_COMPONENT_LAYER3 = 3,
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KOMEDA_COMPONENT_WB_LAYER = 7, /* write back layer */
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KOMEDA_COMPONENT_SCALER0 = 8,
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KOMEDA_COMPONENT_SCALER1 = 9,
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KOMEDA_COMPONENT_SPLITTER = 12,
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KOMEDA_COMPONENT_MERGER = 14,
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KOMEDA_COMPONENT_COMPIZ0 = 16, /* compositor */
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KOMEDA_COMPONENT_COMPIZ1 = 17,
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KOMEDA_COMPONENT_IPS0 = 20, /* post image processor */
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KOMEDA_COMPONENT_IPS1 = 21,
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KOMEDA_COMPONENT_TIMING_CTRLR = 22, /* timing controller */
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};
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#define KOMEDA_PIPELINE_LAYERS (BIT(KOMEDA_COMPONENT_LAYER0) |\
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BIT(KOMEDA_COMPONENT_LAYER1) |\
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BIT(KOMEDA_COMPONENT_LAYER2) |\
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BIT(KOMEDA_COMPONENT_LAYER3))
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#define KOMEDA_PIPELINE_SCALERS (BIT(KOMEDA_COMPONENT_SCALER0) |\
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BIT(KOMEDA_COMPONENT_SCALER1))
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#define KOMEDA_PIPELINE_COMPIZS (BIT(KOMEDA_COMPONENT_COMPIZ0) |\
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BIT(KOMEDA_COMPONENT_COMPIZ1))
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#define KOMEDA_PIPELINE_IMPROCS (BIT(KOMEDA_COMPONENT_IPS0) |\
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BIT(KOMEDA_COMPONENT_IPS1))
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struct komeda_component;
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struct komeda_component_state;
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/** komeda_component_funcs - component control functions */
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struct komeda_component_funcs {
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/** @validate: optional,
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* component may has special requirements or limitations, this function
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* supply HW the ability to do the further HW specific check.
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*/
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int (*validate)(struct komeda_component *c,
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struct komeda_component_state *state);
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/** @update: update is a active update */
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void (*update)(struct komeda_component *c,
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struct komeda_component_state *state);
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/** @disable: disable component */
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void (*disable)(struct komeda_component *c);
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/** @dump_register: Optional, dump registers to seq_file */
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void (*dump_register)(struct komeda_component *c, struct seq_file *seq);
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};
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/**
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* struct komeda_component
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*
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* struct komeda_component describe the data flow capabilities for how to link a
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* component into the display pipeline.
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* all specified components are subclass of this structure.
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*/
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struct komeda_component {
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/** @obj: treat component as private obj */
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struct drm_private_obj obj;
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/** @pipeline: the komeda pipeline this component belongs to */
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struct komeda_pipeline *pipeline;
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/** @name: component name */
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char name[32];
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/**
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* @reg:
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* component register base,
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* which is initialized by chip and used by chip only
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*/
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u32 __iomem *reg;
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/** @id: component id */
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u32 id;
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/**
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* @hw_id: component hw id,
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* which is initialized by chip and used by chip only
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*/
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u32 hw_id;
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/**
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* @max_active_inputs:
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* @max_active_outputs:
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*
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* maximum number of inputs/outputs that can be active at the same time
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* Note:
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* the number isn't the bit number of @supported_inputs or
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* @supported_outputs, but may be less than it, since component may not
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* support enabling all @supported_inputs/outputs at the same time.
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*/
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u8 max_active_inputs;
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/** @max_active_outputs: maximum number of outputs */
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u8 max_active_outputs;
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/**
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* @supported_inputs:
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* @supported_outputs:
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*
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* bitmask of BIT(component->id) for the supported inputs/outputs,
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* describes the possibilities of how a component is linked into a
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* pipeline.
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*/
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u32 supported_inputs;
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/** @supported_outputs: bitmask of supported output componenet ids */
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u32 supported_outputs;
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/**
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* @funcs: chip functions to access HW
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*/
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const struct komeda_component_funcs *funcs;
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};
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/**
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* struct komeda_component_output
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*
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* a component has multiple outputs, if want to know where the data
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* comes from, only know the component is not enough, we still need to know
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* its output port
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*/
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struct komeda_component_output {
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/** @component: indicate which component the data comes from */
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struct komeda_component *component;
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/**
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* @output_port:
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* the output port of the &komeda_component_output.component
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*/
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u8 output_port;
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};
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/**
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* struct komeda_component_state
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*
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* component_state is the data flow configuration of the component, and it's
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* the superclass of all specific component_state like @komeda_layer_state,
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* @komeda_scaler_state
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*/
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struct komeda_component_state {
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/** @obj: tracking component_state by drm_atomic_state */
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struct drm_private_state obj;
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/** @component: backpointer to the component */
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struct komeda_component *component;
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/**
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* @binding_user:
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* currently bound user, the user can be @crtc, @plane or @wb_conn,
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* which is valid decided by @component and @inputs
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*
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* - Layer: its user always is plane.
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* - compiz/improc/timing_ctrlr: the user is crtc.
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* - wb_layer: wb_conn;
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* - scaler: plane when input is layer, wb_conn if input is compiz.
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*/
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union {
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/** @crtc: backpointer for user crtc */
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struct drm_crtc *crtc;
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/** @plane: backpointer for user plane */
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struct drm_plane *plane;
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/** @wb_conn: backpointer for user wb_connector */
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struct drm_connector *wb_conn;
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void *binding_user;
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};
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/**
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* @active_inputs:
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*
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* active_inputs is bitmask of @inputs index
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*
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* - active_inputs = changed_active_inputs | unchanged_active_inputs
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* - affected_inputs = old->active_inputs | new->active_inputs;
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* - disabling_inputs = affected_inputs ^ active_inputs;
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* - changed_inputs = disabling_inputs | changed_active_inputs;
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*
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* NOTE:
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* changed_inputs doesn't include all active_input but only
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* @changed_active_inputs, and this bitmask can be used in chip
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* level for dirty update.
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*/
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u16 active_inputs;
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/** @changed_active_inputs: bitmask of the changed @active_inputs */
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u16 changed_active_inputs;
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/** @affected_inputs: bitmask for affected @inputs */
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u16 affected_inputs;
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/**
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* @inputs:
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*
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* the specific inputs[i] only valid on BIT(i) has been set in
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* @active_inputs, if not the inputs[i] is undefined.
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*/
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struct komeda_component_output inputs[KOMEDA_COMPONENT_N_INPUTS];
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};
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static inline u16 component_disabling_inputs(struct komeda_component_state *st)
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{
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return st->affected_inputs ^ st->active_inputs;
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}
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static inline u16 component_changed_inputs(struct komeda_component_state *st)
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{
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return component_disabling_inputs(st) | st->changed_active_inputs;
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}
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#define for_each_changed_input(st, i) \
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for ((i) = 0; (i) < (st)->component->max_active_inputs; (i)++) \
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if (has_bit((i), component_changed_inputs(st)))
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#define to_comp(__c) (((__c) == NULL) ? NULL : &((__c)->base))
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#define to_cpos(__c) ((struct komeda_component **)&(__c))
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struct komeda_layer {
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struct komeda_component base;
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/* accepted h/v input range before rotation */
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struct malidp_range hsize_in, vsize_in;
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u32 layer_type; /* RICH, SIMPLE or WB */
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u32 line_sz;
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u32 yuv_line_sz; /* maximum line size for YUV422 and YUV420 */
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u32 supported_rots;
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/* komeda supports layer split which splits a whole image to two parts
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* left and right and handle them by two individual layer processors
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* Note: left/right are always according to the final display rect,
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* not the source buffer.
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*/
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struct komeda_layer *right;
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};
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struct komeda_layer_state {
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struct komeda_component_state base;
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/* layer specific configuration state */
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u16 hsize, vsize;
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u32 rot;
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u16 afbc_crop_l;
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u16 afbc_crop_r;
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u16 afbc_crop_t;
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u16 afbc_crop_b;
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dma_addr_t addr[3];
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};
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struct komeda_scaler {
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struct komeda_component base;
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struct malidp_range hsize, vsize;
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u32 max_upscaling;
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u32 max_downscaling;
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u8 scaling_split_overlap; /* split overlap for scaling */
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u8 enh_split_overlap; /* split overlap for image enhancement */
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};
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struct komeda_scaler_state {
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struct komeda_component_state base;
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u16 hsize_in, vsize_in;
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u16 hsize_out, vsize_out;
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u16 total_hsize_in, total_vsize_in;
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u16 total_hsize_out; /* total_xxxx are size before split */
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u16 left_crop, right_crop;
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u8 en_scaling : 1,
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en_alpha : 1, /* enable alpha processing */
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en_img_enhancement : 1,
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en_split : 1,
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right_part : 1; /* right part of split image */
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};
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struct komeda_compiz {
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struct komeda_component base;
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struct malidp_range hsize, vsize;
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};
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struct komeda_compiz_input_cfg {
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u16 hsize, vsize;
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u16 hoffset, voffset;
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u8 pixel_blend_mode, layer_alpha;
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};
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struct komeda_compiz_state {
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struct komeda_component_state base;
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/* composition size */
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u16 hsize, vsize;
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struct komeda_compiz_input_cfg cins[KOMEDA_COMPONENT_N_INPUTS];
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};
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struct komeda_merger {
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struct komeda_component base;
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struct malidp_range hsize_merged;
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struct malidp_range vsize_merged;
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};
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struct komeda_merger_state {
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struct komeda_component_state base;
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u16 hsize_merged;
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u16 vsize_merged;
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};
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struct komeda_splitter {
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struct komeda_component base;
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struct malidp_range hsize, vsize;
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};
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struct komeda_splitter_state {
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struct komeda_component_state base;
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u16 hsize, vsize;
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u16 overlap;
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};
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struct komeda_improc {
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struct komeda_component base;
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u32 supported_color_formats; /* DRM_RGB/YUV444/YUV420*/
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u32 supported_color_depths; /* BIT(8) | BIT(10)*/
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u8 supports_degamma : 1;
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u8 supports_csc : 1;
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u8 supports_gamma : 1;
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};
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struct komeda_improc_state {
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struct komeda_component_state base;
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u8 color_format, color_depth;
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u16 hsize, vsize;
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u32 fgamma_coeffs[KOMEDA_N_GAMMA_COEFFS];
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u32 ctm_coeffs[KOMEDA_N_CTM_COEFFS];
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};
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/* display timing controller */
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struct komeda_timing_ctrlr {
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struct komeda_component base;
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u8 supports_dual_link : 1;
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};
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struct komeda_timing_ctrlr_state {
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struct komeda_component_state base;
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};
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/* Why define A separated structure but not use plane_state directly ?
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* 1. Komeda supports layer_split which means a plane_state can be split and
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* handled by two layers, one layer only handle half of plane image.
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* 2. Fix up the user properties according to HW's capabilities, like user
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* set rotation to R180, but HW only supports REFLECT_X+Y. the rot here is
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* after drm_rotation_simplify()
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*/
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struct komeda_data_flow_cfg {
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struct komeda_component_output input;
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u16 in_x, in_y, in_w, in_h;
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u32 out_x, out_y, out_w, out_h;
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u16 total_in_h, total_in_w;
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u16 total_out_w;
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u16 left_crop, right_crop, overlap;
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u32 rot;
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int blending_zorder;
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u8 pixel_blend_mode, layer_alpha;
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u8 en_scaling : 1,
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en_img_enhancement : 1,
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en_split : 1,
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is_yuv : 1,
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right_part : 1; /* right part of display image if split enabled */
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};
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struct komeda_pipeline_funcs {
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/* check if the aclk (main engine clock) can satisfy the clock
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* requirements of the downscaling that specified by dflow
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*/
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int (*downscaling_clk_check)(struct komeda_pipeline *pipe,
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struct drm_display_mode *mode,
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unsigned long aclk_rate,
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struct komeda_data_flow_cfg *dflow);
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/* dump_register: Optional, dump registers to seq_file */
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void (*dump_register)(struct komeda_pipeline *pipe,
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struct seq_file *sf);
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};
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/**
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* struct komeda_pipeline
384
*
385
* Represent a complete display pipeline and hold all functional components.
386
*/
387
struct komeda_pipeline {
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/** @obj: link pipeline as private obj of drm_atomic_state */
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struct drm_private_obj obj;
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/** @mdev: the parent komeda_dev */
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struct komeda_dev *mdev;
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/** @pxlclk: pixel clock */
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struct clk *pxlclk;
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/** @id: pipeline id */
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int id;
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/** @avail_comps: available components mask of pipeline */
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u32 avail_comps;
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/**
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* @standalone_disabled_comps:
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*
401
* When disable the pipeline, some components can not be disabled
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* together with others, but need a sparated and standalone disable.
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* The standalone_disabled_comps are the components which need to be
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* disabled standalone, and this concept also introduce concept of
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* two phase.
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* phase 1: for disabling the common components.
407
* phase 2: for disabling the standalong_disabled_comps.
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*/
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u32 standalone_disabled_comps;
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/** @n_layers: the number of layer on @layers */
411
int n_layers;
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/** @layers: the pipeline layers */
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struct komeda_layer *layers[KOMEDA_PIPELINE_MAX_LAYERS];
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/** @n_scalers: the number of scaler on @scalers */
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int n_scalers;
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/** @scalers: the pipeline scalers */
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struct komeda_scaler *scalers[KOMEDA_PIPELINE_MAX_SCALERS];
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/** @compiz: compositor */
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struct komeda_compiz *compiz;
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/** @splitter: for split the compiz output to two half data flows */
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struct komeda_splitter *splitter;
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/** @merger: merger */
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struct komeda_merger *merger;
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/** @wb_layer: writeback layer */
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struct komeda_layer *wb_layer;
426
/** @improc: post image processor */
427
struct komeda_improc *improc;
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/** @ctrlr: timing controller */
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struct komeda_timing_ctrlr *ctrlr;
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/** @funcs: chip private pipeline functions */
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const struct komeda_pipeline_funcs *funcs;
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433
/** @of_node: pipeline dt node */
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struct device_node *of_node;
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/** @of_output_port: pipeline output port */
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struct device_node *of_output_port;
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/** @of_output_links: output connector device nodes */
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struct device_node *of_output_links[2];
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/** @dual_link: true if of_output_links[0] and [1] are both valid */
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bool dual_link;
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};
442
443
/**
444
* struct komeda_pipeline_state
445
*
446
* NOTE:
447
* Unlike the pipeline, pipeline_state doesn’t gather any component_state
448
* into it. It because all component will be managed by drm_atomic_state.
449
*/
450
struct komeda_pipeline_state {
451
/** @obj: tracking pipeline_state by drm_atomic_state */
452
struct drm_private_state obj;
453
/** @pipe: backpointer to the pipeline */
454
struct komeda_pipeline *pipe;
455
/** @crtc: currently bound crtc */
456
struct drm_crtc *crtc;
457
/**
458
* @active_comps:
459
*
460
* bitmask - BIT(component->id) of active components
461
*/
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u32 active_comps;
463
};
464
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#define to_layer(c) container_of(c, struct komeda_layer, base)
466
#define to_compiz(c) container_of(c, struct komeda_compiz, base)
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#define to_scaler(c) container_of(c, struct komeda_scaler, base)
468
#define to_splitter(c) container_of(c, struct komeda_splitter, base)
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#define to_merger(c) container_of(c, struct komeda_merger, base)
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#define to_improc(c) container_of(c, struct komeda_improc, base)
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#define to_ctrlr(c) container_of(c, struct komeda_timing_ctrlr, base)
472
473
#define to_layer_st(c) container_of(c, struct komeda_layer_state, base)
474
#define to_compiz_st(c) container_of(c, struct komeda_compiz_state, base)
475
#define to_scaler_st(c) container_of(c, struct komeda_scaler_state, base)
476
#define to_splitter_st(c) container_of(c, struct komeda_splitter_state, base)
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#define to_merger_st(c) container_of(c, struct komeda_merger_state, base)
478
#define to_improc_st(c) container_of(c, struct komeda_improc_state, base)
479
#define to_ctrlr_st(c) container_of(c, struct komeda_timing_ctrlr_state, base)
480
481
#define priv_to_comp_st(o) container_of(o, struct komeda_component_state, obj)
482
#define priv_to_pipe_st(o) container_of(o, struct komeda_pipeline_state, obj)
483
484
/* pipeline APIs */
485
struct komeda_pipeline *
486
komeda_pipeline_add(struct komeda_dev *mdev, size_t size,
487
const struct komeda_pipeline_funcs *funcs);
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void komeda_pipeline_destroy(struct komeda_dev *mdev,
489
struct komeda_pipeline *pipe);
490
struct komeda_pipeline *
491
komeda_pipeline_get_slave(struct komeda_pipeline *master);
492
int komeda_assemble_pipelines(struct komeda_dev *mdev);
493
struct komeda_component *
494
komeda_pipeline_get_component(struct komeda_pipeline *pipe, int id);
495
struct komeda_component *
496
komeda_pipeline_get_first_component(struct komeda_pipeline *pipe,
497
u32 comp_mask);
498
499
void komeda_pipeline_dump_register(struct komeda_pipeline *pipe,
500
struct seq_file *sf);
501
502
/* component APIs */
503
extern __printf(10, 11)
504
struct komeda_component *
505
komeda_component_add(struct komeda_pipeline *pipe,
506
size_t comp_sz, u32 id, u32 hw_id,
507
const struct komeda_component_funcs *funcs,
508
u8 max_active_inputs, u32 supported_inputs,
509
u8 max_active_outputs, u32 __iomem *reg,
510
const char *name_fmt, ...);
511
512
void komeda_component_destroy(struct komeda_dev *mdev,
513
struct komeda_component *c);
514
515
static inline struct komeda_component *
516
komeda_component_pickup_output(struct komeda_component *c, u32 avail_comps)
517
{
518
u32 avail_inputs = c->supported_outputs & (avail_comps);
519
520
return komeda_pipeline_get_first_component(c->pipeline, avail_inputs);
521
}
522
523
struct komeda_plane_state;
524
struct komeda_crtc_state;
525
struct komeda_crtc;
526
527
void pipeline_composition_size(struct komeda_crtc_state *kcrtc_st,
528
u16 *hsize, u16 *vsize);
529
530
int komeda_build_layer_data_flow(struct komeda_layer *layer,
531
struct komeda_plane_state *kplane_st,
532
struct komeda_crtc_state *kcrtc_st,
533
struct komeda_data_flow_cfg *dflow);
534
int komeda_build_wb_data_flow(struct komeda_layer *wb_layer,
535
struct drm_connector_state *conn_st,
536
struct komeda_crtc_state *kcrtc_st,
537
struct komeda_data_flow_cfg *dflow);
538
int komeda_build_display_data_flow(struct komeda_crtc *kcrtc,
539
struct komeda_crtc_state *kcrtc_st);
540
541
int komeda_build_layer_split_data_flow(struct komeda_layer *left,
542
struct komeda_plane_state *kplane_st,
543
struct komeda_crtc_state *kcrtc_st,
544
struct komeda_data_flow_cfg *dflow);
545
int komeda_build_wb_split_data_flow(struct komeda_layer *wb_layer,
546
struct drm_connector_state *conn_st,
547
struct komeda_crtc_state *kcrtc_st,
548
struct komeda_data_flow_cfg *dflow);
549
550
int komeda_release_unclaimed_resources(struct komeda_pipeline *pipe,
551
struct komeda_crtc_state *kcrtc_st);
552
553
struct komeda_pipeline_state *
554
komeda_pipeline_get_old_state(struct komeda_pipeline *pipe,
555
struct drm_atomic_state *state);
556
bool komeda_pipeline_disable(struct komeda_pipeline *pipe,
557
struct drm_atomic_state *old_state);
558
void komeda_pipeline_update(struct komeda_pipeline *pipe,
559
struct drm_atomic_state *old_state);
560
561
void komeda_complete_data_flow_cfg(struct komeda_layer *layer,
562
struct komeda_data_flow_cfg *dflow,
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struct drm_framebuffer *fb);
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#endif /* _KOMEDA_PIPELINE_H_*/
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