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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/drivers/gpu/drm/arm/malidp_mw.c
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// SPDX-License-Identifier: GPL-2.0
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/*
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* (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
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* Author: Brian Starkey <[email protected]>
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*
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* ARM Mali DP Writeback connector implementation
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*/
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc.h>
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#include <drm/drm_edid.h>
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#include <drm/drm_fb_dma_helper.h>
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#include <drm/drm_fourcc.h>
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#include <drm/drm_framebuffer.h>
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#include <drm/drm_gem_dma_helper.h>
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#include <drm/drm_print.h>
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#include <drm/drm_probe_helper.h>
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#include <drm/drm_writeback.h>
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#include "malidp_drv.h"
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#include "malidp_hw.h"
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#include "malidp_mw.h"
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#define to_mw_state(_state) (struct malidp_mw_connector_state *)(_state)
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struct malidp_mw_connector_state {
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struct drm_connector_state base;
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dma_addr_t addrs[2];
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s32 pitches[2];
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u8 format;
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u8 n_planes;
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bool rgb2yuv_initialized;
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const s16 *rgb2yuv_coeffs;
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};
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static int malidp_mw_connector_get_modes(struct drm_connector *connector)
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{
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struct drm_device *dev = connector->dev;
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return drm_add_modes_noedid(connector, dev->mode_config.max_width,
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dev->mode_config.max_height);
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}
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static enum drm_mode_status
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malidp_mw_connector_mode_valid(struct drm_connector *connector,
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const struct drm_display_mode *mode)
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{
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struct drm_device *dev = connector->dev;
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struct drm_mode_config *mode_config = &dev->mode_config;
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int w = mode->hdisplay, h = mode->vdisplay;
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if ((w < mode_config->min_width) || (w > mode_config->max_width))
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return MODE_BAD_HVALUE;
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if ((h < mode_config->min_height) || (h > mode_config->max_height))
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return MODE_BAD_VVALUE;
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return MODE_OK;
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}
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static const struct drm_connector_helper_funcs malidp_mw_connector_helper_funcs = {
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.get_modes = malidp_mw_connector_get_modes,
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.mode_valid = malidp_mw_connector_mode_valid,
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};
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static void malidp_mw_connector_reset(struct drm_connector *connector)
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{
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struct malidp_mw_connector_state *mw_state =
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kzalloc(sizeof(*mw_state), GFP_KERNEL);
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if (connector->state)
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__drm_atomic_helper_connector_destroy_state(connector->state);
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kfree(connector->state);
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connector->state = NULL;
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if (mw_state)
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__drm_atomic_helper_connector_reset(connector, &mw_state->base);
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}
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static enum drm_connector_status
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malidp_mw_connector_detect(struct drm_connector *connector, bool force)
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{
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return connector_status_connected;
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}
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static void malidp_mw_connector_destroy(struct drm_connector *connector)
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{
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drm_connector_cleanup(connector);
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}
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static struct drm_connector_state *
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malidp_mw_connector_duplicate_state(struct drm_connector *connector)
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{
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struct malidp_mw_connector_state *mw_state, *mw_current_state;
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if (WARN_ON(!connector->state))
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return NULL;
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mw_state = kzalloc(sizeof(*mw_state), GFP_KERNEL);
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if (!mw_state)
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return NULL;
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mw_current_state = to_mw_state(connector->state);
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mw_state->rgb2yuv_coeffs = mw_current_state->rgb2yuv_coeffs;
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mw_state->rgb2yuv_initialized = mw_current_state->rgb2yuv_initialized;
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__drm_atomic_helper_connector_duplicate_state(connector, &mw_state->base);
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return &mw_state->base;
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}
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static const struct drm_connector_funcs malidp_mw_connector_funcs = {
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.reset = malidp_mw_connector_reset,
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.detect = malidp_mw_connector_detect,
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.fill_modes = drm_helper_probe_single_connector_modes,
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.destroy = malidp_mw_connector_destroy,
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.atomic_duplicate_state = malidp_mw_connector_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
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};
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static const s16 rgb2yuv_coeffs_bt709_limited[MALIDP_COLORADJ_NUM_COEFFS] = {
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47, 157, 16,
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-26, -87, 112,
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112, -102, -10,
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16, 128, 128
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};
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static int
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malidp_mw_encoder_atomic_check(struct drm_encoder *encoder,
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struct drm_crtc_state *crtc_state,
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struct drm_connector_state *conn_state)
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{
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struct malidp_mw_connector_state *mw_state = to_mw_state(conn_state);
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struct malidp_drm *malidp = drm_to_malidp(encoder->dev);
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struct drm_framebuffer *fb;
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int i, n_planes;
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if (!conn_state->writeback_job)
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return 0;
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fb = conn_state->writeback_job->fb;
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if ((fb->width != crtc_state->mode.hdisplay) ||
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(fb->height != crtc_state->mode.vdisplay)) {
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DRM_DEBUG_KMS("Invalid framebuffer size %ux%u\n",
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fb->width, fb->height);
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return -EINVAL;
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}
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if (fb->modifier) {
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DRM_DEBUG_KMS("Writeback framebuffer does not support modifiers\n");
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return -EINVAL;
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}
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mw_state->format =
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malidp_hw_get_format_id(&malidp->dev->hw->map, SE_MEMWRITE,
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fb->format->format, !!fb->modifier);
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if (mw_state->format == MALIDP_INVALID_FORMAT_ID) {
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DRM_DEBUG_KMS("Invalid pixel format %p4cc\n",
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&fb->format->format);
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return -EINVAL;
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}
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n_planes = fb->format->num_planes;
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for (i = 0; i < n_planes; i++) {
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struct drm_gem_dma_object *obj = drm_fb_dma_get_gem_obj(fb, i);
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/* memory write buffers are never rotated */
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u8 alignment = malidp_hw_get_pitch_align(malidp->dev, 0);
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if (fb->pitches[i] & (alignment - 1)) {
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DRM_DEBUG_KMS("Invalid pitch %u for plane %d\n",
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fb->pitches[i], i);
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return -EINVAL;
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}
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mw_state->pitches[i] = fb->pitches[i];
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mw_state->addrs[i] = obj->dma_addr + fb->offsets[i];
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}
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mw_state->n_planes = n_planes;
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if (fb->format->is_yuv)
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mw_state->rgb2yuv_coeffs = rgb2yuv_coeffs_bt709_limited;
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return 0;
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}
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static const struct drm_encoder_helper_funcs malidp_mw_encoder_helper_funcs = {
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.atomic_check = malidp_mw_encoder_atomic_check,
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};
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static u32 *get_writeback_formats(struct malidp_drm *malidp, int *n_formats)
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{
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const struct malidp_hw_regmap *map = &malidp->dev->hw->map;
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u32 *formats;
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int n, i;
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formats = kcalloc(map->n_pixel_formats, sizeof(*formats),
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GFP_KERNEL);
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if (!formats)
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return NULL;
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for (n = 0, i = 0; i < map->n_pixel_formats; i++) {
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if (map->pixel_formats[i].layer & SE_MEMWRITE)
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formats[n++] = map->pixel_formats[i].format;
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}
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*n_formats = n;
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return formats;
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}
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int malidp_mw_connector_init(struct drm_device *drm)
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{
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struct malidp_drm *malidp = drm_to_malidp(drm);
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u32 *formats;
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int ret, n_formats;
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if (!malidp->dev->hw->enable_memwrite)
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return 0;
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drm_connector_helper_add(&malidp->mw_connector.base,
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&malidp_mw_connector_helper_funcs);
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formats = get_writeback_formats(malidp, &n_formats);
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if (!formats)
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return -ENOMEM;
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ret = drm_writeback_connector_init(drm, &malidp->mw_connector,
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&malidp_mw_connector_funcs,
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&malidp_mw_encoder_helper_funcs,
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formats, n_formats,
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1 << drm_crtc_index(&malidp->crtc));
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kfree(formats);
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if (ret)
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return ret;
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return 0;
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}
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void malidp_mw_atomic_commit(struct drm_device *drm,
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struct drm_atomic_state *old_state)
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{
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struct malidp_drm *malidp = drm_to_malidp(drm);
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struct drm_writeback_connector *mw_conn = &malidp->mw_connector;
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struct drm_connector_state *conn_state = mw_conn->base.state;
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struct malidp_hw_device *hwdev = malidp->dev;
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struct malidp_mw_connector_state *mw_state;
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if (!conn_state)
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return;
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mw_state = to_mw_state(conn_state);
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if (conn_state->writeback_job) {
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struct drm_framebuffer *fb = conn_state->writeback_job->fb;
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DRM_DEV_DEBUG_DRIVER(drm->dev,
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"Enable memwrite %ux%u:%d %pad fmt: %u\n",
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fb->width, fb->height,
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mw_state->pitches[0],
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&mw_state->addrs[0],
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mw_state->format);
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drm_writeback_queue_job(mw_conn, conn_state);
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hwdev->hw->enable_memwrite(hwdev, mw_state->addrs,
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mw_state->pitches, mw_state->n_planes,
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fb->width, fb->height, mw_state->format,
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!mw_state->rgb2yuv_initialized ?
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mw_state->rgb2yuv_coeffs : NULL);
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mw_state->rgb2yuv_initialized = !!mw_state->rgb2yuv_coeffs;
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} else {
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DRM_DEV_DEBUG_DRIVER(drm->dev, "Disable memwrite\n");
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hwdev->hw->disable_memwrite(hwdev);
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}
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}
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