Path: blob/master/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
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// SPDX-License-Identifier: GPL-2.0+1// Copyright 2018 IBM Corporation23#include <linux/clk.h>4#include <linux/dma-mapping.h>5#include <linux/irq.h>6#include <linux/mfd/syscon.h>7#include <linux/module.h>8#include <linux/mod_devicetable.h>9#include <linux/of_reserved_mem.h>10#include <linux/platform_device.h>11#include <linux/property.h>12#include <linux/regmap.h>13#include <linux/reset.h>1415#include <drm/clients/drm_client_setup.h>16#include <drm/drm_atomic_helper.h>17#include <drm/drm_device.h>18#include <drm/drm_fbdev_dma.h>19#include <drm/drm_gem_dma_helper.h>20#include <drm/drm_gem_framebuffer_helper.h>21#include <drm/drm_module.h>22#include <drm/drm_probe_helper.h>23#include <drm/drm_simple_kms_helper.h>24#include <drm/drm_vblank.h>25#include <drm/drm_drv.h>2627#include "aspeed_gfx.h"2829/**30* DOC: ASPEED GFX Driver31*32* This driver is for the ASPEED BMC SoC's 'GFX' display hardware, also called33* the 'SOC Display Controller' in the datasheet. This driver runs on the ARM34* based BMC systems, unlike the ast driver which runs on a host CPU and is for35* a PCIe graphics device.36*37* The AST2500 supports a total of 3 output paths:38*39* 1. VGA output, the output target can choose either or both to the DAC40* or DVO interface.41*42* 2. Graphics CRT output, the output target can choose either or both to43* the DAC or DVO interface.44*45* 3. Video input from DVO, the video input can be used for video engine46* capture or DAC display output.47*48* Output options are selected in SCU2C.49*50* The "VGA mode" device is the PCI attached controller. The "Graphics CRT"51* is the ARM's internal display controller.52*53* The driver only supports a simple configuration consisting of a 40MHz54* pixel clock, fixed by hardware limitations, and the VGA output path.55*56* The driver was written with the 'AST2500 Software Programming Guide' v17,57* which is available under NDA from ASPEED.58*/5960struct aspeed_gfx_config {61u32 dac_reg; /* DAC register in SCU */62u32 int_clear_reg; /* Interrupt clear register */63u32 vga_scratch_reg; /* VGA scratch register in SCU */64u32 throd_val; /* Default Threshold Seting */65u32 scan_line_max; /* Max memory size of one scan line */66};6768static const struct aspeed_gfx_config ast2400_config = {69.dac_reg = 0x2c,70.int_clear_reg = 0x60,71.vga_scratch_reg = 0x50,72.throd_val = CRT_THROD_LOW(0x1e) | CRT_THROD_HIGH(0x12),73.scan_line_max = 64,74};7576static const struct aspeed_gfx_config ast2500_config = {77.dac_reg = 0x2c,78.int_clear_reg = 0x60,79.vga_scratch_reg = 0x50,80.throd_val = CRT_THROD_LOW(0x24) | CRT_THROD_HIGH(0x3c),81.scan_line_max = 128,82};8384static const struct aspeed_gfx_config ast2600_config = {85.dac_reg = 0xc0,86.int_clear_reg = 0x68,87.vga_scratch_reg = 0x50,88.throd_val = CRT_THROD_LOW(0x50) | CRT_THROD_HIGH(0x70),89.scan_line_max = 128,90};9192static const struct of_device_id aspeed_gfx_match[] = {93{ .compatible = "aspeed,ast2400-gfx", .data = &ast2400_config },94{ .compatible = "aspeed,ast2500-gfx", .data = &ast2500_config },95{ .compatible = "aspeed,ast2600-gfx", .data = &ast2600_config },96{ },97};98MODULE_DEVICE_TABLE(of, aspeed_gfx_match);99100static const struct drm_mode_config_funcs aspeed_gfx_mode_config_funcs = {101.fb_create = drm_gem_fb_create,102.atomic_check = drm_atomic_helper_check,103.atomic_commit = drm_atomic_helper_commit,104};105106static int aspeed_gfx_setup_mode_config(struct drm_device *drm)107{108int ret;109110ret = drmm_mode_config_init(drm);111if (ret)112return ret;113114drm->mode_config.min_width = 0;115drm->mode_config.min_height = 0;116drm->mode_config.max_width = 800;117drm->mode_config.max_height = 600;118drm->mode_config.funcs = &aspeed_gfx_mode_config_funcs;119120return ret;121}122123static irqreturn_t aspeed_gfx_irq_handler(int irq, void *data)124{125struct drm_device *drm = data;126struct aspeed_gfx *priv = to_aspeed_gfx(drm);127u32 reg;128129reg = readl(priv->base + CRT_CTRL1);130131if (reg & CRT_CTRL_VERTICAL_INTR_STS) {132drm_crtc_handle_vblank(&priv->pipe.crtc);133writel(reg, priv->base + priv->int_clr_reg);134return IRQ_HANDLED;135}136137return IRQ_NONE;138}139140static int aspeed_gfx_load(struct drm_device *drm)141{142struct platform_device *pdev = to_platform_device(drm->dev);143struct aspeed_gfx *priv = to_aspeed_gfx(drm);144struct device_node *np = pdev->dev.of_node;145const struct aspeed_gfx_config *config;146int ret;147148priv->base = devm_platform_ioremap_resource(pdev, 0);149if (IS_ERR(priv->base))150return PTR_ERR(priv->base);151152config = device_get_match_data(&pdev->dev);153if (!config)154return -EINVAL;155156priv->dac_reg = config->dac_reg;157priv->int_clr_reg = config->int_clear_reg;158priv->vga_scratch_reg = config->vga_scratch_reg;159priv->throd_val = config->throd_val;160priv->scan_line_max = config->scan_line_max;161162priv->scu = syscon_regmap_lookup_by_phandle(np, "syscon");163if (IS_ERR(priv->scu)) {164priv->scu = syscon_regmap_lookup_by_compatible("aspeed,ast2500-scu");165if (IS_ERR(priv->scu)) {166dev_err(&pdev->dev, "failed to find SCU regmap\n");167return PTR_ERR(priv->scu);168}169}170171ret = of_reserved_mem_device_init(drm->dev);172if (ret) {173dev_err(&pdev->dev,174"failed to initialize reserved mem: %d\n", ret);175return ret;176}177178ret = dma_set_mask_and_coherent(drm->dev, DMA_BIT_MASK(32));179if (ret) {180dev_err(&pdev->dev, "failed to set DMA mask: %d\n", ret);181return ret;182}183184priv->rst = devm_reset_control_get_exclusive(&pdev->dev, NULL);185if (IS_ERR(priv->rst)) {186dev_err(&pdev->dev,187"missing or invalid reset controller device tree entry");188return PTR_ERR(priv->rst);189}190reset_control_deassert(priv->rst);191192priv->clk = devm_clk_get(drm->dev, NULL);193if (IS_ERR(priv->clk)) {194dev_err(&pdev->dev,195"missing or invalid clk device tree entry");196return PTR_ERR(priv->clk);197}198clk_prepare_enable(priv->clk);199200/* Sanitize control registers */201writel(0, priv->base + CRT_CTRL1);202writel(0, priv->base + CRT_CTRL2);203204ret = aspeed_gfx_setup_mode_config(drm);205if (ret < 0)206return ret;207208ret = drm_vblank_init(drm, 1);209if (ret < 0) {210dev_err(drm->dev, "Failed to initialise vblank\n");211return ret;212}213214ret = aspeed_gfx_create_output(drm);215if (ret < 0) {216dev_err(drm->dev, "Failed to create outputs\n");217return ret;218}219220ret = aspeed_gfx_create_pipe(drm);221if (ret < 0) {222dev_err(drm->dev, "Cannot setup simple display pipe\n");223return ret;224}225226ret = devm_request_irq(drm->dev, platform_get_irq(pdev, 0),227aspeed_gfx_irq_handler, 0, "aspeed gfx", drm);228if (ret < 0) {229dev_err(drm->dev, "Failed to install IRQ handler\n");230return ret;231}232233drm_mode_config_reset(drm);234235return 0;236}237238static void aspeed_gfx_unload(struct drm_device *drm)239{240drm_kms_helper_poll_fini(drm);241}242243DEFINE_DRM_GEM_DMA_FOPS(fops);244245static const struct drm_driver aspeed_gfx_driver = {246.driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,247DRM_GEM_DMA_DRIVER_OPS,248DRM_FBDEV_DMA_DRIVER_OPS,249.fops = &fops,250.name = "aspeed-gfx-drm",251.desc = "ASPEED GFX DRM",252.major = 1,253.minor = 0,254};255256static ssize_t dac_mux_store(struct device *dev, struct device_attribute *attr,257const char *buf, size_t count)258{259struct aspeed_gfx *priv = dev_get_drvdata(dev);260u32 val;261int rc;262263rc = kstrtou32(buf, 0, &val);264if (rc)265return rc;266267if (val > 3)268return -EINVAL;269270rc = regmap_update_bits(priv->scu, priv->dac_reg, 0x30000, val << 16);271if (rc < 0)272return 0;273274return count;275}276277static ssize_t dac_mux_show(struct device *dev, struct device_attribute *attr, char *buf)278{279struct aspeed_gfx *priv = dev_get_drvdata(dev);280u32 reg;281int rc;282283rc = regmap_read(priv->scu, priv->dac_reg, ®);284if (rc)285return rc;286287return sprintf(buf, "%u\n", (reg >> 16) & 0x3);288}289static DEVICE_ATTR_RW(dac_mux);290291static ssize_t292vga_pw_show(struct device *dev, struct device_attribute *attr, char *buf)293{294struct aspeed_gfx *priv = dev_get_drvdata(dev);295u32 reg;296int rc;297298rc = regmap_read(priv->scu, priv->vga_scratch_reg, ®);299if (rc)300return rc;301302return sprintf(buf, "%u\n", reg);303}304static DEVICE_ATTR_RO(vga_pw);305306static struct attribute *aspeed_sysfs_entries[] = {307&dev_attr_vga_pw.attr,308&dev_attr_dac_mux.attr,309NULL,310};311312static struct attribute_group aspeed_sysfs_attr_group = {313.attrs = aspeed_sysfs_entries,314};315316static int aspeed_gfx_probe(struct platform_device *pdev)317{318struct aspeed_gfx *priv;319int ret;320321priv = devm_drm_dev_alloc(&pdev->dev, &aspeed_gfx_driver,322struct aspeed_gfx, drm);323if (IS_ERR(priv))324return PTR_ERR(priv);325326ret = aspeed_gfx_load(&priv->drm);327if (ret)328return ret;329330platform_set_drvdata(pdev, priv);331332ret = sysfs_create_group(&pdev->dev.kobj, &aspeed_sysfs_attr_group);333if (ret)334return ret;335336ret = drm_dev_register(&priv->drm, 0);337if (ret)338goto err_unload;339340drm_client_setup(&priv->drm, NULL);341return 0;342343err_unload:344sysfs_remove_group(&pdev->dev.kobj, &aspeed_sysfs_attr_group);345aspeed_gfx_unload(&priv->drm);346347return ret;348}349350static void aspeed_gfx_remove(struct platform_device *pdev)351{352struct drm_device *drm = platform_get_drvdata(pdev);353354sysfs_remove_group(&pdev->dev.kobj, &aspeed_sysfs_attr_group);355drm_dev_unregister(drm);356aspeed_gfx_unload(drm);357drm_atomic_helper_shutdown(drm);358}359360static void aspeed_gfx_shutdown(struct platform_device *pdev)361{362drm_atomic_helper_shutdown(platform_get_drvdata(pdev));363}364365static struct platform_driver aspeed_gfx_platform_driver = {366.probe = aspeed_gfx_probe,367.remove = aspeed_gfx_remove,368.shutdown = aspeed_gfx_shutdown,369.driver = {370.name = "aspeed_gfx",371.of_match_table = aspeed_gfx_match,372},373};374375drm_module_platform_driver(aspeed_gfx_platform_driver);376377MODULE_AUTHOR("Joel Stanley <[email protected]>");378MODULE_DESCRIPTION("ASPEED BMC DRM/KMS driver");379MODULE_LICENSE("GPL");380381382