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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/drivers/gpu/drm/ast/ast_drv.c
50487 views
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/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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*/
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/*
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* Authors: Dave Airlie <[email protected]>
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*/
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#include <linux/aperture.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/pci.h>
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#include <drm/clients/drm_client_setup.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_fbdev_shmem.h>
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#include <drm/drm_gem_shmem_helper.h>
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#include <drm/drm_module.h>
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#include <drm/drm_print.h>
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#include <drm/drm_probe_helper.h>
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#include "ast_drv.h"
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static int ast_modeset = -1;
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MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
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module_param_named(modeset, ast_modeset, int, 0400);
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void ast_device_init(struct ast_device *ast,
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enum ast_chip chip,
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enum ast_config_mode config_mode,
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void __iomem *regs,
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void __iomem *ioregs,
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const struct ast_device_quirks *quirks)
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{
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ast->quirks = quirks;
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ast->chip = chip;
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ast->config_mode = config_mode;
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ast->regs = regs;
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ast->ioregs = ioregs;
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}
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void __ast_device_set_tx_chip(struct ast_device *ast, enum ast_tx_chip tx_chip)
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{
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static const char * const info_str[] = {
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"analog VGA",
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"Sil164 TMDS transmitter",
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"DP501 DisplayPort transmitter",
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"ASPEED DisplayPort transmitter",
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};
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drm_info(&ast->base, "Using %s\n", info_str[tx_chip]);
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ast->tx_chip = tx_chip;
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}
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/*
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* DRM driver
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*/
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DEFINE_DRM_GEM_FOPS(ast_fops);
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static const struct drm_driver ast_driver = {
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.driver_features = DRIVER_ATOMIC |
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DRIVER_GEM |
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DRIVER_MODESET,
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.fops = &ast_fops,
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.name = DRIVER_NAME,
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.desc = DRIVER_DESC,
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.major = DRIVER_MAJOR,
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.minor = DRIVER_MINOR,
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.patchlevel = DRIVER_PATCHLEVEL,
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DRM_GEM_SHMEM_DRIVER_OPS,
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DRM_FBDEV_SHMEM_DRIVER_OPS,
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};
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/*
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* PCI driver
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*/
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#define PCI_VENDOR_ASPEED 0x1a03
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#define AST_VGA_DEVICE(id, info) { \
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.class = PCI_BASE_CLASS_DISPLAY << 16, \
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.class_mask = 0xff0000, \
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.vendor = PCI_VENDOR_ASPEED, \
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.device = id, \
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.subvendor = PCI_ANY_ID, \
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.subdevice = PCI_ANY_ID, \
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.driver_data = (unsigned long) info }
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static const struct pci_device_id ast_pciidlist[] = {
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AST_VGA_DEVICE(PCI_CHIP_AST2000, NULL),
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AST_VGA_DEVICE(PCI_CHIP_AST2100, NULL),
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{0, 0, 0},
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};
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MODULE_DEVICE_TABLE(pci, ast_pciidlist);
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static bool ast_is_vga_enabled(void __iomem *ioregs)
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{
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u8 vgaer = __ast_read8(ioregs, AST_IO_VGAER);
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return vgaer & AST_IO_VGAER_VGA_ENABLE;
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}
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static void ast_enable_vga(void __iomem *ioregs)
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{
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__ast_write8(ioregs, AST_IO_VGAER, AST_IO_VGAER_VGA_ENABLE);
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__ast_write8(ioregs, AST_IO_VGAMR_W, AST_IO_VGAMR_IOSEL);
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}
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/*
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* Run this function as part of the HW device cleanup; not
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* when the DRM device gets released.
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*/
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static void ast_enable_mmio_release(void *data)
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{
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void __iomem *ioregs = (void __force __iomem *)data;
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/* enable standard VGA decode */
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__ast_write8_i(ioregs, AST_IO_VGACRI, 0xa1, AST_IO_VGACRA1_MMIO_ENABLED);
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}
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static int ast_enable_mmio(struct device *dev, void __iomem *ioregs)
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{
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void *data = (void __force *)ioregs;
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__ast_write8_i(ioregs, AST_IO_VGACRI, 0xa1,
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AST_IO_VGACRA1_MMIO_ENABLED |
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AST_IO_VGACRA1_VGAIO_DISABLED);
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return devm_add_action_or_reset(dev, ast_enable_mmio_release, data);
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}
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static void ast_open_key(void __iomem *ioregs)
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{
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__ast_write8_i(ioregs, AST_IO_VGACRI, 0x80, AST_IO_VGACR80_PASSWORD);
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}
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static int ast_detect_chip(struct pci_dev *pdev,
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void __iomem *regs, void __iomem *ioregs,
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enum ast_chip *chip_out,
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enum ast_config_mode *config_mode_out)
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{
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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enum ast_config_mode config_mode = ast_use_defaults;
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uint32_t scu_rev = 0xffffffff;
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enum ast_chip chip;
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u32 data;
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u8 vgacrd0, vgacrd1;
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/*
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* Find configuration mode and read SCU revision
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*/
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/* Check if we have device-tree properties */
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if (np && !of_property_read_u32(np, "aspeed,scu-revision-id", &data)) {
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/* We do, disable P2A access */
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config_mode = ast_use_dt;
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scu_rev = data;
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} else if (pdev->device == PCI_CHIP_AST2000) { // Not all families have a P2A bridge
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/*
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* The BMC will set SCU 0x40 D[12] to 1 if the P2 bridge
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* is disabled. We force using P2A if VGA only mode bit
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* is set D[7]
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*/
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vgacrd0 = __ast_read8_i(ioregs, AST_IO_VGACRI, 0xd0);
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vgacrd1 = __ast_read8_i(ioregs, AST_IO_VGACRI, 0xd1);
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if (!(vgacrd0 & 0x80) || !(vgacrd1 & 0x10)) {
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/*
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* We have a P2A bridge and it is enabled.
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*/
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/* Patch AST2500/AST2510 */
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if ((pdev->revision & 0xf0) == 0x40) {
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if (!(vgacrd0 & AST_IO_VGACRD0_VRAM_INIT_STATUS_MASK))
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ast_2500_patch_ahb(regs);
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}
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/* Double check that it's actually working */
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data = __ast_read32(regs, 0xf004);
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if ((data != 0xffffffff) && (data != 0x00)) {
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config_mode = ast_use_p2a;
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/* Read SCU7c (silicon revision register) */
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__ast_write32(regs, 0xf004, 0x1e6e0000);
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__ast_write32(regs, 0xf000, 0x1);
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scu_rev = __ast_read32(regs, 0x1207c);
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}
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}
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}
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switch (config_mode) {
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case ast_use_defaults:
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dev_info(dev, "Using default configuration\n");
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break;
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case ast_use_dt:
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dev_info(dev, "Using device-tree for configuration\n");
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break;
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case ast_use_p2a:
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dev_info(dev, "Using P2A bridge for configuration\n");
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break;
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}
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/*
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* Identify chipset
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*/
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if (pdev->revision >= 0x50) {
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chip = AST2600;
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dev_info(dev, "AST 2600 detected\n");
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} else if (pdev->revision >= 0x40) {
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switch (scu_rev & 0x300) {
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case 0x0100:
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chip = AST2510;
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dev_info(dev, "AST 2510 detected\n");
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break;
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default:
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chip = AST2500;
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dev_info(dev, "AST 2500 detected\n");
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break;
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}
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} else if (pdev->revision >= 0x30) {
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switch (scu_rev & 0x300) {
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case 0x0100:
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chip = AST1400;
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dev_info(dev, "AST 1400 detected\n");
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break;
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default:
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chip = AST2400;
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dev_info(dev, "AST 2400 detected\n");
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break;
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}
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} else if (pdev->revision >= 0x20) {
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switch (scu_rev & 0x300) {
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case 0x0000:
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chip = AST1300;
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dev_info(dev, "AST 1300 detected\n");
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break;
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default:
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chip = AST2300;
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dev_info(dev, "AST 2300 detected\n");
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break;
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}
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} else if (pdev->revision >= 0x10) {
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switch (scu_rev & 0x0300) {
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case 0x0200:
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chip = AST1100;
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dev_info(dev, "AST 1100 detected\n");
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break;
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case 0x0100:
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chip = AST2200;
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dev_info(dev, "AST 2200 detected\n");
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break;
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case 0x0000:
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chip = AST2150;
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dev_info(dev, "AST 2150 detected\n");
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break;
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default:
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chip = AST2100;
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dev_info(dev, "AST 2100 detected\n");
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break;
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}
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} else {
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chip = AST2000;
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dev_info(dev, "AST 2000 detected\n");
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}
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*chip_out = chip;
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*config_mode_out = config_mode;
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return __AST_CHIP_GEN(chip);
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}
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static int ast_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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struct device *dev = &pdev->dev;
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int ret;
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void __iomem *regs;
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void __iomem *ioregs;
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enum ast_config_mode config_mode;
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enum ast_chip chip;
309
unsigned int chip_gen;
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struct drm_device *drm;
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bool need_post = false;
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ret = aperture_remove_conflicting_pci_devices(pdev, ast_driver.name);
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if (ret)
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return ret;
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ret = pcim_enable_device(pdev);
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if (ret)
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return ret;
320
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regs = pcim_iomap_region(pdev, 1, "ast");
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if (IS_ERR(regs))
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return PTR_ERR(regs);
324
325
if (pdev->revision >= 0x40) {
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/*
327
* On AST2500 and later models, MMIO is enabled by
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* default. Adopt it to be compatible with ARM.
329
*/
330
resource_size_t len = pci_resource_len(pdev, 1);
331
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if (len < AST_IO_MM_OFFSET)
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return -EIO;
334
if ((len - AST_IO_MM_OFFSET) < AST_IO_MM_LENGTH)
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return -EIO;
336
ioregs = regs + AST_IO_MM_OFFSET;
337
} else if (pci_resource_flags(pdev, 2) & IORESOURCE_IO) {
338
/*
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* Map I/O registers if we have a PCI BAR for I/O.
340
*/
341
resource_size_t len = pci_resource_len(pdev, 2);
342
343
if (len < AST_IO_MM_LENGTH)
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return -EIO;
345
ioregs = pcim_iomap_region(pdev, 2, "ast");
346
if (IS_ERR(ioregs))
347
return PTR_ERR(ioregs);
348
} else {
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/*
350
* Anything else is best effort.
351
*/
352
resource_size_t len = pci_resource_len(pdev, 1);
353
354
if (len < AST_IO_MM_OFFSET)
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return -EIO;
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if ((len - AST_IO_MM_OFFSET) < AST_IO_MM_LENGTH)
357
return -EIO;
358
ioregs = regs + AST_IO_MM_OFFSET;
359
360
dev_info(dev, "Platform has no I/O space, using MMIO\n");
361
}
362
363
if (!ast_is_vga_enabled(ioregs)) {
364
dev_info(dev, "VGA not enabled on entry, requesting chip POST\n");
365
need_post = true;
366
}
367
368
/*
369
* If VGA isn't enabled, we need to enable now or subsequent
370
* access to the scratch registers will fail.
371
*/
372
if (need_post)
373
ast_enable_vga(ioregs);
374
/* Enable extended register access */
375
ast_open_key(ioregs);
376
377
ret = ast_enable_mmio(dev, ioregs);
378
if (ret)
379
return ret;
380
381
ret = ast_detect_chip(pdev, regs, ioregs, &chip, &config_mode);
382
if (ret < 0)
383
return ret;
384
chip_gen = ret;
385
386
switch (chip_gen) {
387
case 1:
388
drm = ast_2000_device_create(pdev, &ast_driver, chip, config_mode,
389
regs, ioregs, need_post);
390
break;
391
case 2:
392
drm = ast_2100_device_create(pdev, &ast_driver, chip, config_mode,
393
regs, ioregs, need_post);
394
break;
395
case 3:
396
drm = ast_2200_device_create(pdev, &ast_driver, chip, config_mode,
397
regs, ioregs, need_post);
398
break;
399
case 4:
400
drm = ast_2300_device_create(pdev, &ast_driver, chip, config_mode,
401
regs, ioregs, need_post);
402
break;
403
case 5:
404
drm = ast_2400_device_create(pdev, &ast_driver, chip, config_mode,
405
regs, ioregs, need_post);
406
break;
407
case 6:
408
drm = ast_2500_device_create(pdev, &ast_driver, chip, config_mode,
409
regs, ioregs, need_post);
410
break;
411
case 7:
412
drm = ast_2600_device_create(pdev, &ast_driver, chip, config_mode,
413
regs, ioregs, need_post);
414
break;
415
default:
416
dev_err(&pdev->dev, "Gen%d not supported\n", chip_gen);
417
return -ENODEV;
418
}
419
if (IS_ERR(drm))
420
return PTR_ERR(drm);
421
pci_set_drvdata(pdev, drm);
422
423
ret = drm_dev_register(drm, ent->driver_data);
424
if (ret)
425
return ret;
426
427
drm_client_setup(drm, NULL);
428
429
return 0;
430
}
431
432
static void ast_pci_remove(struct pci_dev *pdev)
433
{
434
struct drm_device *dev = pci_get_drvdata(pdev);
435
436
drm_dev_unregister(dev);
437
drm_atomic_helper_shutdown(dev);
438
}
439
440
static void ast_pci_shutdown(struct pci_dev *pdev)
441
{
442
drm_atomic_helper_shutdown(pci_get_drvdata(pdev));
443
}
444
445
static int ast_drm_freeze(struct drm_device *dev)
446
{
447
int error;
448
449
error = drm_mode_config_helper_suspend(dev);
450
if (error)
451
return error;
452
pci_save_state(to_pci_dev(dev->dev));
453
return 0;
454
}
455
456
static int ast_drm_thaw(struct drm_device *dev)
457
{
458
struct ast_device *ast = to_ast_device(dev);
459
int ret;
460
461
ast_enable_vga(ast->ioregs);
462
ast_open_key(ast->ioregs);
463
ast_enable_mmio(dev->dev, ast->ioregs);
464
465
ret = ast_post_gpu(ast);
466
if (ret)
467
return ret;
468
469
return drm_mode_config_helper_resume(dev);
470
}
471
472
static int ast_drm_resume(struct drm_device *dev)
473
{
474
if (pci_enable_device(to_pci_dev(dev->dev)))
475
return -EIO;
476
477
return ast_drm_thaw(dev);
478
}
479
480
static int ast_pm_suspend(struct device *dev)
481
{
482
struct pci_dev *pdev = to_pci_dev(dev);
483
struct drm_device *ddev = pci_get_drvdata(pdev);
484
int error;
485
486
error = ast_drm_freeze(ddev);
487
if (error)
488
return error;
489
490
pci_disable_device(pdev);
491
pci_set_power_state(pdev, PCI_D3hot);
492
return 0;
493
}
494
495
static int ast_pm_resume(struct device *dev)
496
{
497
struct pci_dev *pdev = to_pci_dev(dev);
498
struct drm_device *ddev = pci_get_drvdata(pdev);
499
return ast_drm_resume(ddev);
500
}
501
502
static int ast_pm_freeze(struct device *dev)
503
{
504
struct pci_dev *pdev = to_pci_dev(dev);
505
struct drm_device *ddev = pci_get_drvdata(pdev);
506
return ast_drm_freeze(ddev);
507
}
508
509
static int ast_pm_thaw(struct device *dev)
510
{
511
struct pci_dev *pdev = to_pci_dev(dev);
512
struct drm_device *ddev = pci_get_drvdata(pdev);
513
return ast_drm_thaw(ddev);
514
}
515
516
static int ast_pm_poweroff(struct device *dev)
517
{
518
struct pci_dev *pdev = to_pci_dev(dev);
519
struct drm_device *ddev = pci_get_drvdata(pdev);
520
521
return ast_drm_freeze(ddev);
522
}
523
524
static const struct dev_pm_ops ast_pm_ops = {
525
.suspend = ast_pm_suspend,
526
.resume = ast_pm_resume,
527
.freeze = ast_pm_freeze,
528
.thaw = ast_pm_thaw,
529
.poweroff = ast_pm_poweroff,
530
.restore = ast_pm_resume,
531
};
532
533
static struct pci_driver ast_pci_driver = {
534
.name = DRIVER_NAME,
535
.id_table = ast_pciidlist,
536
.probe = ast_pci_probe,
537
.remove = ast_pci_remove,
538
.shutdown = ast_pci_shutdown,
539
.driver.pm = &ast_pm_ops,
540
};
541
542
drm_module_pci_driver_if_modeset(ast_pci_driver, ast_modeset);
543
544
MODULE_AUTHOR(DRIVER_AUTHOR);
545
MODULE_DESCRIPTION(DRIVER_DESC);
546
MODULE_LICENSE("GPL and additional rights");
547
548