Path: blob/master/drivers/gpu/drm/bridge/cadence/cdns-dsi-j721e.c
26516 views
// SPDX-License-Identifier: GPL-2.01/*2* TI j721e Cadence DSI wrapper3*4* Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.com/5* Author: Rahul T R <[email protected]>6*/78#include <linux/io.h>9#include <linux/platform_device.h>1011#include "cdns-dsi-j721e.h"1213#define DSI_WRAP_REVISION 0x014#define DSI_WRAP_DPI_CONTROL 0x415#define DSI_WRAP_DSC_CONTROL 0x816#define DSI_WRAP_DPI_SECURE 0xc17#define DSI_WRAP_DSI_0_ASF_STATUS 0x101819#define DSI_WRAP_DPI_0_EN BIT(0)20#define DSI_WRAP_DSI2_MUX_SEL BIT(4)2122static int cdns_dsi_j721e_init(struct cdns_dsi *dsi)23{24struct platform_device *pdev = to_platform_device(dsi->base.dev);2526dsi->j721e_regs = devm_platform_ioremap_resource(pdev, 1);27return PTR_ERR_OR_ZERO(dsi->j721e_regs);28}2930static void cdns_dsi_j721e_enable(struct cdns_dsi *dsi)31{32/*33* Enable DPI0 as its input. DSS0 DPI2 is connected34* to DSI DPI0. This is the only supported configuration on35* J721E.36*/37writel(DSI_WRAP_DPI_0_EN, dsi->j721e_regs + DSI_WRAP_DPI_CONTROL);38}3940static void cdns_dsi_j721e_disable(struct cdns_dsi *dsi)41{42/* Put everything to defaults */43writel(0, dsi->j721e_regs + DSI_WRAP_DPI_CONTROL);44}4546const struct cdns_dsi_platform_ops dsi_ti_j721e_ops = {47.init = cdns_dsi_j721e_init,48.enable = cdns_dsi_j721e_enable,49.disable = cdns_dsi_j721e_disable,50};515253