Path: blob/master/drivers/gpu/drm/bridge/lontium-lt9611uxc.c
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// SPDX-License-Identifier: GPL-2.01/*2* Copyright (c) 2018, The Linux Foundation. All rights reserved.3* Copyright (c) 2019-2020. Linaro Limited.4*/56#include <linux/firmware.h>7#include <linux/gpio/consumer.h>8#include <linux/i2c.h>9#include <linux/interrupt.h>10#include <linux/module.h>11#include <linux/mutex.h>12#include <linux/of_graph.h>13#include <linux/platform_device.h>14#include <linux/regmap.h>15#include <linux/regulator/consumer.h>16#include <linux/wait.h>17#include <linux/workqueue.h>1819#include <sound/hdmi-codec.h>2021#include <drm/drm_atomic_helper.h>22#include <drm/drm_bridge.h>23#include <drm/drm_edid.h>24#include <drm/drm_mipi_dsi.h>25#include <drm/drm_of.h>26#include <drm/drm_print.h>27#include <drm/drm_probe_helper.h>2829#define EDID_BLOCK_SIZE 12830#define EDID_NUM_BLOCKS 23132#define FW_FILE "lt9611uxc_fw.bin"3334struct lt9611uxc {35struct device *dev;36struct drm_bridge bridge;37struct drm_bridge *next_bridge;3839struct regmap *regmap;40/* Protects all accesses to registers by stopping the on-chip MCU */41struct mutex ocm_lock;4243struct wait_queue_head wq;44struct work_struct work;4546struct device_node *dsi0_node;47struct device_node *dsi1_node;48struct mipi_dsi_device *dsi0;49struct mipi_dsi_device *dsi1;50struct platform_device *audio_pdev;5152struct gpio_desc *reset_gpio;53struct gpio_desc *enable_gpio;5455struct regulator_bulk_data supplies[2];5657struct i2c_client *client;5859bool hpd_supported;60bool edid_read;61/* can be accessed from different threads, so protect this with ocm_lock */62bool hdmi_connected;63uint8_t fw_version;64};6566#define LT9611_PAGE_CONTROL 0xff6768static const struct regmap_range_cfg lt9611uxc_ranges[] = {69{70.name = "register_range",71.range_min = 0,72.range_max = 0xd0ff,73.selector_reg = LT9611_PAGE_CONTROL,74.selector_mask = 0xff,75.selector_shift = 0,76.window_start = 0,77.window_len = 0x100,78},79};8081static const struct regmap_config lt9611uxc_regmap_config = {82.reg_bits = 8,83.val_bits = 8,84.max_register = 0xffff,85.ranges = lt9611uxc_ranges,86.num_ranges = ARRAY_SIZE(lt9611uxc_ranges),87};8889struct lt9611uxc_mode {90u16 hdisplay;91u16 vdisplay;92u8 vrefresh;93};9495/*96* This chip supports only a fixed set of modes.97* Enumerate them here to check whether the mode is supported.98*/99static struct lt9611uxc_mode lt9611uxc_modes[] = {100{ 1920, 1080, 60 },101{ 1920, 1080, 30 },102{ 1920, 1080, 25 },103{ 1366, 768, 60 },104{ 1360, 768, 60 },105{ 1280, 1024, 60 },106{ 1280, 800, 60 },107{ 1280, 720, 60 },108{ 1280, 720, 50 },109{ 1280, 720, 30 },110{ 1152, 864, 60 },111{ 1024, 768, 60 },112{ 800, 600, 60 },113{ 720, 576, 50 },114{ 720, 480, 60 },115{ 640, 480, 60 },116};117118static struct lt9611uxc *bridge_to_lt9611uxc(struct drm_bridge *bridge)119{120return container_of(bridge, struct lt9611uxc, bridge);121}122123static void lt9611uxc_lock(struct lt9611uxc *lt9611uxc)124{125mutex_lock(<9611uxc->ocm_lock);126regmap_write(lt9611uxc->regmap, 0x80ee, 0x01);127}128129static void lt9611uxc_unlock(struct lt9611uxc *lt9611uxc)130{131regmap_write(lt9611uxc->regmap, 0x80ee, 0x00);132msleep(50);133mutex_unlock(<9611uxc->ocm_lock);134}135136static irqreturn_t lt9611uxc_irq_thread_handler(int irq, void *dev_id)137{138struct lt9611uxc *lt9611uxc = dev_id;139unsigned int irq_status = 0;140unsigned int hpd_status = 0;141142lt9611uxc_lock(lt9611uxc);143144regmap_read(lt9611uxc->regmap, 0xb022, &irq_status);145regmap_read(lt9611uxc->regmap, 0xb023, &hpd_status);146if (irq_status)147regmap_write(lt9611uxc->regmap, 0xb022, 0);148149if (irq_status & BIT(0)) {150lt9611uxc->edid_read = !!(hpd_status & BIT(0));151wake_up_all(<9611uxc->wq);152}153154if (irq_status & BIT(1)) {155lt9611uxc->hdmi_connected = hpd_status & BIT(1);156schedule_work(<9611uxc->work);157}158159lt9611uxc_unlock(lt9611uxc);160161return IRQ_HANDLED;162}163164static void lt9611uxc_hpd_work(struct work_struct *work)165{166struct lt9611uxc *lt9611uxc = container_of(work, struct lt9611uxc, work);167bool connected;168169mutex_lock(<9611uxc->ocm_lock);170connected = lt9611uxc->hdmi_connected;171mutex_unlock(<9611uxc->ocm_lock);172173drm_bridge_hpd_notify(<9611uxc->bridge,174connected ?175connector_status_connected :176connector_status_disconnected);177}178179static void lt9611uxc_reset(struct lt9611uxc *lt9611uxc)180{181gpiod_set_value_cansleep(lt9611uxc->reset_gpio, 1);182msleep(20);183184gpiod_set_value_cansleep(lt9611uxc->reset_gpio, 0);185msleep(20);186187gpiod_set_value_cansleep(lt9611uxc->reset_gpio, 1);188msleep(300);189}190191static void lt9611uxc_assert_5v(struct lt9611uxc *lt9611uxc)192{193if (!lt9611uxc->enable_gpio)194return;195196gpiod_set_value_cansleep(lt9611uxc->enable_gpio, 1);197msleep(20);198}199200static int lt9611uxc_regulator_init(struct lt9611uxc *lt9611uxc)201{202int ret;203204lt9611uxc->supplies[0].supply = "vdd";205lt9611uxc->supplies[1].supply = "vcc";206207ret = devm_regulator_bulk_get(lt9611uxc->dev, 2, lt9611uxc->supplies);208if (ret < 0)209return ret;210211return regulator_set_load(lt9611uxc->supplies[0].consumer, 200000);212}213214static int lt9611uxc_regulator_enable(struct lt9611uxc *lt9611uxc)215{216int ret;217218ret = regulator_enable(lt9611uxc->supplies[0].consumer);219if (ret < 0)220return ret;221222usleep_range(1000, 10000); /* 50000 according to dtsi */223224ret = regulator_enable(lt9611uxc->supplies[1].consumer);225if (ret < 0) {226regulator_disable(lt9611uxc->supplies[0].consumer);227return ret;228}229230return 0;231}232233static struct lt9611uxc_mode *lt9611uxc_find_mode(const struct drm_display_mode *mode)234{235int i;236237for (i = 0; i < ARRAY_SIZE(lt9611uxc_modes); i++) {238if (lt9611uxc_modes[i].hdisplay == mode->hdisplay &&239lt9611uxc_modes[i].vdisplay == mode->vdisplay &&240lt9611uxc_modes[i].vrefresh == drm_mode_vrefresh(mode)) {241return <9611uxc_modes[i];242}243}244245return NULL;246}247248static struct mipi_dsi_device *lt9611uxc_attach_dsi(struct lt9611uxc *lt9611uxc,249struct device_node *dsi_node)250{251const struct mipi_dsi_device_info info = { "lt9611uxc", 0, NULL };252struct mipi_dsi_device *dsi;253struct mipi_dsi_host *host;254struct device *dev = lt9611uxc->dev;255int ret;256257host = of_find_mipi_dsi_host_by_node(dsi_node);258if (!host)259return ERR_PTR(dev_err_probe(dev, -EPROBE_DEFER, "failed to find dsi host\n"));260261dsi = devm_mipi_dsi_device_register_full(dev, host, &info);262if (IS_ERR(dsi)) {263dev_err(dev, "failed to create dsi device\n");264return dsi;265}266267dsi->lanes = 4;268dsi->format = MIPI_DSI_FMT_RGB888;269dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |270MIPI_DSI_MODE_VIDEO_HSE;271272ret = devm_mipi_dsi_attach(dev, dsi);273if (ret < 0) {274dev_err(dev, "failed to attach dsi to host\n");275return ERR_PTR(ret);276}277278return dsi;279}280281static int lt9611uxc_bridge_attach(struct drm_bridge *bridge,282struct drm_encoder *encoder,283enum drm_bridge_attach_flags flags)284{285struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge);286287return drm_bridge_attach(encoder, lt9611uxc->next_bridge,288bridge, flags);289}290291static enum drm_mode_status292lt9611uxc_bridge_mode_valid(struct drm_bridge *bridge,293const struct drm_display_info *info,294const struct drm_display_mode *mode)295{296struct lt9611uxc_mode *lt9611uxc_mode;297298lt9611uxc_mode = lt9611uxc_find_mode(mode);299300return lt9611uxc_mode ? MODE_OK : MODE_BAD;301}302303static void lt9611uxc_video_setup(struct lt9611uxc *lt9611uxc,304const struct drm_display_mode *mode)305{306u32 h_total, hactive, hsync_len, hfront_porch;307u32 v_total, vactive, vsync_len, vfront_porch;308309h_total = mode->htotal;310v_total = mode->vtotal;311312hactive = mode->hdisplay;313hsync_len = mode->hsync_end - mode->hsync_start;314hfront_porch = mode->hsync_start - mode->hdisplay;315316vactive = mode->vdisplay;317vsync_len = mode->vsync_end - mode->vsync_start;318vfront_porch = mode->vsync_start - mode->vdisplay;319320regmap_write(lt9611uxc->regmap, 0xd00d, (u8)(v_total / 256));321regmap_write(lt9611uxc->regmap, 0xd00e, (u8)(v_total % 256));322323regmap_write(lt9611uxc->regmap, 0xd00f, (u8)(vactive / 256));324regmap_write(lt9611uxc->regmap, 0xd010, (u8)(vactive % 256));325326regmap_write(lt9611uxc->regmap, 0xd011, (u8)(h_total / 256));327regmap_write(lt9611uxc->regmap, 0xd012, (u8)(h_total % 256));328329regmap_write(lt9611uxc->regmap, 0xd013, (u8)(hactive / 256));330regmap_write(lt9611uxc->regmap, 0xd014, (u8)(hactive % 256));331332regmap_write(lt9611uxc->regmap, 0xd015, (u8)(vsync_len % 256));333334regmap_update_bits(lt9611uxc->regmap, 0xd016, 0xf, (u8)(hsync_len / 256));335regmap_write(lt9611uxc->regmap, 0xd017, (u8)(hsync_len % 256));336337regmap_update_bits(lt9611uxc->regmap, 0xd018, 0xf, (u8)(vfront_porch / 256));338regmap_write(lt9611uxc->regmap, 0xd019, (u8)(vfront_porch % 256));339340regmap_update_bits(lt9611uxc->regmap, 0xd01a, 0xf, (u8)(hfront_porch / 256));341regmap_write(lt9611uxc->regmap, 0xd01b, (u8)(hfront_porch % 256));342}343344static void lt9611uxc_bridge_mode_set(struct drm_bridge *bridge,345const struct drm_display_mode *mode,346const struct drm_display_mode *adj_mode)347{348struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge);349350lt9611uxc_lock(lt9611uxc);351lt9611uxc_video_setup(lt9611uxc, mode);352lt9611uxc_unlock(lt9611uxc);353}354355static enum drm_connector_status356lt9611uxc_bridge_detect(struct drm_bridge *bridge, struct drm_connector *connector)357{358struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge);359unsigned int reg_val = 0;360int ret;361bool connected = true;362363lt9611uxc_lock(lt9611uxc);364365if (lt9611uxc->hpd_supported) {366ret = regmap_read(lt9611uxc->regmap, 0xb023, ®_val);367368if (ret)369dev_err(lt9611uxc->dev, "failed to read hpd status: %d\n", ret);370else371connected = reg_val & BIT(1);372}373lt9611uxc->hdmi_connected = connected;374375lt9611uxc_unlock(lt9611uxc);376377return connected ? connector_status_connected :378connector_status_disconnected;379}380381static int lt9611uxc_wait_for_edid(struct lt9611uxc *lt9611uxc)382{383return wait_event_interruptible_timeout(lt9611uxc->wq, lt9611uxc->edid_read,384msecs_to_jiffies(500));385}386387static int lt9611uxc_get_edid_block(void *data, u8 *buf, unsigned int block, size_t len)388{389struct lt9611uxc *lt9611uxc = data;390int ret;391392if (len > EDID_BLOCK_SIZE)393return -EINVAL;394395if (block >= EDID_NUM_BLOCKS)396return -EINVAL;397398lt9611uxc_lock(lt9611uxc);399400regmap_write(lt9611uxc->regmap, 0xb00b, 0x10);401402regmap_write(lt9611uxc->regmap, 0xb00a, block * EDID_BLOCK_SIZE);403404ret = regmap_noinc_read(lt9611uxc->regmap, 0xb0b0, buf, len);405if (ret)406dev_err(lt9611uxc->dev, "edid read failed: %d\n", ret);407408lt9611uxc_unlock(lt9611uxc);409410return 0;411};412413static const struct drm_edid *lt9611uxc_bridge_edid_read(struct drm_bridge *bridge,414struct drm_connector *connector)415{416struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge);417int ret;418419ret = lt9611uxc_wait_for_edid(lt9611uxc);420if (ret < 0) {421dev_err(lt9611uxc->dev, "wait for EDID failed: %d\n", ret);422return NULL;423} else if (ret == 0) {424dev_err(lt9611uxc->dev, "wait for EDID timeout\n");425return NULL;426}427428return drm_edid_read_custom(connector, lt9611uxc_get_edid_block, lt9611uxc);429}430431static const struct drm_bridge_funcs lt9611uxc_bridge_funcs = {432.attach = lt9611uxc_bridge_attach,433.mode_valid = lt9611uxc_bridge_mode_valid,434.mode_set = lt9611uxc_bridge_mode_set,435.detect = lt9611uxc_bridge_detect,436.edid_read = lt9611uxc_bridge_edid_read,437};438439static int lt9611uxc_parse_dt(struct device *dev,440struct lt9611uxc *lt9611uxc)441{442lt9611uxc->dsi0_node = of_graph_get_remote_node(dev->of_node, 0, -1);443if (!lt9611uxc->dsi0_node) {444dev_err(lt9611uxc->dev, "failed to get remote node for primary dsi\n");445return -ENODEV;446}447448lt9611uxc->dsi1_node = of_graph_get_remote_node(dev->of_node, 1, -1);449450return drm_of_find_panel_or_bridge(dev->of_node, 2, -1, NULL, <9611uxc->next_bridge);451}452453static int lt9611uxc_gpio_init(struct lt9611uxc *lt9611uxc)454{455struct device *dev = lt9611uxc->dev;456457lt9611uxc->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);458if (IS_ERR(lt9611uxc->reset_gpio)) {459dev_err(dev, "failed to acquire reset gpio\n");460return PTR_ERR(lt9611uxc->reset_gpio);461}462463lt9611uxc->enable_gpio = devm_gpiod_get_optional(dev, "enable", GPIOD_OUT_LOW);464if (IS_ERR(lt9611uxc->enable_gpio)) {465dev_err(dev, "failed to acquire enable gpio\n");466return PTR_ERR(lt9611uxc->enable_gpio);467}468469return 0;470}471472static int lt9611uxc_read_device_rev(struct lt9611uxc *lt9611uxc)473{474unsigned int rev0, rev1, rev2;475int ret;476477lt9611uxc_lock(lt9611uxc);478479ret = regmap_read(lt9611uxc->regmap, 0x8100, &rev0);480ret |= regmap_read(lt9611uxc->regmap, 0x8101, &rev1);481ret |= regmap_read(lt9611uxc->regmap, 0x8102, &rev2);482if (ret)483dev_err(lt9611uxc->dev, "failed to read revision: %d\n", ret);484else485dev_info(lt9611uxc->dev, "LT9611 revision: 0x%02x.%02x.%02x\n", rev0, rev1, rev2);486487lt9611uxc_unlock(lt9611uxc);488489return ret;490}491492static int lt9611uxc_read_version(struct lt9611uxc *lt9611uxc)493{494unsigned int rev;495int ret;496497lt9611uxc_lock(lt9611uxc);498499ret = regmap_read(lt9611uxc->regmap, 0xb021, &rev);500if (ret)501dev_err(lt9611uxc->dev, "failed to read revision: %d\n", ret);502else503dev_info(lt9611uxc->dev, "LT9611 version: 0x%02x\n", rev);504505lt9611uxc_unlock(lt9611uxc);506507return ret < 0 ? ret : rev;508}509510static int lt9611uxc_hdmi_hw_params(struct device *dev, void *data,511struct hdmi_codec_daifmt *fmt,512struct hdmi_codec_params *hparms)513{514/*515* LT9611UXC will automatically detect rate and sample size, so no need516* to setup anything here.517*/518return 0;519}520521static void lt9611uxc_audio_shutdown(struct device *dev, void *data)522{523}524525static int lt9611uxc_hdmi_i2s_get_dai_id(struct snd_soc_component *component,526struct device_node *endpoint,527void *data)528{529struct of_endpoint of_ep;530int ret;531532ret = of_graph_parse_endpoint(endpoint, &of_ep);533if (ret < 0)534return ret;535536/*537* HDMI sound should be located as reg = <2>538* Then, it is sound port 0539*/540if (of_ep.port == 2)541return 0;542543return -EINVAL;544}545546static const struct hdmi_codec_ops lt9611uxc_codec_ops = {547.hw_params = lt9611uxc_hdmi_hw_params,548.audio_shutdown = lt9611uxc_audio_shutdown,549.get_dai_id = lt9611uxc_hdmi_i2s_get_dai_id,550};551552static int lt9611uxc_audio_init(struct device *dev, struct lt9611uxc *lt9611uxc)553{554struct hdmi_codec_pdata codec_data = {555.ops = <9611uxc_codec_ops,556.max_i2s_channels = 2,557.i2s = 1,558.data = lt9611uxc,559};560561lt9611uxc->audio_pdev =562platform_device_register_data(dev, HDMI_CODEC_DRV_NAME,563PLATFORM_DEVID_AUTO,564&codec_data, sizeof(codec_data));565566return PTR_ERR_OR_ZERO(lt9611uxc->audio_pdev);567}568569static void lt9611uxc_audio_exit(struct lt9611uxc *lt9611uxc)570{571if (lt9611uxc->audio_pdev) {572platform_device_unregister(lt9611uxc->audio_pdev);573lt9611uxc->audio_pdev = NULL;574}575}576577#define LT9611UXC_FW_PAGE_SIZE 32578static void lt9611uxc_firmware_write_page(struct lt9611uxc *lt9611uxc, u16 addr, const u8 *buf)579{580struct reg_sequence seq_write_prepare[] = {581REG_SEQ0(0x805a, 0x04),582REG_SEQ0(0x805a, 0x00),583584REG_SEQ0(0x805e, 0xdf),585REG_SEQ0(0x805a, 0x20),586REG_SEQ0(0x805a, 0x00),587REG_SEQ0(0x8058, 0x21),588};589590struct reg_sequence seq_write_addr[] = {591REG_SEQ0(0x805b, (addr >> 16) & 0xff),592REG_SEQ0(0x805c, (addr >> 8) & 0xff),593REG_SEQ0(0x805d, addr & 0xff),594REG_SEQ0(0x805a, 0x10),595REG_SEQ0(0x805a, 0x00),596};597598regmap_write(lt9611uxc->regmap, 0x8108, 0xbf);599msleep(20);600regmap_write(lt9611uxc->regmap, 0x8108, 0xff);601msleep(20);602regmap_multi_reg_write(lt9611uxc->regmap, seq_write_prepare, ARRAY_SIZE(seq_write_prepare));603regmap_noinc_write(lt9611uxc->regmap, 0x8059, buf, LT9611UXC_FW_PAGE_SIZE);604regmap_multi_reg_write(lt9611uxc->regmap, seq_write_addr, ARRAY_SIZE(seq_write_addr));605msleep(20);606}607608static void lt9611uxc_firmware_read_page(struct lt9611uxc *lt9611uxc, u16 addr, char *buf)609{610struct reg_sequence seq_read_page[] = {611REG_SEQ0(0x805a, 0xa0),612REG_SEQ0(0x805a, 0x80),613REG_SEQ0(0x805b, (addr >> 16) & 0xff),614REG_SEQ0(0x805c, (addr >> 8) & 0xff),615REG_SEQ0(0x805d, addr & 0xff),616REG_SEQ0(0x805a, 0x90),617REG_SEQ0(0x805a, 0x80),618REG_SEQ0(0x8058, 0x21),619};620621regmap_multi_reg_write(lt9611uxc->regmap, seq_read_page, ARRAY_SIZE(seq_read_page));622regmap_noinc_read(lt9611uxc->regmap, 0x805f, buf, LT9611UXC_FW_PAGE_SIZE);623}624625static char *lt9611uxc_firmware_read(struct lt9611uxc *lt9611uxc, size_t size)626{627struct reg_sequence seq_read_setup[] = {628REG_SEQ0(0x805a, 0x84),629REG_SEQ0(0x805a, 0x80),630};631632char *readbuf;633u16 offset;634635readbuf = kzalloc(ALIGN(size, 32), GFP_KERNEL);636if (!readbuf)637return NULL;638639regmap_multi_reg_write(lt9611uxc->regmap, seq_read_setup, ARRAY_SIZE(seq_read_setup));640641for (offset = 0;642offset < size;643offset += LT9611UXC_FW_PAGE_SIZE)644lt9611uxc_firmware_read_page(lt9611uxc, offset, &readbuf[offset]);645646return readbuf;647}648649static int lt9611uxc_firmware_update(struct lt9611uxc *lt9611uxc)650{651int ret;652u16 offset;653size_t remain;654char *readbuf;655const struct firmware *fw;656657struct reg_sequence seq_setup[] = {658REG_SEQ0(0x805e, 0xdf),659REG_SEQ0(0x8058, 0x00),660REG_SEQ0(0x8059, 0x50),661REG_SEQ0(0x805a, 0x10),662REG_SEQ0(0x805a, 0x00),663};664665666struct reg_sequence seq_block_erase[] = {667REG_SEQ0(0x805a, 0x04),668REG_SEQ0(0x805a, 0x00),669REG_SEQ0(0x805b, 0x00),670REG_SEQ0(0x805c, 0x00),671REG_SEQ0(0x805d, 0x00),672REG_SEQ0(0x805a, 0x01),673REG_SEQ0(0x805a, 0x00),674};675676ret = request_firmware(&fw, FW_FILE, lt9611uxc->dev);677if (ret < 0)678return ret;679680dev_info(lt9611uxc->dev, "Updating firmware\n");681lt9611uxc_lock(lt9611uxc);682683regmap_multi_reg_write(lt9611uxc->regmap, seq_setup, ARRAY_SIZE(seq_setup));684685/*686* Need erase block 2 timess here. Sometimes, block erase can fail.687* This is a workaroud.688*/689regmap_multi_reg_write(lt9611uxc->regmap, seq_block_erase, ARRAY_SIZE(seq_block_erase));690msleep(3000);691regmap_multi_reg_write(lt9611uxc->regmap, seq_block_erase, ARRAY_SIZE(seq_block_erase));692msleep(3000);693694for (offset = 0, remain = fw->size;695remain >= LT9611UXC_FW_PAGE_SIZE;696offset += LT9611UXC_FW_PAGE_SIZE, remain -= LT9611UXC_FW_PAGE_SIZE)697lt9611uxc_firmware_write_page(lt9611uxc, offset, fw->data + offset);698699if (remain > 0) {700char buf[LT9611UXC_FW_PAGE_SIZE];701702memset(buf, 0xff, LT9611UXC_FW_PAGE_SIZE);703memcpy(buf, fw->data + offset, remain);704lt9611uxc_firmware_write_page(lt9611uxc, offset, buf);705}706msleep(20);707708readbuf = lt9611uxc_firmware_read(lt9611uxc, fw->size);709if (!readbuf) {710ret = -ENOMEM;711goto out;712}713714if (!memcmp(readbuf, fw->data, fw->size)) {715dev_err(lt9611uxc->dev, "Firmware update failed\n");716print_hex_dump(KERN_ERR, "fw: ", DUMP_PREFIX_OFFSET, 16, 1, readbuf, fw->size, false);717ret = -EINVAL;718} else {719dev_info(lt9611uxc->dev, "Firmware updates successfully\n");720ret = 0;721}722kfree(readbuf);723724out:725lt9611uxc_unlock(lt9611uxc);726lt9611uxc_reset(lt9611uxc);727release_firmware(fw);728729return ret;730}731732static ssize_t lt9611uxc_firmware_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t len)733{734struct lt9611uxc *lt9611uxc = dev_get_drvdata(dev);735int ret;736737ret = lt9611uxc_firmware_update(lt9611uxc);738if (ret < 0)739return ret;740return len;741}742743static ssize_t lt9611uxc_firmware_show(struct device *dev, struct device_attribute *attr, char *buf)744{745struct lt9611uxc *lt9611uxc = dev_get_drvdata(dev);746747return sysfs_emit(buf, "%02x\n", lt9611uxc->fw_version);748}749750static DEVICE_ATTR_RW(lt9611uxc_firmware);751752static struct attribute *lt9611uxc_attrs[] = {753&dev_attr_lt9611uxc_firmware.attr,754NULL,755};756757static const struct attribute_group lt9611uxc_attr_group = {758.attrs = lt9611uxc_attrs,759};760761static const struct attribute_group *lt9611uxc_attr_groups[] = {762<9611uxc_attr_group,763NULL,764};765766static int lt9611uxc_probe(struct i2c_client *client)767{768struct lt9611uxc *lt9611uxc;769struct device *dev = &client->dev;770int ret;771bool fw_updated = false;772773if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {774dev_err(dev, "device doesn't support I2C\n");775return -ENODEV;776}777778lt9611uxc = devm_drm_bridge_alloc(dev, struct lt9611uxc, bridge, <9611uxc_bridge_funcs);779if (IS_ERR(lt9611uxc))780return PTR_ERR(lt9611uxc);781782lt9611uxc->dev = dev;783lt9611uxc->client = client;784mutex_init(<9611uxc->ocm_lock);785786lt9611uxc->regmap = devm_regmap_init_i2c(client, <9611uxc_regmap_config);787if (IS_ERR(lt9611uxc->regmap)) {788dev_err(lt9611uxc->dev, "regmap i2c init failed\n");789return PTR_ERR(lt9611uxc->regmap);790}791792ret = lt9611uxc_parse_dt(dev, lt9611uxc);793if (ret) {794dev_err(dev, "failed to parse device tree\n");795return ret;796}797798ret = lt9611uxc_gpio_init(lt9611uxc);799if (ret < 0)800goto err_of_put;801802ret = lt9611uxc_regulator_init(lt9611uxc);803if (ret < 0)804goto err_of_put;805806lt9611uxc_assert_5v(lt9611uxc);807808ret = lt9611uxc_regulator_enable(lt9611uxc);809if (ret)810goto err_of_put;811812lt9611uxc_reset(lt9611uxc);813814ret = lt9611uxc_read_device_rev(lt9611uxc);815if (ret) {816dev_err(dev, "failed to read chip rev\n");817goto err_disable_regulators;818}819820retry:821ret = lt9611uxc_read_version(lt9611uxc);822if (ret < 0) {823dev_err(dev, "failed to read FW version\n");824goto err_disable_regulators;825} else if (ret == 0) {826if (!fw_updated) {827fw_updated = true;828dev_err(dev, "FW version 0, enforcing firmware update\n");829ret = lt9611uxc_firmware_update(lt9611uxc);830if (ret < 0)831goto err_disable_regulators;832else833goto retry;834} else {835dev_err(dev, "FW version 0, update failed\n");836ret = -EOPNOTSUPP;837goto err_disable_regulators;838}839} else if (ret < 0x40) {840dev_info(dev, "FW version 0x%x, HPD not supported\n", ret);841} else {842lt9611uxc->hpd_supported = true;843}844lt9611uxc->fw_version = ret;845846init_waitqueue_head(<9611uxc->wq);847INIT_WORK(<9611uxc->work, lt9611uxc_hpd_work);848849ret = request_threaded_irq(client->irq, NULL,850lt9611uxc_irq_thread_handler,851IRQF_ONESHOT, "lt9611uxc", lt9611uxc);852if (ret) {853dev_err(dev, "failed to request irq\n");854goto err_disable_regulators;855}856857i2c_set_clientdata(client, lt9611uxc);858859lt9611uxc->bridge.of_node = client->dev.of_node;860lt9611uxc->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID;861if (lt9611uxc->hpd_supported)862lt9611uxc->bridge.ops |= DRM_BRIDGE_OP_HPD;863lt9611uxc->bridge.type = DRM_MODE_CONNECTOR_HDMIA;864865drm_bridge_add(<9611uxc->bridge);866867/* Attach primary DSI */868lt9611uxc->dsi0 = lt9611uxc_attach_dsi(lt9611uxc, lt9611uxc->dsi0_node);869if (IS_ERR(lt9611uxc->dsi0)) {870ret = PTR_ERR(lt9611uxc->dsi0);871goto err_remove_bridge;872}873874/* Attach secondary DSI, if specified */875if (lt9611uxc->dsi1_node) {876lt9611uxc->dsi1 = lt9611uxc_attach_dsi(lt9611uxc, lt9611uxc->dsi1_node);877if (IS_ERR(lt9611uxc->dsi1)) {878ret = PTR_ERR(lt9611uxc->dsi1);879goto err_remove_bridge;880}881}882883ret = lt9611uxc_audio_init(dev, lt9611uxc);884if (ret)885goto err_remove_bridge;886887return 0;888889err_remove_bridge:890free_irq(client->irq, lt9611uxc);891cancel_work_sync(<9611uxc->work);892drm_bridge_remove(<9611uxc->bridge);893894err_disable_regulators:895regulator_bulk_disable(ARRAY_SIZE(lt9611uxc->supplies), lt9611uxc->supplies);896897err_of_put:898of_node_put(lt9611uxc->dsi1_node);899of_node_put(lt9611uxc->dsi0_node);900901return ret;902}903904static void lt9611uxc_remove(struct i2c_client *client)905{906struct lt9611uxc *lt9611uxc = i2c_get_clientdata(client);907908free_irq(client->irq, lt9611uxc);909cancel_work_sync(<9611uxc->work);910lt9611uxc_audio_exit(lt9611uxc);911drm_bridge_remove(<9611uxc->bridge);912913mutex_destroy(<9611uxc->ocm_lock);914915regulator_bulk_disable(ARRAY_SIZE(lt9611uxc->supplies), lt9611uxc->supplies);916917of_node_put(lt9611uxc->dsi1_node);918of_node_put(lt9611uxc->dsi0_node);919}920921static const struct i2c_device_id lt9611uxc_id[] = {922{ "lontium,lt9611uxc" },923{ /* sentinel */ }924};925926static const struct of_device_id lt9611uxc_match_table[] = {927{ .compatible = "lontium,lt9611uxc" },928{ /* sentinel */ }929};930MODULE_DEVICE_TABLE(of, lt9611uxc_match_table);931932static struct i2c_driver lt9611uxc_driver = {933.driver = {934.name = "lt9611uxc",935.of_match_table = lt9611uxc_match_table,936.dev_groups = lt9611uxc_attr_groups,937},938.probe = lt9611uxc_probe,939.remove = lt9611uxc_remove,940.id_table = lt9611uxc_id,941};942module_i2c_driver(lt9611uxc_driver);943944MODULE_AUTHOR("Dmitry Baryshkov <[email protected]>");945MODULE_DESCRIPTION("Lontium LT9611UXC DSI/HDMI bridge driver");946MODULE_LICENSE("GPL v2");947948MODULE_FIRMWARE(FW_FILE);949950951