Path: blob/master/drivers/gpu/drm/bridge/lontium-lt9611uxc.c
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// SPDX-License-Identifier: GPL-2.01/*2* Copyright (c) 2018, The Linux Foundation. All rights reserved.3* Copyright (c) 2019-2020. Linaro Limited.4*/56#include <linux/firmware.h>7#include <linux/gpio/consumer.h>8#include <linux/i2c.h>9#include <linux/interrupt.h>10#include <linux/module.h>11#include <linux/mutex.h>12#include <linux/of_graph.h>13#include <linux/platform_device.h>14#include <linux/regmap.h>15#include <linux/regulator/consumer.h>16#include <linux/wait.h>17#include <linux/workqueue.h>1819#include <drm/drm_atomic_helper.h>20#include <drm/drm_bridge.h>21#include <drm/drm_edid.h>22#include <drm/drm_mipi_dsi.h>23#include <drm/drm_of.h>24#include <drm/drm_print.h>25#include <drm/drm_probe_helper.h>2627#include <drm/display/drm_hdmi_audio_helper.h>2829#define EDID_BLOCK_SIZE 12830#define EDID_NUM_BLOCKS 23132#define FW_FILE "lt9611uxc_fw.bin"3334struct lt9611uxc {35struct device *dev;36struct drm_bridge bridge;37struct drm_bridge *next_bridge;3839struct regmap *regmap;40/* Protects all accesses to registers by stopping the on-chip MCU */41struct mutex ocm_lock;4243struct wait_queue_head wq;44struct work_struct work;4546struct device_node *dsi0_node;47struct device_node *dsi1_node;48struct mipi_dsi_device *dsi0;49struct mipi_dsi_device *dsi1;5051struct gpio_desc *reset_gpio;52struct gpio_desc *enable_gpio;5354struct regulator_bulk_data supplies[2];5556struct i2c_client *client;5758bool hpd_supported;59bool edid_read;60/* can be accessed from different threads, so protect this with ocm_lock */61bool hdmi_connected;62uint8_t fw_version;63};6465#define LT9611_PAGE_CONTROL 0xff6667static const struct regmap_range_cfg lt9611uxc_ranges[] = {68{69.name = "register_range",70.range_min = 0,71.range_max = 0xd0ff,72.selector_reg = LT9611_PAGE_CONTROL,73.selector_mask = 0xff,74.selector_shift = 0,75.window_start = 0,76.window_len = 0x100,77},78};7980static const struct regmap_config lt9611uxc_regmap_config = {81.reg_bits = 8,82.val_bits = 8,83.max_register = 0xffff,84.ranges = lt9611uxc_ranges,85.num_ranges = ARRAY_SIZE(lt9611uxc_ranges),86};8788struct lt9611uxc_mode {89u16 hdisplay;90u16 vdisplay;91u8 vrefresh;92};9394/*95* This chip supports only a fixed set of modes.96* Enumerate them here to check whether the mode is supported.97*/98static struct lt9611uxc_mode lt9611uxc_modes[] = {99{ 1920, 1080, 60 },100{ 1920, 1080, 30 },101{ 1920, 1080, 25 },102{ 1366, 768, 60 },103{ 1360, 768, 60 },104{ 1280, 1024, 60 },105{ 1280, 800, 60 },106{ 1280, 720, 60 },107{ 1280, 720, 50 },108{ 1280, 720, 30 },109{ 1152, 864, 60 },110{ 1024, 768, 60 },111{ 800, 600, 60 },112{ 720, 576, 50 },113{ 720, 480, 60 },114{ 640, 480, 60 },115};116117static struct lt9611uxc *bridge_to_lt9611uxc(struct drm_bridge *bridge)118{119return container_of(bridge, struct lt9611uxc, bridge);120}121122static void lt9611uxc_lock(struct lt9611uxc *lt9611uxc)123{124mutex_lock(<9611uxc->ocm_lock);125regmap_write(lt9611uxc->regmap, 0x80ee, 0x01);126}127128static void lt9611uxc_unlock(struct lt9611uxc *lt9611uxc)129{130regmap_write(lt9611uxc->regmap, 0x80ee, 0x00);131msleep(50);132mutex_unlock(<9611uxc->ocm_lock);133}134135static irqreturn_t lt9611uxc_irq_thread_handler(int irq, void *dev_id)136{137struct lt9611uxc *lt9611uxc = dev_id;138unsigned int irq_status = 0;139unsigned int hpd_status = 0;140141lt9611uxc_lock(lt9611uxc);142143regmap_read(lt9611uxc->regmap, 0xb022, &irq_status);144regmap_read(lt9611uxc->regmap, 0xb023, &hpd_status);145if (irq_status)146regmap_write(lt9611uxc->regmap, 0xb022, 0);147148if (irq_status & BIT(0)) {149lt9611uxc->edid_read = !!(hpd_status & BIT(0));150wake_up_all(<9611uxc->wq);151}152153if (irq_status & BIT(1)) {154lt9611uxc->hdmi_connected = hpd_status & BIT(1);155schedule_work(<9611uxc->work);156}157158lt9611uxc_unlock(lt9611uxc);159160return IRQ_HANDLED;161}162163static void lt9611uxc_hpd_work(struct work_struct *work)164{165struct lt9611uxc *lt9611uxc = container_of(work, struct lt9611uxc, work);166bool connected;167168mutex_lock(<9611uxc->ocm_lock);169connected = lt9611uxc->hdmi_connected;170mutex_unlock(<9611uxc->ocm_lock);171172drm_bridge_hpd_notify(<9611uxc->bridge,173connected ?174connector_status_connected :175connector_status_disconnected);176}177178static void lt9611uxc_reset(struct lt9611uxc *lt9611uxc)179{180gpiod_set_value_cansleep(lt9611uxc->reset_gpio, 1);181msleep(20);182183gpiod_set_value_cansleep(lt9611uxc->reset_gpio, 0);184msleep(20);185186gpiod_set_value_cansleep(lt9611uxc->reset_gpio, 1);187msleep(300);188}189190static void lt9611uxc_assert_5v(struct lt9611uxc *lt9611uxc)191{192if (!lt9611uxc->enable_gpio)193return;194195gpiod_set_value_cansleep(lt9611uxc->enable_gpio, 1);196msleep(20);197}198199static int lt9611uxc_regulator_init(struct lt9611uxc *lt9611uxc)200{201int ret;202203lt9611uxc->supplies[0].supply = "vdd";204lt9611uxc->supplies[1].supply = "vcc";205206ret = devm_regulator_bulk_get(lt9611uxc->dev, 2, lt9611uxc->supplies);207if (ret < 0)208return ret;209210return regulator_set_load(lt9611uxc->supplies[0].consumer, 200000);211}212213static int lt9611uxc_regulator_enable(struct lt9611uxc *lt9611uxc)214{215int ret;216217ret = regulator_enable(lt9611uxc->supplies[0].consumer);218if (ret < 0)219return ret;220221usleep_range(1000, 10000); /* 50000 according to dtsi */222223ret = regulator_enable(lt9611uxc->supplies[1].consumer);224if (ret < 0) {225regulator_disable(lt9611uxc->supplies[0].consumer);226return ret;227}228229return 0;230}231232static struct lt9611uxc_mode *lt9611uxc_find_mode(const struct drm_display_mode *mode)233{234int i;235236for (i = 0; i < ARRAY_SIZE(lt9611uxc_modes); i++) {237if (lt9611uxc_modes[i].hdisplay == mode->hdisplay &&238lt9611uxc_modes[i].vdisplay == mode->vdisplay &&239lt9611uxc_modes[i].vrefresh == drm_mode_vrefresh(mode)) {240return <9611uxc_modes[i];241}242}243244return NULL;245}246247static struct mipi_dsi_device *lt9611uxc_attach_dsi(struct lt9611uxc *lt9611uxc,248struct device_node *dsi_node)249{250const struct mipi_dsi_device_info info = { "lt9611uxc", 0, NULL };251struct mipi_dsi_device *dsi;252struct mipi_dsi_host *host;253struct device *dev = lt9611uxc->dev;254int ret;255256host = of_find_mipi_dsi_host_by_node(dsi_node);257if (!host)258return ERR_PTR(dev_err_probe(dev, -EPROBE_DEFER, "failed to find dsi host\n"));259260dsi = devm_mipi_dsi_device_register_full(dev, host, &info);261if (IS_ERR(dsi)) {262dev_err(dev, "failed to create dsi device\n");263return dsi;264}265266dsi->lanes = 4;267dsi->format = MIPI_DSI_FMT_RGB888;268dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |269MIPI_DSI_MODE_VIDEO_HSE;270271ret = devm_mipi_dsi_attach(dev, dsi);272if (ret < 0) {273dev_err(dev, "failed to attach dsi to host\n");274return ERR_PTR(ret);275}276277return dsi;278}279280static int lt9611uxc_bridge_attach(struct drm_bridge *bridge,281struct drm_encoder *encoder,282enum drm_bridge_attach_flags flags)283{284struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge);285286return drm_bridge_attach(encoder, lt9611uxc->next_bridge,287bridge, flags);288}289290static enum drm_mode_status291lt9611uxc_bridge_mode_valid(struct drm_bridge *bridge,292const struct drm_display_info *info,293const struct drm_display_mode *mode)294{295struct lt9611uxc_mode *lt9611uxc_mode;296297lt9611uxc_mode = lt9611uxc_find_mode(mode);298299return lt9611uxc_mode ? MODE_OK : MODE_BAD;300}301302static void lt9611uxc_video_setup(struct lt9611uxc *lt9611uxc,303const struct drm_display_mode *mode)304{305u32 h_total, hactive, hsync_len, hfront_porch;306u32 v_total, vactive, vsync_len, vfront_porch;307308h_total = mode->htotal;309v_total = mode->vtotal;310311hactive = mode->hdisplay;312hsync_len = mode->hsync_end - mode->hsync_start;313hfront_porch = mode->hsync_start - mode->hdisplay;314315vactive = mode->vdisplay;316vsync_len = mode->vsync_end - mode->vsync_start;317vfront_porch = mode->vsync_start - mode->vdisplay;318319regmap_write(lt9611uxc->regmap, 0xd00d, (u8)(v_total / 256));320regmap_write(lt9611uxc->regmap, 0xd00e, (u8)(v_total % 256));321322regmap_write(lt9611uxc->regmap, 0xd00f, (u8)(vactive / 256));323regmap_write(lt9611uxc->regmap, 0xd010, (u8)(vactive % 256));324325regmap_write(lt9611uxc->regmap, 0xd011, (u8)(h_total / 256));326regmap_write(lt9611uxc->regmap, 0xd012, (u8)(h_total % 256));327328regmap_write(lt9611uxc->regmap, 0xd013, (u8)(hactive / 256));329regmap_write(lt9611uxc->regmap, 0xd014, (u8)(hactive % 256));330331regmap_write(lt9611uxc->regmap, 0xd015, (u8)(vsync_len % 256));332333regmap_update_bits(lt9611uxc->regmap, 0xd016, 0xf, (u8)(hsync_len / 256));334regmap_write(lt9611uxc->regmap, 0xd017, (u8)(hsync_len % 256));335336regmap_update_bits(lt9611uxc->regmap, 0xd018, 0xf, (u8)(vfront_porch / 256));337regmap_write(lt9611uxc->regmap, 0xd019, (u8)(vfront_porch % 256));338339regmap_update_bits(lt9611uxc->regmap, 0xd01a, 0xf, (u8)(hfront_porch / 256));340regmap_write(lt9611uxc->regmap, 0xd01b, (u8)(hfront_porch % 256));341}342343static void lt9611uxc_bridge_mode_set(struct drm_bridge *bridge,344const struct drm_display_mode *mode,345const struct drm_display_mode *adj_mode)346{347struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge);348349lt9611uxc_lock(lt9611uxc);350lt9611uxc_video_setup(lt9611uxc, mode);351lt9611uxc_unlock(lt9611uxc);352}353354static enum drm_connector_status355lt9611uxc_bridge_detect(struct drm_bridge *bridge, struct drm_connector *connector)356{357struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge);358unsigned int reg_val = 0;359int ret;360bool connected = true;361362lt9611uxc_lock(lt9611uxc);363364if (lt9611uxc->hpd_supported) {365ret = regmap_read(lt9611uxc->regmap, 0xb023, ®_val);366367if (ret)368dev_err(lt9611uxc->dev, "failed to read hpd status: %d\n", ret);369else370connected = reg_val & BIT(1);371}372lt9611uxc->hdmi_connected = connected;373374lt9611uxc_unlock(lt9611uxc);375376return connected ? connector_status_connected :377connector_status_disconnected;378}379380static int lt9611uxc_wait_for_edid(struct lt9611uxc *lt9611uxc)381{382return wait_event_interruptible_timeout(lt9611uxc->wq, lt9611uxc->edid_read,383msecs_to_jiffies(500));384}385386static int lt9611uxc_get_edid_block(void *data, u8 *buf, unsigned int block, size_t len)387{388struct lt9611uxc *lt9611uxc = data;389int ret;390391if (len > EDID_BLOCK_SIZE)392return -EINVAL;393394if (block >= EDID_NUM_BLOCKS)395return -EINVAL;396397lt9611uxc_lock(lt9611uxc);398399regmap_write(lt9611uxc->regmap, 0xb00b, 0x10);400401regmap_write(lt9611uxc->regmap, 0xb00a, block * EDID_BLOCK_SIZE);402403ret = regmap_noinc_read(lt9611uxc->regmap, 0xb0b0, buf, len);404if (ret)405dev_err(lt9611uxc->dev, "edid read failed: %d\n", ret);406407lt9611uxc_unlock(lt9611uxc);408409return 0;410};411412static const struct drm_edid *lt9611uxc_bridge_edid_read(struct drm_bridge *bridge,413struct drm_connector *connector)414{415struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge);416int ret;417418ret = lt9611uxc_wait_for_edid(lt9611uxc);419if (ret < 0) {420dev_err(lt9611uxc->dev, "wait for EDID failed: %d\n", ret);421return NULL;422} else if (ret == 0) {423dev_err(lt9611uxc->dev, "wait for EDID timeout\n");424return NULL;425}426427return drm_edid_read_custom(connector, lt9611uxc_get_edid_block, lt9611uxc);428}429430static void lt9611uxc_bridge_hpd_notify(struct drm_bridge *bridge,431struct drm_connector *connector,432enum drm_connector_status status)433{434const struct drm_edid *drm_edid;435436if (status == connector_status_disconnected) {437drm_connector_hdmi_audio_plugged_notify(connector, false);438drm_edid_connector_update(connector, NULL);439return;440}441442drm_edid = lt9611uxc_bridge_edid_read(bridge, connector);443drm_edid_connector_update(connector, drm_edid);444drm_edid_free(drm_edid);445446if (status == connector_status_connected)447drm_connector_hdmi_audio_plugged_notify(connector, true);448}449450static int lt9611uxc_hdmi_audio_prepare(struct drm_bridge *bridge,451struct drm_connector *connector,452struct hdmi_codec_daifmt *fmt,453struct hdmi_codec_params *hparms)454{455/*456* LT9611UXC will automatically detect rate and sample size, so no need457* to setup anything here.458*/459return 0;460}461462static void lt9611uxc_hdmi_audio_shutdown(struct drm_bridge *bridge,463struct drm_connector *connector)464{465}466467static const struct drm_bridge_funcs lt9611uxc_bridge_funcs = {468.attach = lt9611uxc_bridge_attach,469.mode_valid = lt9611uxc_bridge_mode_valid,470.mode_set = lt9611uxc_bridge_mode_set,471.detect = lt9611uxc_bridge_detect,472.edid_read = lt9611uxc_bridge_edid_read,473.hpd_notify = lt9611uxc_bridge_hpd_notify,474.hdmi_audio_prepare = lt9611uxc_hdmi_audio_prepare,475.hdmi_audio_shutdown = lt9611uxc_hdmi_audio_shutdown,476};477478static int lt9611uxc_parse_dt(struct device *dev,479struct lt9611uxc *lt9611uxc)480{481lt9611uxc->dsi0_node = of_graph_get_remote_node(dev->of_node, 0, -1);482if (!lt9611uxc->dsi0_node) {483dev_err(lt9611uxc->dev, "failed to get remote node for primary dsi\n");484return -ENODEV;485}486487lt9611uxc->dsi1_node = of_graph_get_remote_node(dev->of_node, 1, -1);488489return drm_of_find_panel_or_bridge(dev->of_node, 2, -1, NULL, <9611uxc->next_bridge);490}491492static int lt9611uxc_gpio_init(struct lt9611uxc *lt9611uxc)493{494struct device *dev = lt9611uxc->dev;495496lt9611uxc->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);497if (IS_ERR(lt9611uxc->reset_gpio)) {498dev_err(dev, "failed to acquire reset gpio\n");499return PTR_ERR(lt9611uxc->reset_gpio);500}501502lt9611uxc->enable_gpio = devm_gpiod_get_optional(dev, "enable", GPIOD_OUT_LOW);503if (IS_ERR(lt9611uxc->enable_gpio)) {504dev_err(dev, "failed to acquire enable gpio\n");505return PTR_ERR(lt9611uxc->enable_gpio);506}507508return 0;509}510511static int lt9611uxc_read_device_rev(struct lt9611uxc *lt9611uxc)512{513unsigned int rev0, rev1, rev2;514int ret;515516lt9611uxc_lock(lt9611uxc);517518ret = regmap_read(lt9611uxc->regmap, 0x8100, &rev0);519ret |= regmap_read(lt9611uxc->regmap, 0x8101, &rev1);520ret |= regmap_read(lt9611uxc->regmap, 0x8102, &rev2);521if (ret)522dev_err(lt9611uxc->dev, "failed to read revision: %d\n", ret);523else524dev_info(lt9611uxc->dev, "LT9611 revision: 0x%02x.%02x.%02x\n", rev0, rev1, rev2);525526lt9611uxc_unlock(lt9611uxc);527528return ret;529}530531static int lt9611uxc_read_version(struct lt9611uxc *lt9611uxc)532{533unsigned int rev;534int ret;535536lt9611uxc_lock(lt9611uxc);537538ret = regmap_read(lt9611uxc->regmap, 0xb021, &rev);539if (ret)540dev_err(lt9611uxc->dev, "failed to read revision: %d\n", ret);541else542dev_info(lt9611uxc->dev, "LT9611 version: 0x%02x\n", rev);543544lt9611uxc_unlock(lt9611uxc);545546return ret < 0 ? ret : rev;547}548549#define LT9611UXC_FW_PAGE_SIZE 32550static void lt9611uxc_firmware_write_page(struct lt9611uxc *lt9611uxc, u16 addr, const u8 *buf)551{552struct reg_sequence seq_write_prepare[] = {553REG_SEQ0(0x805a, 0x04),554REG_SEQ0(0x805a, 0x00),555556REG_SEQ0(0x805e, 0xdf),557REG_SEQ0(0x805a, 0x20),558REG_SEQ0(0x805a, 0x00),559REG_SEQ0(0x8058, 0x21),560};561562struct reg_sequence seq_write_addr[] = {563REG_SEQ0(0x805b, (addr >> 16) & 0xff),564REG_SEQ0(0x805c, (addr >> 8) & 0xff),565REG_SEQ0(0x805d, addr & 0xff),566REG_SEQ0(0x805a, 0x10),567REG_SEQ0(0x805a, 0x00),568};569570regmap_write(lt9611uxc->regmap, 0x8108, 0xbf);571msleep(20);572regmap_write(lt9611uxc->regmap, 0x8108, 0xff);573msleep(20);574regmap_multi_reg_write(lt9611uxc->regmap, seq_write_prepare, ARRAY_SIZE(seq_write_prepare));575regmap_noinc_write(lt9611uxc->regmap, 0x8059, buf, LT9611UXC_FW_PAGE_SIZE);576regmap_multi_reg_write(lt9611uxc->regmap, seq_write_addr, ARRAY_SIZE(seq_write_addr));577msleep(20);578}579580static void lt9611uxc_firmware_read_page(struct lt9611uxc *lt9611uxc, u16 addr, char *buf)581{582struct reg_sequence seq_read_page[] = {583REG_SEQ0(0x805a, 0xa0),584REG_SEQ0(0x805a, 0x80),585REG_SEQ0(0x805b, (addr >> 16) & 0xff),586REG_SEQ0(0x805c, (addr >> 8) & 0xff),587REG_SEQ0(0x805d, addr & 0xff),588REG_SEQ0(0x805a, 0x90),589REG_SEQ0(0x805a, 0x80),590REG_SEQ0(0x8058, 0x21),591};592593regmap_multi_reg_write(lt9611uxc->regmap, seq_read_page, ARRAY_SIZE(seq_read_page));594regmap_noinc_read(lt9611uxc->regmap, 0x805f, buf, LT9611UXC_FW_PAGE_SIZE);595}596597static char *lt9611uxc_firmware_read(struct lt9611uxc *lt9611uxc, size_t size)598{599struct reg_sequence seq_read_setup[] = {600REG_SEQ0(0x805a, 0x84),601REG_SEQ0(0x805a, 0x80),602};603604char *readbuf;605u16 offset;606607readbuf = kzalloc(ALIGN(size, 32), GFP_KERNEL);608if (!readbuf)609return NULL;610611regmap_multi_reg_write(lt9611uxc->regmap, seq_read_setup, ARRAY_SIZE(seq_read_setup));612613for (offset = 0;614offset < size;615offset += LT9611UXC_FW_PAGE_SIZE)616lt9611uxc_firmware_read_page(lt9611uxc, offset, &readbuf[offset]);617618return readbuf;619}620621static int lt9611uxc_firmware_update(struct lt9611uxc *lt9611uxc)622{623int ret;624u16 offset;625size_t remain;626char *readbuf;627const struct firmware *fw;628629struct reg_sequence seq_setup[] = {630REG_SEQ0(0x805e, 0xdf),631REG_SEQ0(0x8058, 0x00),632REG_SEQ0(0x8059, 0x50),633REG_SEQ0(0x805a, 0x10),634REG_SEQ0(0x805a, 0x00),635};636637638struct reg_sequence seq_block_erase[] = {639REG_SEQ0(0x805a, 0x04),640REG_SEQ0(0x805a, 0x00),641REG_SEQ0(0x805b, 0x00),642REG_SEQ0(0x805c, 0x00),643REG_SEQ0(0x805d, 0x00),644REG_SEQ0(0x805a, 0x01),645REG_SEQ0(0x805a, 0x00),646};647648ret = request_firmware(&fw, FW_FILE, lt9611uxc->dev);649if (ret < 0)650return ret;651652dev_info(lt9611uxc->dev, "Updating firmware\n");653lt9611uxc_lock(lt9611uxc);654655regmap_multi_reg_write(lt9611uxc->regmap, seq_setup, ARRAY_SIZE(seq_setup));656657/*658* Need erase block 2 timess here. Sometimes, block erase can fail.659* This is a workaroud.660*/661regmap_multi_reg_write(lt9611uxc->regmap, seq_block_erase, ARRAY_SIZE(seq_block_erase));662msleep(3000);663regmap_multi_reg_write(lt9611uxc->regmap, seq_block_erase, ARRAY_SIZE(seq_block_erase));664msleep(3000);665666for (offset = 0, remain = fw->size;667remain >= LT9611UXC_FW_PAGE_SIZE;668offset += LT9611UXC_FW_PAGE_SIZE, remain -= LT9611UXC_FW_PAGE_SIZE)669lt9611uxc_firmware_write_page(lt9611uxc, offset, fw->data + offset);670671if (remain > 0) {672char buf[LT9611UXC_FW_PAGE_SIZE];673674memset(buf, 0xff, LT9611UXC_FW_PAGE_SIZE);675memcpy(buf, fw->data + offset, remain);676lt9611uxc_firmware_write_page(lt9611uxc, offset, buf);677}678msleep(20);679680readbuf = lt9611uxc_firmware_read(lt9611uxc, fw->size);681if (!readbuf) {682ret = -ENOMEM;683goto out;684}685686if (!memcmp(readbuf, fw->data, fw->size)) {687dev_err(lt9611uxc->dev, "Firmware update failed\n");688print_hex_dump(KERN_ERR, "fw: ", DUMP_PREFIX_OFFSET, 16, 1, readbuf, fw->size, false);689ret = -EINVAL;690} else {691dev_info(lt9611uxc->dev, "Firmware updates successfully\n");692ret = 0;693}694kfree(readbuf);695696out:697lt9611uxc_unlock(lt9611uxc);698lt9611uxc_reset(lt9611uxc);699release_firmware(fw);700701return ret;702}703704static ssize_t lt9611uxc_firmware_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t len)705{706struct lt9611uxc *lt9611uxc = dev_get_drvdata(dev);707int ret;708709ret = lt9611uxc_firmware_update(lt9611uxc);710if (ret < 0)711return ret;712return len;713}714715static ssize_t lt9611uxc_firmware_show(struct device *dev, struct device_attribute *attr, char *buf)716{717struct lt9611uxc *lt9611uxc = dev_get_drvdata(dev);718719return sysfs_emit(buf, "%02x\n", lt9611uxc->fw_version);720}721722static DEVICE_ATTR_RW(lt9611uxc_firmware);723724static struct attribute *lt9611uxc_attrs[] = {725&dev_attr_lt9611uxc_firmware.attr,726NULL,727};728729static const struct attribute_group lt9611uxc_attr_group = {730.attrs = lt9611uxc_attrs,731};732733static const struct attribute_group *lt9611uxc_attr_groups[] = {734<9611uxc_attr_group,735NULL,736};737738static int lt9611uxc_probe(struct i2c_client *client)739{740struct lt9611uxc *lt9611uxc;741struct device *dev = &client->dev;742int ret;743bool fw_updated = false;744745if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {746dev_err(dev, "device doesn't support I2C\n");747return -ENODEV;748}749750lt9611uxc = devm_drm_bridge_alloc(dev, struct lt9611uxc, bridge, <9611uxc_bridge_funcs);751if (IS_ERR(lt9611uxc))752return PTR_ERR(lt9611uxc);753754lt9611uxc->dev = dev;755lt9611uxc->client = client;756mutex_init(<9611uxc->ocm_lock);757758lt9611uxc->regmap = devm_regmap_init_i2c(client, <9611uxc_regmap_config);759if (IS_ERR(lt9611uxc->regmap)) {760dev_err(lt9611uxc->dev, "regmap i2c init failed\n");761return PTR_ERR(lt9611uxc->regmap);762}763764ret = lt9611uxc_parse_dt(dev, lt9611uxc);765if (ret) {766dev_err(dev, "failed to parse device tree\n");767return ret;768}769770ret = lt9611uxc_gpio_init(lt9611uxc);771if (ret < 0)772goto err_of_put;773774ret = lt9611uxc_regulator_init(lt9611uxc);775if (ret < 0)776goto err_of_put;777778lt9611uxc_assert_5v(lt9611uxc);779780ret = lt9611uxc_regulator_enable(lt9611uxc);781if (ret)782goto err_of_put;783784lt9611uxc_reset(lt9611uxc);785786ret = lt9611uxc_read_device_rev(lt9611uxc);787if (ret) {788dev_err(dev, "failed to read chip rev\n");789goto err_disable_regulators;790}791792retry:793ret = lt9611uxc_read_version(lt9611uxc);794if (ret < 0) {795dev_err(dev, "failed to read FW version\n");796goto err_disable_regulators;797} else if (ret == 0) {798if (!fw_updated) {799fw_updated = true;800dev_err(dev, "FW version 0, enforcing firmware update\n");801ret = lt9611uxc_firmware_update(lt9611uxc);802if (ret < 0)803goto err_disable_regulators;804else805goto retry;806} else {807dev_err(dev, "FW version 0, update failed\n");808ret = -EOPNOTSUPP;809goto err_disable_regulators;810}811} else if (ret < 0x40) {812dev_info(dev, "FW version 0x%x, HPD not supported\n", ret);813} else {814lt9611uxc->hpd_supported = true;815}816lt9611uxc->fw_version = ret;817818init_waitqueue_head(<9611uxc->wq);819INIT_WORK(<9611uxc->work, lt9611uxc_hpd_work);820821ret = request_threaded_irq(client->irq, NULL,822lt9611uxc_irq_thread_handler,823IRQF_ONESHOT, "lt9611uxc", lt9611uxc);824if (ret) {825dev_err(dev, "failed to request irq\n");826goto err_disable_regulators;827}828829i2c_set_clientdata(client, lt9611uxc);830831lt9611uxc->bridge.of_node = client->dev.of_node;832lt9611uxc->bridge.ops = DRM_BRIDGE_OP_DETECT |833DRM_BRIDGE_OP_EDID |834DRM_BRIDGE_OP_HDMI_AUDIO;835if (lt9611uxc->hpd_supported)836lt9611uxc->bridge.ops |= DRM_BRIDGE_OP_HPD;837lt9611uxc->bridge.type = DRM_MODE_CONNECTOR_HDMIA;838839lt9611uxc->bridge.hdmi_audio_dev = dev;840lt9611uxc->bridge.hdmi_audio_max_i2s_playback_channels = 2;841lt9611uxc->bridge.hdmi_audio_dai_port = 2;842843drm_bridge_add(<9611uxc->bridge);844845/* Attach primary DSI */846lt9611uxc->dsi0 = lt9611uxc_attach_dsi(lt9611uxc, lt9611uxc->dsi0_node);847if (IS_ERR(lt9611uxc->dsi0)) {848ret = PTR_ERR(lt9611uxc->dsi0);849goto err_remove_bridge;850}851852/* Attach secondary DSI, if specified */853if (lt9611uxc->dsi1_node) {854lt9611uxc->dsi1 = lt9611uxc_attach_dsi(lt9611uxc, lt9611uxc->dsi1_node);855if (IS_ERR(lt9611uxc->dsi1)) {856ret = PTR_ERR(lt9611uxc->dsi1);857goto err_remove_bridge;858}859}860861return 0;862863err_remove_bridge:864free_irq(client->irq, lt9611uxc);865cancel_work_sync(<9611uxc->work);866drm_bridge_remove(<9611uxc->bridge);867868err_disable_regulators:869regulator_bulk_disable(ARRAY_SIZE(lt9611uxc->supplies), lt9611uxc->supplies);870871err_of_put:872of_node_put(lt9611uxc->dsi1_node);873of_node_put(lt9611uxc->dsi0_node);874875return ret;876}877878static void lt9611uxc_remove(struct i2c_client *client)879{880struct lt9611uxc *lt9611uxc = i2c_get_clientdata(client);881882free_irq(client->irq, lt9611uxc);883cancel_work_sync(<9611uxc->work);884drm_bridge_remove(<9611uxc->bridge);885886mutex_destroy(<9611uxc->ocm_lock);887888regulator_bulk_disable(ARRAY_SIZE(lt9611uxc->supplies), lt9611uxc->supplies);889890of_node_put(lt9611uxc->dsi1_node);891of_node_put(lt9611uxc->dsi0_node);892}893894static const struct i2c_device_id lt9611uxc_id[] = {895{ "lontium,lt9611uxc" },896{ /* sentinel */ }897};898899static const struct of_device_id lt9611uxc_match_table[] = {900{ .compatible = "lontium,lt9611uxc" },901{ /* sentinel */ }902};903MODULE_DEVICE_TABLE(of, lt9611uxc_match_table);904905static struct i2c_driver lt9611uxc_driver = {906.driver = {907.name = "lt9611uxc",908.of_match_table = lt9611uxc_match_table,909.dev_groups = lt9611uxc_attr_groups,910},911.probe = lt9611uxc_probe,912.remove = lt9611uxc_remove,913.id_table = lt9611uxc_id,914};915module_i2c_driver(lt9611uxc_driver);916917MODULE_AUTHOR("Dmitry Baryshkov <[email protected]>");918MODULE_DESCRIPTION("Lontium LT9611UXC DSI/HDMI bridge driver");919MODULE_LICENSE("GPL v2");920921MODULE_FIRMWARE(FW_FILE);922923924