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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/drivers/gpu/drm/bridge/sii902x.c
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1
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2018 Renesas Electronics
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*
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* Copyright (C) 2016 Atmel
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* Bo Shen <[email protected]>
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*
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* Authors: Bo Shen <[email protected]>
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* Boris Brezillon <[email protected]>
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* Wu, Songjun <[email protected]>
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*
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* Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.
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*/
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#include <linux/gpio/consumer.h>
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#include <linux/i2c-mux.h>
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#include <linux/i2c.h>
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#include <linux/media-bus-format.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#include <linux/clk.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_bridge.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_edid.h>
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#include <drm/drm_print.h>
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#include <drm/drm_probe_helper.h>
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#include <sound/hdmi-codec.h>
32
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#define SII902X_TPI_VIDEO_DATA 0x0
34
35
#define SII902X_TPI_PIXEL_REPETITION 0x8
36
#define SII902X_TPI_AVI_PIXEL_REP_BUS_24BIT BIT(5)
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#define SII902X_TPI_AVI_PIXEL_REP_RISING_EDGE BIT(4)
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#define SII902X_TPI_AVI_PIXEL_REP_4X 3
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#define SII902X_TPI_AVI_PIXEL_REP_2X 1
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#define SII902X_TPI_AVI_PIXEL_REP_NONE 0
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#define SII902X_TPI_CLK_RATIO_HALF (0 << 6)
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#define SII902X_TPI_CLK_RATIO_1X (1 << 6)
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#define SII902X_TPI_CLK_RATIO_2X (2 << 6)
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#define SII902X_TPI_CLK_RATIO_4X (3 << 6)
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#define SII902X_TPI_AVI_IN_FORMAT 0x9
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#define SII902X_TPI_AVI_INPUT_BITMODE_12BIT BIT(7)
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#define SII902X_TPI_AVI_INPUT_DITHER BIT(6)
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#define SII902X_TPI_AVI_INPUT_RANGE_LIMITED (2 << 2)
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#define SII902X_TPI_AVI_INPUT_RANGE_FULL (1 << 2)
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#define SII902X_TPI_AVI_INPUT_RANGE_AUTO (0 << 2)
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#define SII902X_TPI_AVI_INPUT_COLORSPACE_BLACK (3 << 0)
53
#define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV422 (2 << 0)
54
#define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV444 (1 << 0)
55
#define SII902X_TPI_AVI_INPUT_COLORSPACE_RGB (0 << 0)
56
57
#define SII902X_TPI_AVI_INFOFRAME 0x0c
58
59
#define SII902X_SYS_CTRL_DATA 0x1a
60
#define SII902X_SYS_CTRL_PWR_DWN BIT(4)
61
#define SII902X_SYS_CTRL_AV_MUTE BIT(3)
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#define SII902X_SYS_CTRL_DDC_BUS_REQ BIT(2)
63
#define SII902X_SYS_CTRL_DDC_BUS_GRTD BIT(1)
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#define SII902X_SYS_CTRL_OUTPUT_MODE BIT(0)
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#define SII902X_SYS_CTRL_OUTPUT_HDMI 1
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#define SII902X_SYS_CTRL_OUTPUT_DVI 0
67
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#define SII902X_REG_CHIPID(n) (0x1b + (n))
69
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#define SII902X_PWR_STATE_CTRL 0x1e
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#define SII902X_AVI_POWER_STATE_MSK GENMASK(1, 0)
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#define SII902X_AVI_POWER_STATE_D(l) ((l) & SII902X_AVI_POWER_STATE_MSK)
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/* Audio */
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#define SII902X_TPI_I2S_ENABLE_MAPPING_REG 0x1f
76
#define SII902X_TPI_I2S_CONFIG_FIFO0 (0 << 0)
77
#define SII902X_TPI_I2S_CONFIG_FIFO1 (1 << 0)
78
#define SII902X_TPI_I2S_CONFIG_FIFO2 (2 << 0)
79
#define SII902X_TPI_I2S_CONFIG_FIFO3 (3 << 0)
80
#define SII902X_TPI_I2S_LEFT_RIGHT_SWAP (1 << 2)
81
#define SII902X_TPI_I2S_AUTO_DOWNSAMPLE (1 << 3)
82
#define SII902X_TPI_I2S_SELECT_SD0 (0 << 4)
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#define SII902X_TPI_I2S_SELECT_SD1 (1 << 4)
84
#define SII902X_TPI_I2S_SELECT_SD2 (2 << 4)
85
#define SII902X_TPI_I2S_SELECT_SD3 (3 << 4)
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#define SII902X_TPI_I2S_FIFO_ENABLE (1 << 7)
87
88
#define SII902X_TPI_I2S_INPUT_CONFIG_REG 0x20
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#define SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES (0 << 0)
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#define SII902X_TPI_I2S_FIRST_BIT_SHIFT_NO (1 << 0)
91
#define SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST (0 << 1)
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#define SII902X_TPI_I2S_SD_DIRECTION_LSB_FIRST (1 << 1)
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#define SII902X_TPI_I2S_SD_JUSTIFY_LEFT (0 << 2)
94
#define SII902X_TPI_I2S_SD_JUSTIFY_RIGHT (1 << 2)
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#define SII902X_TPI_I2S_WS_POLARITY_LOW (0 << 3)
96
#define SII902X_TPI_I2S_WS_POLARITY_HIGH (1 << 3)
97
#define SII902X_TPI_I2S_MCLK_MULTIPLIER_128 (0 << 4)
98
#define SII902X_TPI_I2S_MCLK_MULTIPLIER_256 (1 << 4)
99
#define SII902X_TPI_I2S_MCLK_MULTIPLIER_384 (2 << 4)
100
#define SII902X_TPI_I2S_MCLK_MULTIPLIER_512 (3 << 4)
101
#define SII902X_TPI_I2S_MCLK_MULTIPLIER_768 (4 << 4)
102
#define SII902X_TPI_I2S_MCLK_MULTIPLIER_1024 (5 << 4)
103
#define SII902X_TPI_I2S_MCLK_MULTIPLIER_1152 (6 << 4)
104
#define SII902X_TPI_I2S_MCLK_MULTIPLIER_192 (7 << 4)
105
#define SII902X_TPI_I2S_SCK_EDGE_FALLING (0 << 7)
106
#define SII902X_TPI_I2S_SCK_EDGE_RISING (1 << 7)
107
108
#define SII902X_TPI_I2S_STRM_HDR_BASE 0x21
109
#define SII902X_TPI_I2S_STRM_HDR_SIZE 5
110
111
#define SII902X_TPI_AUDIO_CONFIG_BYTE2_REG 0x26
112
#define SII902X_TPI_AUDIO_CODING_STREAM_HEADER (0 << 0)
113
#define SII902X_TPI_AUDIO_CODING_PCM (1 << 0)
114
#define SII902X_TPI_AUDIO_CODING_AC3 (2 << 0)
115
#define SII902X_TPI_AUDIO_CODING_MPEG1 (3 << 0)
116
#define SII902X_TPI_AUDIO_CODING_MP3 (4 << 0)
117
#define SII902X_TPI_AUDIO_CODING_MPEG2 (5 << 0)
118
#define SII902X_TPI_AUDIO_CODING_AAC (6 << 0)
119
#define SII902X_TPI_AUDIO_CODING_DTS (7 << 0)
120
#define SII902X_TPI_AUDIO_CODING_ATRAC (8 << 0)
121
#define SII902X_TPI_AUDIO_MUTE_DISABLE (0 << 4)
122
#define SII902X_TPI_AUDIO_MUTE_ENABLE (1 << 4)
123
#define SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS (0 << 5)
124
#define SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS (1 << 5)
125
#define SII902X_TPI_AUDIO_INTERFACE_DISABLE (0 << 6)
126
#define SII902X_TPI_AUDIO_INTERFACE_SPDIF (1 << 6)
127
#define SII902X_TPI_AUDIO_INTERFACE_I2S (2 << 6)
128
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#define SII902X_TPI_AUDIO_CONFIG_BYTE3_REG 0x27
130
#define SII902X_TPI_AUDIO_FREQ_STREAM (0 << 3)
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#define SII902X_TPI_AUDIO_FREQ_32KHZ (1 << 3)
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#define SII902X_TPI_AUDIO_FREQ_44KHZ (2 << 3)
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#define SII902X_TPI_AUDIO_FREQ_48KHZ (3 << 3)
134
#define SII902X_TPI_AUDIO_FREQ_88KHZ (4 << 3)
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#define SII902X_TPI_AUDIO_FREQ_96KHZ (5 << 3)
136
#define SII902X_TPI_AUDIO_FREQ_176KHZ (6 << 3)
137
#define SII902X_TPI_AUDIO_FREQ_192KHZ (7 << 3)
138
#define SII902X_TPI_AUDIO_SAMPLE_SIZE_STREAM (0 << 6)
139
#define SII902X_TPI_AUDIO_SAMPLE_SIZE_16 (1 << 6)
140
#define SII902X_TPI_AUDIO_SAMPLE_SIZE_20 (2 << 6)
141
#define SII902X_TPI_AUDIO_SAMPLE_SIZE_24 (3 << 6)
142
143
#define SII902X_TPI_AUDIO_CONFIG_BYTE4_REG 0x28
144
145
#define SII902X_INT_ENABLE 0x3c
146
#define SII902X_INT_STATUS 0x3d
147
#define SII902X_HOTPLUG_EVENT BIT(0)
148
#define SII902X_PLUGGED_STATUS BIT(2)
149
150
#define SII902X_REG_TPI_RQB 0xc7
151
152
/* Indirect internal register access */
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#define SII902X_IND_SET_PAGE 0xbc
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#define SII902X_IND_OFFSET 0xbd
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#define SII902X_IND_VALUE 0xbe
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157
#define SII902X_TPI_MISC_INFOFRAME_BASE 0xbf
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#define SII902X_TPI_MISC_INFOFRAME_END 0xde
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#define SII902X_TPI_MISC_INFOFRAME_SIZE \
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(SII902X_TPI_MISC_INFOFRAME_END - SII902X_TPI_MISC_INFOFRAME_BASE)
161
162
#define SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS 500
163
164
#define SII902X_AUDIO_PORT_INDEX 3
165
166
/*
167
* The maximum resolution supported by the HDMI bridge is 1080p@60Hz
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* and 1920x1200 requiring a pixel clock of 165MHz and the minimum
169
* resolution supported is 480p@60Hz requiring a pixel clock of 25MHz
170
*/
171
#define SII902X_MIN_PIXEL_CLOCK_KHZ 25000
172
#define SII902X_MAX_PIXEL_CLOCK_KHZ 165000
173
174
struct sii902x {
175
struct i2c_client *i2c;
176
struct regmap *regmap;
177
struct drm_bridge bridge;
178
struct drm_bridge *next_bridge;
179
struct drm_connector connector;
180
struct gpio_desc *reset_gpio;
181
struct i2c_mux_core *i2cmux;
182
bool sink_is_hdmi;
183
u32 bus_width;
184
185
/*
186
* Mutex protects audio and video functions from interfering
187
* each other, by keeping their i2c command sequences atomic.
188
*/
189
struct mutex mutex;
190
struct sii902x_audio {
191
struct platform_device *pdev;
192
struct clk *mclk;
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u32 i2s_fifo_sequence[4];
194
} audio;
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};
196
197
static int sii902x_read_unlocked(struct i2c_client *i2c, u8 reg, u8 *val)
198
{
199
union i2c_smbus_data data;
200
int ret;
201
202
ret = __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags,
203
I2C_SMBUS_READ, reg, I2C_SMBUS_BYTE_DATA, &data);
204
205
if (ret < 0)
206
return ret;
207
208
*val = data.byte;
209
return 0;
210
}
211
212
static int sii902x_write_unlocked(struct i2c_client *i2c, u8 reg, u8 val)
213
{
214
union i2c_smbus_data data;
215
216
data.byte = val;
217
218
return __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags,
219
I2C_SMBUS_WRITE, reg, I2C_SMBUS_BYTE_DATA,
220
&data);
221
}
222
223
static int sii902x_update_bits_unlocked(struct i2c_client *i2c, u8 reg, u8 mask,
224
u8 val)
225
{
226
int ret;
227
u8 status;
228
229
ret = sii902x_read_unlocked(i2c, reg, &status);
230
if (ret)
231
return ret;
232
status &= ~mask;
233
status |= val & mask;
234
return sii902x_write_unlocked(i2c, reg, status);
235
}
236
237
static inline struct sii902x *bridge_to_sii902x(struct drm_bridge *bridge)
238
{
239
return container_of(bridge, struct sii902x, bridge);
240
}
241
242
static inline struct sii902x *connector_to_sii902x(struct drm_connector *con)
243
{
244
return container_of(con, struct sii902x, connector);
245
}
246
247
static void sii902x_reset(struct sii902x *sii902x)
248
{
249
if (!sii902x->reset_gpio)
250
return;
251
252
gpiod_set_value_cansleep(sii902x->reset_gpio, 1);
253
254
/* The datasheet says treset-min = 100us. Make it 150us to be sure. */
255
usleep_range(150, 200);
256
257
gpiod_set_value_cansleep(sii902x->reset_gpio, 0);
258
}
259
260
static enum drm_connector_status sii902x_detect(struct sii902x *sii902x)
261
{
262
unsigned int status;
263
264
mutex_lock(&sii902x->mutex);
265
266
regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);
267
268
mutex_unlock(&sii902x->mutex);
269
270
return (status & SII902X_PLUGGED_STATUS) ?
271
connector_status_connected : connector_status_disconnected;
272
}
273
274
static enum drm_connector_status
275
sii902x_connector_detect(struct drm_connector *connector, bool force)
276
{
277
struct sii902x *sii902x = connector_to_sii902x(connector);
278
279
return sii902x_detect(sii902x);
280
}
281
282
static const struct drm_connector_funcs sii902x_connector_funcs = {
283
.detect = sii902x_connector_detect,
284
.fill_modes = drm_helper_probe_single_connector_modes,
285
.destroy = drm_connector_cleanup,
286
.reset = drm_atomic_helper_connector_reset,
287
.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
288
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
289
};
290
291
static const struct drm_edid *sii902x_edid_read(struct sii902x *sii902x,
292
struct drm_connector *connector)
293
{
294
const struct drm_edid *drm_edid;
295
296
mutex_lock(&sii902x->mutex);
297
298
drm_edid = drm_edid_read_ddc(connector, sii902x->i2cmux->adapter[0]);
299
300
mutex_unlock(&sii902x->mutex);
301
302
return drm_edid;
303
}
304
305
static int sii902x_get_modes(struct drm_connector *connector)
306
{
307
struct sii902x *sii902x = connector_to_sii902x(connector);
308
const struct drm_edid *drm_edid;
309
int num = 0;
310
311
drm_edid = sii902x_edid_read(sii902x, connector);
312
drm_edid_connector_update(connector, drm_edid);
313
if (drm_edid) {
314
num = drm_edid_connector_add_modes(connector);
315
drm_edid_free(drm_edid);
316
}
317
318
sii902x->sink_is_hdmi = connector->display_info.is_hdmi;
319
320
return num;
321
}
322
323
static const struct drm_connector_helper_funcs sii902x_connector_helper_funcs = {
324
.get_modes = sii902x_get_modes,
325
};
326
327
static void sii902x_bridge_atomic_disable(struct drm_bridge *bridge,
328
struct drm_atomic_state *state)
329
{
330
struct sii902x *sii902x = bridge_to_sii902x(bridge);
331
332
mutex_lock(&sii902x->mutex);
333
334
regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,
335
SII902X_SYS_CTRL_PWR_DWN,
336
SII902X_SYS_CTRL_PWR_DWN);
337
338
mutex_unlock(&sii902x->mutex);
339
}
340
341
static void sii902x_bridge_atomic_enable(struct drm_bridge *bridge,
342
struct drm_atomic_state *state)
343
{
344
struct sii902x *sii902x = bridge_to_sii902x(bridge);
345
346
mutex_lock(&sii902x->mutex);
347
348
regmap_update_bits(sii902x->regmap, SII902X_PWR_STATE_CTRL,
349
SII902X_AVI_POWER_STATE_MSK,
350
SII902X_AVI_POWER_STATE_D(0));
351
regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,
352
SII902X_SYS_CTRL_PWR_DWN, 0);
353
354
mutex_unlock(&sii902x->mutex);
355
}
356
357
static void sii902x_bridge_mode_set(struct drm_bridge *bridge,
358
const struct drm_display_mode *mode,
359
const struct drm_display_mode *adj)
360
{
361
struct sii902x *sii902x = bridge_to_sii902x(bridge);
362
u8 output_mode = SII902X_SYS_CTRL_OUTPUT_DVI;
363
struct regmap *regmap = sii902x->regmap;
364
u8 buf[HDMI_INFOFRAME_SIZE(AVI)];
365
struct hdmi_avi_infoframe frame;
366
u16 pixel_clock_10kHz = adj->clock / 10;
367
int ret;
368
369
if (sii902x->sink_is_hdmi)
370
output_mode = SII902X_SYS_CTRL_OUTPUT_HDMI;
371
372
buf[0] = pixel_clock_10kHz & 0xff;
373
buf[1] = pixel_clock_10kHz >> 8;
374
buf[2] = drm_mode_vrefresh(adj);
375
buf[3] = 0x00;
376
buf[4] = adj->hdisplay;
377
buf[5] = adj->hdisplay >> 8;
378
buf[6] = adj->vdisplay;
379
buf[7] = adj->vdisplay >> 8;
380
buf[8] = SII902X_TPI_CLK_RATIO_1X | SII902X_TPI_AVI_PIXEL_REP_NONE |
381
SII902X_TPI_AVI_PIXEL_REP_BUS_24BIT;
382
buf[9] = SII902X_TPI_AVI_INPUT_RANGE_AUTO |
383
SII902X_TPI_AVI_INPUT_COLORSPACE_RGB;
384
385
mutex_lock(&sii902x->mutex);
386
387
ret = regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,
388
SII902X_SYS_CTRL_OUTPUT_MODE, output_mode);
389
if (ret)
390
goto out;
391
392
ret = regmap_bulk_write(regmap, SII902X_TPI_VIDEO_DATA, buf, 10);
393
if (ret)
394
goto out;
395
396
ret = drm_hdmi_avi_infoframe_from_display_mode(&frame,
397
&sii902x->connector, adj);
398
if (ret < 0) {
399
DRM_ERROR("couldn't fill AVI infoframe\n");
400
goto out;
401
}
402
403
ret = hdmi_avi_infoframe_pack(&frame, buf, sizeof(buf));
404
if (ret < 0) {
405
DRM_ERROR("failed to pack AVI infoframe: %d\n", ret);
406
goto out;
407
}
408
409
/* Do not send the infoframe header, but keep the CRC field. */
410
regmap_bulk_write(regmap, SII902X_TPI_AVI_INFOFRAME,
411
buf + HDMI_INFOFRAME_HEADER_SIZE - 1,
412
HDMI_AVI_INFOFRAME_SIZE + 1);
413
414
out:
415
mutex_unlock(&sii902x->mutex);
416
}
417
418
static int sii902x_bridge_attach(struct drm_bridge *bridge,
419
struct drm_encoder *encoder,
420
enum drm_bridge_attach_flags flags)
421
{
422
struct sii902x *sii902x = bridge_to_sii902x(bridge);
423
u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
424
struct drm_device *drm = bridge->dev;
425
int ret;
426
427
if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)
428
return drm_bridge_attach(encoder, sii902x->next_bridge,
429
bridge, flags);
430
431
drm_connector_helper_add(&sii902x->connector,
432
&sii902x_connector_helper_funcs);
433
434
if (!drm_core_check_feature(drm, DRIVER_ATOMIC)) {
435
dev_err(&sii902x->i2c->dev,
436
"sii902x driver is only compatible with DRM devices supporting atomic updates\n");
437
return -ENOTSUPP;
438
}
439
440
ret = drm_connector_init(drm, &sii902x->connector,
441
&sii902x_connector_funcs,
442
DRM_MODE_CONNECTOR_HDMIA);
443
if (ret)
444
return ret;
445
446
if (sii902x->i2c->irq > 0)
447
sii902x->connector.polled = DRM_CONNECTOR_POLL_HPD;
448
else
449
sii902x->connector.polled = DRM_CONNECTOR_POLL_CONNECT;
450
451
ret = drm_display_info_set_bus_formats(&sii902x->connector.display_info,
452
&bus_format, 1);
453
if (ret)
454
return ret;
455
456
drm_connector_attach_encoder(&sii902x->connector, encoder);
457
458
return 0;
459
}
460
461
static enum drm_connector_status
462
sii902x_bridge_detect(struct drm_bridge *bridge, struct drm_connector *connector)
463
{
464
struct sii902x *sii902x = bridge_to_sii902x(bridge);
465
466
return sii902x_detect(sii902x);
467
}
468
469
static const struct drm_edid *sii902x_bridge_edid_read(struct drm_bridge *bridge,
470
struct drm_connector *connector)
471
{
472
struct sii902x *sii902x = bridge_to_sii902x(bridge);
473
474
return sii902x_edid_read(sii902x, connector);
475
}
476
477
static u32 *sii902x_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge,
478
struct drm_bridge_state *bridge_state,
479
struct drm_crtc_state *crtc_state,
480
struct drm_connector_state *conn_state,
481
u32 output_fmt,
482
unsigned int *num_input_fmts)
483
{
484
485
struct sii902x *sii902x = bridge_to_sii902x(bridge);
486
u32 *input_fmts;
487
488
*num_input_fmts = 0;
489
490
input_fmts = kcalloc(1, sizeof(*input_fmts), GFP_KERNEL);
491
if (!input_fmts)
492
return NULL;
493
494
switch (sii902x->bus_width) {
495
case 16:
496
input_fmts[0] = MEDIA_BUS_FMT_RGB565_1X16;
497
break;
498
case 18:
499
input_fmts[0] = MEDIA_BUS_FMT_RGB666_1X18;
500
break;
501
case 24:
502
input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24;
503
break;
504
default:
505
return NULL;
506
}
507
508
*num_input_fmts = 1;
509
510
return input_fmts;
511
}
512
513
static int sii902x_bridge_atomic_check(struct drm_bridge *bridge,
514
struct drm_bridge_state *bridge_state,
515
struct drm_crtc_state *crtc_state,
516
struct drm_connector_state *conn_state)
517
{
518
if (crtc_state->mode.clock < SII902X_MIN_PIXEL_CLOCK_KHZ ||
519
crtc_state->mode.clock > SII902X_MAX_PIXEL_CLOCK_KHZ)
520
return -EINVAL;
521
522
/*
523
* There might be flags negotiation supported in future but
524
* set the bus flags in atomic_check statically for now.
525
*/
526
bridge_state->input_bus_cfg.flags = bridge->timings->input_bus_flags;
527
528
return 0;
529
}
530
531
static enum drm_mode_status
532
sii902x_bridge_mode_valid(struct drm_bridge *bridge,
533
const struct drm_display_info *info,
534
const struct drm_display_mode *mode)
535
{
536
if (mode->clock < SII902X_MIN_PIXEL_CLOCK_KHZ)
537
return MODE_CLOCK_LOW;
538
539
if (mode->clock > SII902X_MAX_PIXEL_CLOCK_KHZ)
540
return MODE_CLOCK_HIGH;
541
542
return MODE_OK;
543
}
544
545
static const struct drm_bridge_funcs sii902x_bridge_funcs = {
546
.attach = sii902x_bridge_attach,
547
.mode_set = sii902x_bridge_mode_set,
548
.atomic_disable = sii902x_bridge_atomic_disable,
549
.atomic_enable = sii902x_bridge_atomic_enable,
550
.detect = sii902x_bridge_detect,
551
.edid_read = sii902x_bridge_edid_read,
552
.atomic_reset = drm_atomic_helper_bridge_reset,
553
.atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
554
.atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
555
.atomic_get_input_bus_fmts = sii902x_bridge_atomic_get_input_bus_fmts,
556
.atomic_check = sii902x_bridge_atomic_check,
557
.mode_valid = sii902x_bridge_mode_valid,
558
};
559
560
static int sii902x_mute(struct sii902x *sii902x, bool mute)
561
{
562
struct device *dev = &sii902x->i2c->dev;
563
unsigned int val = mute ? SII902X_TPI_AUDIO_MUTE_ENABLE :
564
SII902X_TPI_AUDIO_MUTE_DISABLE;
565
566
dev_dbg(dev, "%s: %s\n", __func__, mute ? "Muted" : "Unmuted");
567
568
return regmap_update_bits(sii902x->regmap,
569
SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,
570
SII902X_TPI_AUDIO_MUTE_ENABLE, val);
571
}
572
573
static const int sii902x_mclk_div_table[] = {
574
128, 256, 384, 512, 768, 1024, 1152, 192 };
575
576
static int sii902x_select_mclk_div(u8 *i2s_config_reg, unsigned int rate,
577
unsigned int mclk)
578
{
579
int div = mclk / rate;
580
int distance = 100000;
581
u8 i, nearest = 0;
582
583
for (i = 0; i < ARRAY_SIZE(sii902x_mclk_div_table); i++) {
584
unsigned int d = abs(div - sii902x_mclk_div_table[i]);
585
586
if (d >= distance)
587
continue;
588
589
nearest = i;
590
distance = d;
591
if (d == 0)
592
break;
593
}
594
595
*i2s_config_reg |= nearest << 4;
596
597
return sii902x_mclk_div_table[nearest];
598
}
599
600
static const struct sii902x_sample_freq {
601
u32 freq;
602
u8 val;
603
} sii902x_sample_freq[] = {
604
{ .freq = 32000, .val = SII902X_TPI_AUDIO_FREQ_32KHZ },
605
{ .freq = 44000, .val = SII902X_TPI_AUDIO_FREQ_44KHZ },
606
{ .freq = 48000, .val = SII902X_TPI_AUDIO_FREQ_48KHZ },
607
{ .freq = 88000, .val = SII902X_TPI_AUDIO_FREQ_88KHZ },
608
{ .freq = 96000, .val = SII902X_TPI_AUDIO_FREQ_96KHZ },
609
{ .freq = 176000, .val = SII902X_TPI_AUDIO_FREQ_176KHZ },
610
{ .freq = 192000, .val = SII902X_TPI_AUDIO_FREQ_192KHZ },
611
};
612
613
static int sii902x_audio_hw_params(struct device *dev, void *data,
614
struct hdmi_codec_daifmt *daifmt,
615
struct hdmi_codec_params *params)
616
{
617
struct sii902x *sii902x = dev_get_drvdata(dev);
618
u8 i2s_config_reg = SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST;
619
u8 config_byte2_reg = (SII902X_TPI_AUDIO_INTERFACE_I2S |
620
SII902X_TPI_AUDIO_MUTE_ENABLE |
621
SII902X_TPI_AUDIO_CODING_PCM);
622
u8 config_byte3_reg = 0;
623
u8 infoframe_buf[HDMI_INFOFRAME_SIZE(AUDIO)];
624
unsigned long mclk_rate;
625
int i, ret;
626
627
if (daifmt->bit_clk_provider || daifmt->frame_clk_provider) {
628
dev_dbg(dev, "%s: I2S clock provider mode not supported\n",
629
__func__);
630
return -EINVAL;
631
}
632
633
switch (daifmt->fmt) {
634
case HDMI_I2S:
635
i2s_config_reg |= SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES |
636
SII902X_TPI_I2S_SD_JUSTIFY_LEFT;
637
break;
638
case HDMI_RIGHT_J:
639
i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_RIGHT;
640
break;
641
case HDMI_LEFT_J:
642
i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_LEFT;
643
break;
644
default:
645
dev_dbg(dev, "%s: Unsupported i2s format %u\n", __func__,
646
daifmt->fmt);
647
return -EINVAL;
648
}
649
650
if (daifmt->bit_clk_inv)
651
i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_FALLING;
652
else
653
i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_RISING;
654
655
if (daifmt->frame_clk_inv)
656
i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_LOW;
657
else
658
i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_HIGH;
659
660
if (params->channels > 2)
661
config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS;
662
else
663
config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS;
664
665
switch (params->sample_width) {
666
case 16:
667
config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_16;
668
break;
669
case 20:
670
config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_20;
671
break;
672
case 24:
673
case 32:
674
config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_24;
675
break;
676
default:
677
dev_err(dev, "%s: Unsupported sample width %u\n", __func__,
678
params->sample_width);
679
return -EINVAL;
680
}
681
682
for (i = 0; i < ARRAY_SIZE(sii902x_sample_freq); i++) {
683
if (params->sample_rate == sii902x_sample_freq[i].freq) {
684
config_byte3_reg |= sii902x_sample_freq[i].val;
685
break;
686
}
687
}
688
689
ret = clk_prepare_enable(sii902x->audio.mclk);
690
if (ret) {
691
dev_err(dev, "Enabling mclk failed: %d\n", ret);
692
return ret;
693
}
694
695
if (sii902x->audio.mclk) {
696
mclk_rate = clk_get_rate(sii902x->audio.mclk);
697
ret = sii902x_select_mclk_div(&i2s_config_reg,
698
params->sample_rate, mclk_rate);
699
if (mclk_rate != ret * params->sample_rate)
700
dev_dbg(dev, "Inaccurate reference clock (%ld/%d != %u)\n",
701
mclk_rate, ret, params->sample_rate);
702
}
703
704
mutex_lock(&sii902x->mutex);
705
706
ret = regmap_write(sii902x->regmap,
707
SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,
708
config_byte2_reg);
709
if (ret < 0)
710
goto out;
711
712
ret = regmap_write(sii902x->regmap, SII902X_TPI_I2S_INPUT_CONFIG_REG,
713
i2s_config_reg);
714
if (ret)
715
goto out;
716
717
for (i = 0; i < ARRAY_SIZE(sii902x->audio.i2s_fifo_sequence) &&
718
sii902x->audio.i2s_fifo_sequence[i]; i++)
719
regmap_write(sii902x->regmap,
720
SII902X_TPI_I2S_ENABLE_MAPPING_REG,
721
sii902x->audio.i2s_fifo_sequence[i]);
722
723
ret = regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE3_REG,
724
config_byte3_reg);
725
if (ret)
726
goto out;
727
728
ret = regmap_bulk_write(sii902x->regmap, SII902X_TPI_I2S_STRM_HDR_BASE,
729
params->iec.status,
730
min((size_t) SII902X_TPI_I2S_STRM_HDR_SIZE,
731
sizeof(params->iec.status)));
732
if (ret)
733
goto out;
734
735
ret = hdmi_audio_infoframe_pack(&params->cea, infoframe_buf,
736
sizeof(infoframe_buf));
737
if (ret < 0) {
738
dev_err(dev, "%s: Failed to pack audio infoframe: %d\n",
739
__func__, ret);
740
goto out;
741
}
742
743
ret = regmap_bulk_write(sii902x->regmap,
744
SII902X_TPI_MISC_INFOFRAME_BASE,
745
infoframe_buf,
746
min(ret, SII902X_TPI_MISC_INFOFRAME_SIZE));
747
if (ret)
748
goto out;
749
750
/* Decode Level 0 Packets */
751
ret = regmap_write(sii902x->regmap, SII902X_IND_SET_PAGE, 0x02);
752
if (ret)
753
goto out;
754
755
ret = regmap_write(sii902x->regmap, SII902X_IND_OFFSET, 0x24);
756
if (ret)
757
goto out;
758
759
ret = regmap_write(sii902x->regmap, SII902X_IND_VALUE, 0x02);
760
if (ret)
761
goto out;
762
763
dev_dbg(dev, "%s: hdmi audio enabled\n", __func__);
764
out:
765
mutex_unlock(&sii902x->mutex);
766
767
if (ret) {
768
clk_disable_unprepare(sii902x->audio.mclk);
769
dev_err(dev, "%s: hdmi audio enable failed: %d\n", __func__,
770
ret);
771
}
772
773
return ret;
774
}
775
776
static void sii902x_audio_shutdown(struct device *dev, void *data)
777
{
778
struct sii902x *sii902x = dev_get_drvdata(dev);
779
780
mutex_lock(&sii902x->mutex);
781
782
regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,
783
SII902X_TPI_AUDIO_INTERFACE_DISABLE);
784
785
mutex_unlock(&sii902x->mutex);
786
787
clk_disable_unprepare(sii902x->audio.mclk);
788
}
789
790
static int sii902x_audio_mute(struct device *dev, void *data,
791
bool enable, int direction)
792
{
793
struct sii902x *sii902x = dev_get_drvdata(dev);
794
795
mutex_lock(&sii902x->mutex);
796
797
sii902x_mute(sii902x, enable);
798
799
mutex_unlock(&sii902x->mutex);
800
801
return 0;
802
}
803
804
static int sii902x_audio_get_eld(struct device *dev, void *data,
805
uint8_t *buf, size_t len)
806
{
807
struct sii902x *sii902x = dev_get_drvdata(dev);
808
809
mutex_lock(&sii902x->mutex);
810
811
memcpy(buf, sii902x->connector.eld,
812
min(sizeof(sii902x->connector.eld), len));
813
814
mutex_unlock(&sii902x->mutex);
815
816
return 0;
817
}
818
819
static int sii902x_audio_get_dai_id(struct snd_soc_component *component,
820
struct device_node *endpoint,
821
void *data)
822
{
823
struct of_endpoint of_ep;
824
int ret;
825
826
ret = of_graph_parse_endpoint(endpoint, &of_ep);
827
if (ret < 0)
828
return ret;
829
830
/*
831
* HDMI sound should be located at reg = <3>
832
* Return expected DAI index 0.
833
*/
834
if (of_ep.port == SII902X_AUDIO_PORT_INDEX)
835
return 0;
836
837
return -EINVAL;
838
}
839
840
static const struct hdmi_codec_ops sii902x_audio_codec_ops = {
841
.hw_params = sii902x_audio_hw_params,
842
.audio_shutdown = sii902x_audio_shutdown,
843
.mute_stream = sii902x_audio_mute,
844
.get_eld = sii902x_audio_get_eld,
845
.get_dai_id = sii902x_audio_get_dai_id,
846
};
847
848
static int sii902x_audio_codec_init(struct sii902x *sii902x,
849
struct device *dev)
850
{
851
static const u8 audio_fifo_id[] = {
852
SII902X_TPI_I2S_CONFIG_FIFO0,
853
SII902X_TPI_I2S_CONFIG_FIFO1,
854
SII902X_TPI_I2S_CONFIG_FIFO2,
855
SII902X_TPI_I2S_CONFIG_FIFO3,
856
};
857
static const u8 i2s_lane_id[] = {
858
SII902X_TPI_I2S_SELECT_SD0,
859
SII902X_TPI_I2S_SELECT_SD1,
860
SII902X_TPI_I2S_SELECT_SD2,
861
SII902X_TPI_I2S_SELECT_SD3,
862
};
863
struct hdmi_codec_pdata codec_data = {
864
.ops = &sii902x_audio_codec_ops,
865
.i2s = 1, /* Only i2s support for now. */
866
.spdif = 0,
867
.max_i2s_channels = 0,
868
.no_capture_mute = 1,
869
};
870
u8 lanes[4];
871
int num_lanes, i;
872
873
if (!of_property_present(dev->of_node, "#sound-dai-cells")) {
874
dev_dbg(dev, "%s: No \"#sound-dai-cells\", no audio\n",
875
__func__);
876
return 0;
877
}
878
879
num_lanes = of_property_read_variable_u8_array(dev->of_node,
880
"sil,i2s-data-lanes",
881
lanes, 1,
882
ARRAY_SIZE(lanes));
883
884
if (num_lanes == -EINVAL) {
885
dev_dbg(dev,
886
"%s: No \"sil,i2s-data-lanes\", use default <0>\n",
887
__func__);
888
num_lanes = 1;
889
lanes[0] = 0;
890
} else if (num_lanes < 0) {
891
dev_err(dev,
892
"%s: Error getting \"sil,i2s-data-lanes\": %d\n",
893
__func__, num_lanes);
894
return num_lanes;
895
}
896
codec_data.max_i2s_channels = 2 * num_lanes;
897
898
for (i = 0; i < num_lanes; i++)
899
sii902x->audio.i2s_fifo_sequence[i] |= audio_fifo_id[i] |
900
i2s_lane_id[lanes[i]] | SII902X_TPI_I2S_FIFO_ENABLE;
901
902
sii902x->audio.mclk = devm_clk_get_optional(dev, "mclk");
903
if (IS_ERR(sii902x->audio.mclk)) {
904
dev_err(dev, "%s: No clock (audio mclk) found: %ld\n",
905
__func__, PTR_ERR(sii902x->audio.mclk));
906
return PTR_ERR(sii902x->audio.mclk);
907
}
908
909
sii902x->audio.pdev = platform_device_register_data(
910
dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO,
911
&codec_data, sizeof(codec_data));
912
913
return PTR_ERR_OR_ZERO(sii902x->audio.pdev);
914
}
915
916
static const struct regmap_range sii902x_volatile_ranges[] = {
917
{ .range_min = 0, .range_max = 0xff },
918
};
919
920
static const struct regmap_access_table sii902x_volatile_table = {
921
.yes_ranges = sii902x_volatile_ranges,
922
.n_yes_ranges = ARRAY_SIZE(sii902x_volatile_ranges),
923
};
924
925
static const struct regmap_config sii902x_regmap_config = {
926
.reg_bits = 8,
927
.val_bits = 8,
928
.disable_locking = true, /* struct sii902x mutex should be enough */
929
.max_register = SII902X_TPI_MISC_INFOFRAME_END,
930
.volatile_table = &sii902x_volatile_table,
931
.cache_type = REGCACHE_NONE,
932
};
933
934
static irqreturn_t sii902x_interrupt(int irq, void *data)
935
{
936
struct sii902x *sii902x = data;
937
unsigned int status = 0;
938
939
mutex_lock(&sii902x->mutex);
940
941
regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);
942
regmap_write(sii902x->regmap, SII902X_INT_STATUS, status);
943
944
mutex_unlock(&sii902x->mutex);
945
946
if ((status & SII902X_HOTPLUG_EVENT) && sii902x->bridge.dev) {
947
drm_helper_hpd_irq_event(sii902x->bridge.dev);
948
drm_bridge_hpd_notify(&sii902x->bridge, (status & SII902X_PLUGGED_STATUS)
949
? connector_status_connected
950
: connector_status_disconnected);
951
}
952
953
return IRQ_HANDLED;
954
}
955
956
/*
957
* The purpose of sii902x_i2c_bypass_select is to enable the pass through
958
* mode of the HDMI transmitter. Do not use regmap from within this function,
959
* only use sii902x_*_unlocked functions to read/modify/write registers.
960
* We are holding the parent adapter lock here, keep this in mind before
961
* adding more i2c transactions.
962
*
963
* Also, since SII902X_SYS_CTRL_DATA is used with regmap_update_bits elsewhere
964
* in this driver, we need to make sure that we only touch 0x1A[2:1] from
965
* within sii902x_i2c_bypass_select and sii902x_i2c_bypass_deselect, and that
966
* we leave the remaining bits as we have found them.
967
*/
968
static int sii902x_i2c_bypass_select(struct i2c_mux_core *mux, u32 chan_id)
969
{
970
struct sii902x *sii902x = i2c_mux_priv(mux);
971
struct device *dev = &sii902x->i2c->dev;
972
unsigned long timeout;
973
u8 status;
974
int ret;
975
976
ret = sii902x_update_bits_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
977
SII902X_SYS_CTRL_DDC_BUS_REQ,
978
SII902X_SYS_CTRL_DDC_BUS_REQ);
979
if (ret)
980
return ret;
981
982
timeout = jiffies +
983
msecs_to_jiffies(SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS);
984
do {
985
ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
986
&status);
987
if (ret)
988
return ret;
989
} while (!(status & SII902X_SYS_CTRL_DDC_BUS_GRTD) &&
990
time_before(jiffies, timeout));
991
992
if (!(status & SII902X_SYS_CTRL_DDC_BUS_GRTD)) {
993
dev_err(dev, "Failed to acquire the i2c bus\n");
994
return -ETIMEDOUT;
995
}
996
997
return sii902x_write_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
998
status);
999
}
1000
1001
/*
1002
* The purpose of sii902x_i2c_bypass_deselect is to disable the pass through
1003
* mode of the HDMI transmitter. Do not use regmap from within this function,
1004
* only use sii902x_*_unlocked functions to read/modify/write registers.
1005
* We are holding the parent adapter lock here, keep this in mind before
1006
* adding more i2c transactions.
1007
*
1008
* Also, since SII902X_SYS_CTRL_DATA is used with regmap_update_bits elsewhere
1009
* in this driver, we need to make sure that we only touch 0x1A[2:1] from
1010
* within sii902x_i2c_bypass_select and sii902x_i2c_bypass_deselect, and that
1011
* we leave the remaining bits as we have found them.
1012
*/
1013
static int sii902x_i2c_bypass_deselect(struct i2c_mux_core *mux, u32 chan_id)
1014
{
1015
struct sii902x *sii902x = i2c_mux_priv(mux);
1016
struct device *dev = &sii902x->i2c->dev;
1017
unsigned long timeout;
1018
unsigned int retries;
1019
u8 status;
1020
int ret;
1021
1022
/*
1023
* When the HDMI transmitter is in pass through mode, we need an
1024
* (undocumented) additional delay between STOP and START conditions
1025
* to guarantee the bus won't get stuck.
1026
*/
1027
udelay(30);
1028
1029
/*
1030
* Sometimes the I2C bus can stall after failure to use the
1031
* EDID channel. Retry a few times to see if things clear
1032
* up, else continue anyway.
1033
*/
1034
retries = 5;
1035
do {
1036
ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
1037
&status);
1038
retries--;
1039
} while (ret && retries);
1040
if (ret) {
1041
dev_err(dev, "failed to read status (%d)\n", ret);
1042
return ret;
1043
}
1044
1045
ret = sii902x_update_bits_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
1046
SII902X_SYS_CTRL_DDC_BUS_REQ |
1047
SII902X_SYS_CTRL_DDC_BUS_GRTD, 0);
1048
if (ret)
1049
return ret;
1050
1051
timeout = jiffies +
1052
msecs_to_jiffies(SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS);
1053
do {
1054
ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
1055
&status);
1056
if (ret)
1057
return ret;
1058
} while (status & (SII902X_SYS_CTRL_DDC_BUS_REQ |
1059
SII902X_SYS_CTRL_DDC_BUS_GRTD) &&
1060
time_before(jiffies, timeout));
1061
1062
if (status & (SII902X_SYS_CTRL_DDC_BUS_REQ |
1063
SII902X_SYS_CTRL_DDC_BUS_GRTD)) {
1064
dev_err(dev, "failed to release the i2c bus\n");
1065
return -ETIMEDOUT;
1066
}
1067
1068
return 0;
1069
}
1070
1071
static const struct drm_bridge_timings default_sii902x_timings = {
1072
.input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE
1073
| DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE
1074
| DRM_BUS_FLAG_DE_HIGH,
1075
};
1076
1077
static int sii902x_init(struct sii902x *sii902x)
1078
{
1079
struct device *dev = &sii902x->i2c->dev;
1080
unsigned int status = 0;
1081
u8 chipid[4];
1082
int ret;
1083
1084
sii902x_reset(sii902x);
1085
1086
ret = regmap_write(sii902x->regmap, SII902X_REG_TPI_RQB, 0x0);
1087
if (ret)
1088
return ret;
1089
1090
ret = regmap_bulk_read(sii902x->regmap, SII902X_REG_CHIPID(0),
1091
&chipid, 4);
1092
if (ret) {
1093
dev_err(dev, "regmap_read failed %d\n", ret);
1094
return ret;
1095
}
1096
1097
if (chipid[0] != 0xb0) {
1098
dev_err(dev, "Invalid chipid: %02x (expecting 0xb0)\n",
1099
chipid[0]);
1100
return -EINVAL;
1101
}
1102
1103
/* Clear all pending interrupts */
1104
regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);
1105
regmap_write(sii902x->regmap, SII902X_INT_STATUS, status);
1106
1107
if (sii902x->i2c->irq > 0) {
1108
regmap_write(sii902x->regmap, SII902X_INT_ENABLE,
1109
SII902X_HOTPLUG_EVENT);
1110
1111
ret = devm_request_threaded_irq(dev, sii902x->i2c->irq, NULL,
1112
sii902x_interrupt,
1113
IRQF_ONESHOT, dev_name(dev),
1114
sii902x);
1115
if (ret)
1116
return ret;
1117
}
1118
1119
ret = sii902x_audio_codec_init(sii902x, dev);
1120
if (ret)
1121
return ret;
1122
1123
i2c_set_clientdata(sii902x->i2c, sii902x);
1124
1125
sii902x->i2cmux = i2c_mux_alloc(sii902x->i2c->adapter, dev,
1126
1, 0, I2C_MUX_GATE,
1127
sii902x_i2c_bypass_select,
1128
sii902x_i2c_bypass_deselect);
1129
if (!sii902x->i2cmux) {
1130
ret = -ENOMEM;
1131
goto err_unreg_audio;
1132
}
1133
1134
sii902x->i2cmux->priv = sii902x;
1135
ret = i2c_mux_add_adapter(sii902x->i2cmux, 0, 0);
1136
if (ret)
1137
goto err_unreg_audio;
1138
1139
sii902x->bridge.of_node = dev->of_node;
1140
sii902x->bridge.timings = &default_sii902x_timings;
1141
sii902x->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID;
1142
sii902x->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
1143
1144
if (sii902x->i2c->irq > 0)
1145
sii902x->bridge.ops |= DRM_BRIDGE_OP_HPD;
1146
1147
drm_bridge_add(&sii902x->bridge);
1148
1149
return 0;
1150
1151
err_unreg_audio:
1152
if (!PTR_ERR_OR_ZERO(sii902x->audio.pdev))
1153
platform_device_unregister(sii902x->audio.pdev);
1154
1155
return ret;
1156
}
1157
1158
static int sii902x_probe(struct i2c_client *client)
1159
{
1160
struct device *dev = &client->dev;
1161
struct device_node *endpoint;
1162
struct sii902x *sii902x;
1163
static const char * const supplies[] = {"iovcc", "cvcc12"};
1164
int ret;
1165
1166
ret = i2c_check_functionality(client->adapter,
1167
I2C_FUNC_SMBUS_BYTE_DATA);
1168
if (!ret) {
1169
dev_err(dev, "I2C adapter not suitable\n");
1170
return -EIO;
1171
}
1172
1173
sii902x = devm_drm_bridge_alloc(dev, struct sii902x, bridge, &sii902x_bridge_funcs);
1174
if (IS_ERR(sii902x))
1175
return PTR_ERR(sii902x);
1176
1177
sii902x->i2c = client;
1178
sii902x->regmap = devm_regmap_init_i2c(client, &sii902x_regmap_config);
1179
if (IS_ERR(sii902x->regmap))
1180
return PTR_ERR(sii902x->regmap);
1181
1182
sii902x->reset_gpio = devm_gpiod_get_optional(dev, "reset",
1183
GPIOD_OUT_LOW);
1184
if (IS_ERR(sii902x->reset_gpio)) {
1185
dev_err(dev, "Failed to retrieve/request reset gpio: %ld\n",
1186
PTR_ERR(sii902x->reset_gpio));
1187
return PTR_ERR(sii902x->reset_gpio);
1188
}
1189
1190
sii902x->bus_width = 24;
1191
endpoint = of_graph_get_endpoint_by_regs(dev->of_node, 0, -1);
1192
if (endpoint)
1193
of_property_read_u32(endpoint, "bus-width", &sii902x->bus_width);
1194
1195
endpoint = of_graph_get_endpoint_by_regs(dev->of_node, 1, -1);
1196
if (endpoint) {
1197
struct device_node *remote = of_graph_get_remote_port_parent(endpoint);
1198
1199
of_node_put(endpoint);
1200
if (!remote) {
1201
dev_err(dev, "Endpoint in port@1 unconnected\n");
1202
return -ENODEV;
1203
}
1204
1205
if (!of_device_is_available(remote)) {
1206
dev_err(dev, "port@1 remote device is disabled\n");
1207
of_node_put(remote);
1208
return -ENODEV;
1209
}
1210
1211
sii902x->next_bridge = of_drm_find_bridge(remote);
1212
of_node_put(remote);
1213
if (!sii902x->next_bridge)
1214
return dev_err_probe(dev, -EPROBE_DEFER,
1215
"Failed to find remote bridge\n");
1216
}
1217
1218
mutex_init(&sii902x->mutex);
1219
1220
ret = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(supplies), supplies);
1221
if (ret < 0)
1222
return dev_err_probe(dev, ret, "Failed to enable supplies");
1223
1224
return sii902x_init(sii902x);
1225
}
1226
1227
static void sii902x_remove(struct i2c_client *client)
1228
{
1229
struct sii902x *sii902x = i2c_get_clientdata(client);
1230
1231
drm_bridge_remove(&sii902x->bridge);
1232
i2c_mux_del_adapters(sii902x->i2cmux);
1233
1234
if (!PTR_ERR_OR_ZERO(sii902x->audio.pdev))
1235
platform_device_unregister(sii902x->audio.pdev);
1236
}
1237
1238
static const struct of_device_id sii902x_dt_ids[] = {
1239
{ .compatible = "sil,sii9022", },
1240
{ }
1241
};
1242
MODULE_DEVICE_TABLE(of, sii902x_dt_ids);
1243
1244
static const struct i2c_device_id sii902x_i2c_ids[] = {
1245
{ "sii9022" },
1246
{ }
1247
};
1248
MODULE_DEVICE_TABLE(i2c, sii902x_i2c_ids);
1249
1250
static struct i2c_driver sii902x_driver = {
1251
.probe = sii902x_probe,
1252
.remove = sii902x_remove,
1253
.driver = {
1254
.name = "sii902x",
1255
.of_match_table = sii902x_dt_ids,
1256
},
1257
.id_table = sii902x_i2c_ids,
1258
};
1259
module_i2c_driver(sii902x_driver);
1260
1261
MODULE_AUTHOR("Boris Brezillon <[email protected]>");
1262
MODULE_DESCRIPTION("SII902x RGB -> HDMI bridges");
1263
MODULE_LICENSE("GPL");
1264
1265