Path: blob/master/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
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// SPDX-License-Identifier: GPL-2.01/*2* dw-hdmi-i2s-audio.c3*4* Copyright (c) 2017 Renesas Solutions Corp.5* Kuninori Morimoto <[email protected]>6*/78#include <linux/dma-mapping.h>9#include <linux/module.h>1011#include <drm/bridge/dw_hdmi.h>12#include <drm/drm_crtc.h>1314#include <sound/hdmi-codec.h>1516#include "dw-hdmi.h"17#include "dw-hdmi-audio.h"1819#define DRIVER_NAME "dw-hdmi-i2s-audio"2021static inline void hdmi_write(struct dw_hdmi_i2s_audio_data *audio,22u8 val, int offset)23{24struct dw_hdmi *hdmi = audio->hdmi;2526audio->write(hdmi, val, offset);27}2829static inline u8 hdmi_read(struct dw_hdmi_i2s_audio_data *audio, int offset)30{31struct dw_hdmi *hdmi = audio->hdmi;3233return audio->read(hdmi, offset);34}3536static int dw_hdmi_i2s_hw_params(struct device *dev, void *data,37struct hdmi_codec_daifmt *fmt,38struct hdmi_codec_params *hparms)39{40struct dw_hdmi_i2s_audio_data *audio = data;41struct dw_hdmi *hdmi = audio->hdmi;42u8 conf0 = 0;43u8 conf1 = 0;44u8 inputclkfs = 0;4546/* it cares I2S only */47if (fmt->bit_clk_provider | fmt->frame_clk_provider) {48dev_err(dev, "unsupported clock settings\n");49return -EINVAL;50}5152/* Reset the FIFOs before applying new params */53hdmi_write(audio, HDMI_AUD_CONF0_SW_RESET, HDMI_AUD_CONF0);54hdmi_write(audio, (u8)~HDMI_MC_SWRSTZ_I2SSWRST_REQ, HDMI_MC_SWRSTZ);5556inputclkfs = HDMI_AUD_INPUTCLKFS_64FS;57conf0 = (HDMI_AUD_CONF0_I2S_SELECT | HDMI_AUD_CONF0_I2S_EN0);5859/* Enable the required i2s lanes */60switch (hparms->channels) {61case 7 ... 8:62conf0 |= HDMI_AUD_CONF0_I2S_EN3;63fallthrough;64case 5 ... 6:65conf0 |= HDMI_AUD_CONF0_I2S_EN2;66fallthrough;67case 3 ... 4:68conf0 |= HDMI_AUD_CONF0_I2S_EN1;69/* Fall-thru */70}7172switch (hparms->sample_width) {73case 16:74conf1 = HDMI_AUD_CONF1_WIDTH_16;75break;76case 24:77case 32:78conf1 = HDMI_AUD_CONF1_WIDTH_24;79break;80}8182switch (fmt->fmt) {83case HDMI_I2S:84conf1 |= HDMI_AUD_CONF1_MODE_I2S;85break;86case HDMI_RIGHT_J:87conf1 |= HDMI_AUD_CONF1_MODE_RIGHT_J;88break;89case HDMI_LEFT_J:90conf1 |= HDMI_AUD_CONF1_MODE_LEFT_J;91break;92case HDMI_DSP_A:93conf1 |= HDMI_AUD_CONF1_MODE_BURST_1;94break;95case HDMI_DSP_B:96conf1 |= HDMI_AUD_CONF1_MODE_BURST_2;97break;98default:99dev_err(dev, "unsupported format\n");100return -EINVAL;101}102103dw_hdmi_set_sample_rate(hdmi, hparms->sample_rate);104dw_hdmi_set_channel_status(hdmi, hparms->iec.status);105dw_hdmi_set_channel_count(hdmi, hparms->channels);106dw_hdmi_set_channel_allocation(hdmi, hparms->cea.channel_allocation);107108hdmi_write(audio, inputclkfs, HDMI_AUD_INPUTCLKFS);109hdmi_write(audio, conf0, HDMI_AUD_CONF0);110hdmi_write(audio, conf1, HDMI_AUD_CONF1);111112return 0;113}114115static int dw_hdmi_i2s_audio_startup(struct device *dev, void *data)116{117struct dw_hdmi_i2s_audio_data *audio = data;118struct dw_hdmi *hdmi = audio->hdmi;119120dw_hdmi_audio_enable(hdmi);121122return 0;123}124125static void dw_hdmi_i2s_audio_shutdown(struct device *dev, void *data)126{127struct dw_hdmi_i2s_audio_data *audio = data;128struct dw_hdmi *hdmi = audio->hdmi;129130dw_hdmi_audio_disable(hdmi);131}132133static int dw_hdmi_i2s_get_eld(struct device *dev, void *data, uint8_t *buf,134size_t len)135{136struct dw_hdmi_i2s_audio_data *audio = data;137u8 *eld;138139eld = audio->get_eld(audio->hdmi);140if (eld)141memcpy(buf, eld, min_t(size_t, MAX_ELD_BYTES, len));142else143/* Pass en empty ELD if connector not available */144memset(buf, 0, len);145146return 0;147}148149static int dw_hdmi_i2s_get_dai_id(struct snd_soc_component *component,150struct device_node *endpoint,151void *data)152{153struct of_endpoint of_ep;154int ret;155156ret = of_graph_parse_endpoint(endpoint, &of_ep);157if (ret < 0)158return ret;159160/*161* HDMI sound should be located as reg = <2>162* Then, it is sound port 0163*/164if (of_ep.port == 2)165return 0;166167return -EINVAL;168}169170static int dw_hdmi_i2s_hook_plugged_cb(struct device *dev, void *data,171hdmi_codec_plugged_cb fn,172struct device *codec_dev)173{174struct dw_hdmi_i2s_audio_data *audio = data;175struct dw_hdmi *hdmi = audio->hdmi;176177return dw_hdmi_set_plugged_cb(hdmi, fn, codec_dev);178}179180static const struct hdmi_codec_ops dw_hdmi_i2s_ops = {181.hw_params = dw_hdmi_i2s_hw_params,182.audio_startup = dw_hdmi_i2s_audio_startup,183.audio_shutdown = dw_hdmi_i2s_audio_shutdown,184.get_eld = dw_hdmi_i2s_get_eld,185.get_dai_id = dw_hdmi_i2s_get_dai_id,186.hook_plugged_cb = dw_hdmi_i2s_hook_plugged_cb,187};188189static int snd_dw_hdmi_probe(struct platform_device *pdev)190{191struct dw_hdmi_i2s_audio_data *audio = pdev->dev.platform_data;192struct platform_device_info pdevinfo;193struct hdmi_codec_pdata pdata;194struct platform_device *platform;195196memset(&pdata, 0, sizeof(pdata));197pdata.ops = &dw_hdmi_i2s_ops;198pdata.i2s = 1;199pdata.max_i2s_channels = 8;200pdata.data = audio;201202memset(&pdevinfo, 0, sizeof(pdevinfo));203pdevinfo.parent = pdev->dev.parent;204pdevinfo.id = PLATFORM_DEVID_AUTO;205pdevinfo.name = HDMI_CODEC_DRV_NAME;206pdevinfo.data = &pdata;207pdevinfo.size_data = sizeof(pdata);208pdevinfo.dma_mask = DMA_BIT_MASK(32);209210platform = platform_device_register_full(&pdevinfo);211if (IS_ERR(platform))212return PTR_ERR(platform);213214dev_set_drvdata(&pdev->dev, platform);215216return 0;217}218219static void snd_dw_hdmi_remove(struct platform_device *pdev)220{221struct platform_device *platform = dev_get_drvdata(&pdev->dev);222223platform_device_unregister(platform);224}225226static struct platform_driver snd_dw_hdmi_driver = {227.probe = snd_dw_hdmi_probe,228.remove = snd_dw_hdmi_remove,229.driver = {230.name = DRIVER_NAME,231},232};233module_platform_driver(snd_dw_hdmi_driver);234235MODULE_AUTHOR("Kuninori Morimoto <[email protected]>");236MODULE_DESCRIPTION("Synopsis Designware HDMI I2S ALSA SoC interface");237MODULE_LICENSE("GPL v2");238MODULE_ALIAS("platform:" DRIVER_NAME);239240241