Path: blob/master/drivers/gpu/drm/display/drm_hdmi_helper.c
26494 views
// SPDX-License-Identifier: MIT12#include <linux/export.h>3#include <linux/module.h>45#include <drm/display/drm_hdmi_helper.h>6#include <drm/drm_connector.h>7#include <drm/drm_edid.h>8#include <drm/drm_modes.h>9#include <drm/drm_print.h>10#include <drm/drm_property.h>1112static inline bool is_eotf_supported(u8 output_eotf, u8 sink_eotf)13{14return sink_eotf & BIT(output_eotf);15}1617/**18* drm_hdmi_infoframe_set_hdr_metadata() - fill an HDMI DRM infoframe with19* HDR metadata from userspace20* @frame: HDMI DRM infoframe21* @conn_state: Connector state containing HDR metadata22*23* Return: 0 on success or a negative error code on failure.24*/25int drm_hdmi_infoframe_set_hdr_metadata(struct hdmi_drm_infoframe *frame,26const struct drm_connector_state *conn_state)27{28struct drm_connector *connector;29struct hdr_output_metadata *hdr_metadata;30int err;3132if (!frame || !conn_state)33return -EINVAL;3435connector = conn_state->connector;3637if (!conn_state->hdr_output_metadata)38return -EINVAL;3940hdr_metadata = conn_state->hdr_output_metadata->data;4142if (!hdr_metadata || !connector)43return -EINVAL;4445/* Sink EOTF is Bit map while infoframe is absolute values */46if (!is_eotf_supported(hdr_metadata->hdmi_metadata_type1.eotf,47connector->display_info.hdr_sink_metadata.hdmi_type1.eotf))48DRM_DEBUG_KMS("Unknown EOTF %d\n", hdr_metadata->hdmi_metadata_type1.eotf);4950err = hdmi_drm_infoframe_init(frame);51if (err < 0)52return err;5354frame->eotf = hdr_metadata->hdmi_metadata_type1.eotf;55frame->metadata_type = hdr_metadata->hdmi_metadata_type1.metadata_type;5657BUILD_BUG_ON(sizeof(frame->display_primaries) !=58sizeof(hdr_metadata->hdmi_metadata_type1.display_primaries));59BUILD_BUG_ON(sizeof(frame->white_point) !=60sizeof(hdr_metadata->hdmi_metadata_type1.white_point));6162memcpy(&frame->display_primaries,63&hdr_metadata->hdmi_metadata_type1.display_primaries,64sizeof(frame->display_primaries));6566memcpy(&frame->white_point,67&hdr_metadata->hdmi_metadata_type1.white_point,68sizeof(frame->white_point));6970frame->max_display_mastering_luminance =71hdr_metadata->hdmi_metadata_type1.max_display_mastering_luminance;72frame->min_display_mastering_luminance =73hdr_metadata->hdmi_metadata_type1.min_display_mastering_luminance;74frame->max_fall = hdr_metadata->hdmi_metadata_type1.max_fall;75frame->max_cll = hdr_metadata->hdmi_metadata_type1.max_cll;7677return 0;78}79EXPORT_SYMBOL(drm_hdmi_infoframe_set_hdr_metadata);8081/* HDMI Colorspace Spec Definitions */82#define FULL_COLORIMETRY_MASK 0x1FF83#define NORMAL_COLORIMETRY_MASK 0x384#define EXTENDED_COLORIMETRY_MASK 0x785#define EXTENDED_ACE_COLORIMETRY_MASK 0xF8687#define C(x) ((x) << 0)88#define EC(x) ((x) << 2)89#define ACE(x) ((x) << 5)9091#define HDMI_COLORIMETRY_NO_DATA 0x092#define HDMI_COLORIMETRY_SMPTE_170M_YCC (C(1) | EC(0) | ACE(0))93#define HDMI_COLORIMETRY_BT709_YCC (C(2) | EC(0) | ACE(0))94#define HDMI_COLORIMETRY_XVYCC_601 (C(3) | EC(0) | ACE(0))95#define HDMI_COLORIMETRY_XVYCC_709 (C(3) | EC(1) | ACE(0))96#define HDMI_COLORIMETRY_SYCC_601 (C(3) | EC(2) | ACE(0))97#define HDMI_COLORIMETRY_OPYCC_601 (C(3) | EC(3) | ACE(0))98#define HDMI_COLORIMETRY_OPRGB (C(3) | EC(4) | ACE(0))99#define HDMI_COLORIMETRY_BT2020_CYCC (C(3) | EC(5) | ACE(0))100#define HDMI_COLORIMETRY_BT2020_RGB (C(3) | EC(6) | ACE(0))101#define HDMI_COLORIMETRY_BT2020_YCC (C(3) | EC(6) | ACE(0))102#define HDMI_COLORIMETRY_DCI_P3_RGB_D65 (C(3) | EC(7) | ACE(0))103#define HDMI_COLORIMETRY_DCI_P3_RGB_THEATER (C(3) | EC(7) | ACE(1))104105static const u32 hdmi_colorimetry_val[] = {106[DRM_MODE_COLORIMETRY_NO_DATA] = HDMI_COLORIMETRY_NO_DATA,107[DRM_MODE_COLORIMETRY_SMPTE_170M_YCC] = HDMI_COLORIMETRY_SMPTE_170M_YCC,108[DRM_MODE_COLORIMETRY_BT709_YCC] = HDMI_COLORIMETRY_BT709_YCC,109[DRM_MODE_COLORIMETRY_XVYCC_601] = HDMI_COLORIMETRY_XVYCC_601,110[DRM_MODE_COLORIMETRY_XVYCC_709] = HDMI_COLORIMETRY_XVYCC_709,111[DRM_MODE_COLORIMETRY_SYCC_601] = HDMI_COLORIMETRY_SYCC_601,112[DRM_MODE_COLORIMETRY_OPYCC_601] = HDMI_COLORIMETRY_OPYCC_601,113[DRM_MODE_COLORIMETRY_OPRGB] = HDMI_COLORIMETRY_OPRGB,114[DRM_MODE_COLORIMETRY_BT2020_CYCC] = HDMI_COLORIMETRY_BT2020_CYCC,115[DRM_MODE_COLORIMETRY_BT2020_RGB] = HDMI_COLORIMETRY_BT2020_RGB,116[DRM_MODE_COLORIMETRY_BT2020_YCC] = HDMI_COLORIMETRY_BT2020_YCC,117};118119#undef C120#undef EC121#undef ACE122123/**124* drm_hdmi_avi_infoframe_colorimetry() - fill the HDMI AVI infoframe125* colorimetry information126* @frame: HDMI AVI infoframe127* @conn_state: connector state128*/129void drm_hdmi_avi_infoframe_colorimetry(struct hdmi_avi_infoframe *frame,130const struct drm_connector_state *conn_state)131{132u32 colorimetry_val;133u32 colorimetry_index = conn_state->colorspace & FULL_COLORIMETRY_MASK;134135if (colorimetry_index >= ARRAY_SIZE(hdmi_colorimetry_val))136colorimetry_val = HDMI_COLORIMETRY_NO_DATA;137else138colorimetry_val = hdmi_colorimetry_val[colorimetry_index];139140frame->colorimetry = colorimetry_val & NORMAL_COLORIMETRY_MASK;141/*142* ToDo: Extend it for ACE formats as well. Modify the infoframe143* structure and extend it in drivers/video/hdmi144*/145frame->extended_colorimetry = (colorimetry_val >> 2) &146EXTENDED_COLORIMETRY_MASK;147}148EXPORT_SYMBOL(drm_hdmi_avi_infoframe_colorimetry);149150/**151* drm_hdmi_avi_infoframe_bars() - fill the HDMI AVI infoframe152* bar information153* @frame: HDMI AVI infoframe154* @conn_state: connector state155*/156void drm_hdmi_avi_infoframe_bars(struct hdmi_avi_infoframe *frame,157const struct drm_connector_state *conn_state)158{159frame->right_bar = conn_state->tv.margins.right;160frame->left_bar = conn_state->tv.margins.left;161frame->top_bar = conn_state->tv.margins.top;162frame->bottom_bar = conn_state->tv.margins.bottom;163}164EXPORT_SYMBOL(drm_hdmi_avi_infoframe_bars);165166/**167* drm_hdmi_avi_infoframe_content_type() - fill the HDMI AVI infoframe168* content type information, based169* on correspondent DRM property.170* @frame: HDMI AVI infoframe171* @conn_state: DRM display connector state172*173*/174void drm_hdmi_avi_infoframe_content_type(struct hdmi_avi_infoframe *frame,175const struct drm_connector_state *conn_state)176{177switch (conn_state->content_type) {178case DRM_MODE_CONTENT_TYPE_GRAPHICS:179frame->content_type = HDMI_CONTENT_TYPE_GRAPHICS;180break;181case DRM_MODE_CONTENT_TYPE_CINEMA:182frame->content_type = HDMI_CONTENT_TYPE_CINEMA;183break;184case DRM_MODE_CONTENT_TYPE_GAME:185frame->content_type = HDMI_CONTENT_TYPE_GAME;186break;187case DRM_MODE_CONTENT_TYPE_PHOTO:188frame->content_type = HDMI_CONTENT_TYPE_PHOTO;189break;190default:191/* Graphics is the default(0) */192frame->content_type = HDMI_CONTENT_TYPE_GRAPHICS;193}194195frame->itc = conn_state->content_type != DRM_MODE_CONTENT_TYPE_NO_DATA;196}197EXPORT_SYMBOL(drm_hdmi_avi_infoframe_content_type);198199/**200* drm_hdmi_compute_mode_clock() - Computes the TMDS Character Rate201* @mode: Display mode to compute the clock for202* @bpc: Bits per character203* @fmt: Output Pixel Format used204*205* Returns the TMDS Character Rate for a given mode, bpc count and output format.206*207* RETURNS:208* The TMDS Character Rate, in Hertz, or 0 on error.209*/210unsigned long long211drm_hdmi_compute_mode_clock(const struct drm_display_mode *mode,212unsigned int bpc, enum hdmi_colorspace fmt)213{214unsigned long long clock = mode->clock * 1000ULL;215unsigned int vic = drm_match_cea_mode(mode);216217/*218* CTA-861-G Spec, section 5.4 - Color Coding and Quantization219* mandates that VIC 1 always uses 8 bpc.220*/221if (vic == 1 && bpc != 8)222return 0;223224if (fmt == HDMI_COLORSPACE_YUV422) {225/*226* HDMI 1.0 Spec, section 6.5 - Pixel Encoding states that227* YUV422 sends 24 bits over three channels, with Cb and Cr228* components being sent on odd and even pixels, respectively.229*230* If fewer than 12 bpc are sent, data are left justified.231*/232if (bpc > 12)233return 0;234235/*236* HDMI 1.0 Spec, section 6.5 - Pixel Encoding237* specifies that YUV422 sends two 12-bits components over238* three TMDS channels per pixel clock, which is equivalent to239* three 8-bits components over three channels used by RGB as240* far as the clock rate goes.241*/242bpc = 8;243}244245/*246* HDMI 2.0 Spec, Section 7.1 - YCbCr 4:2:0 Pixel Encoding247* specifies that YUV420 encoding is carried at a TMDS Character Rate248* equal to half the pixel clock rate.249*/250if (fmt == HDMI_COLORSPACE_YUV420)251clock = clock / 2;252253if (mode->flags & DRM_MODE_FLAG_DBLCLK)254clock = clock * 2;255256return DIV_ROUND_CLOSEST_ULL(clock * bpc, 8);257}258EXPORT_SYMBOL(drm_hdmi_compute_mode_clock);259260struct drm_hdmi_acr_n_cts_entry {261unsigned int n;262unsigned int cts;263};264265struct drm_hdmi_acr_data {266unsigned long tmds_clock_khz;267struct drm_hdmi_acr_n_cts_entry n_cts_32k,268n_cts_44k1,269n_cts_48k;270};271272static const struct drm_hdmi_acr_data hdmi_acr_n_cts[] = {273{274/* "Other" entry */275.n_cts_32k = { .n = 4096, },276.n_cts_44k1 = { .n = 6272, },277.n_cts_48k = { .n = 6144, },278}, {279.tmds_clock_khz = 25175,280.n_cts_32k = { .n = 4576, .cts = 28125, },281.n_cts_44k1 = { .n = 7007, .cts = 31250, },282.n_cts_48k = { .n = 6864, .cts = 28125, },283}, {284.tmds_clock_khz = 25200,285.n_cts_32k = { .n = 4096, .cts = 25200, },286.n_cts_44k1 = { .n = 6272, .cts = 28000, },287.n_cts_48k = { .n = 6144, .cts = 25200, },288}, {289.tmds_clock_khz = 27000,290.n_cts_32k = { .n = 4096, .cts = 27000, },291.n_cts_44k1 = { .n = 6272, .cts = 30000, },292.n_cts_48k = { .n = 6144, .cts = 27000, },293}, {294.tmds_clock_khz = 27027,295.n_cts_32k = { .n = 4096, .cts = 27027, },296.n_cts_44k1 = { .n = 6272, .cts = 30030, },297.n_cts_48k = { .n = 6144, .cts = 27027, },298}, {299.tmds_clock_khz = 54000,300.n_cts_32k = { .n = 4096, .cts = 54000, },301.n_cts_44k1 = { .n = 6272, .cts = 60000, },302.n_cts_48k = { .n = 6144, .cts = 54000, },303}, {304.tmds_clock_khz = 54054,305.n_cts_32k = { .n = 4096, .cts = 54054, },306.n_cts_44k1 = { .n = 6272, .cts = 60060, },307.n_cts_48k = { .n = 6144, .cts = 54054, },308}, {309.tmds_clock_khz = 74176,310.n_cts_32k = { .n = 11648, .cts = 210937, }, /* and 210938 */311.n_cts_44k1 = { .n = 17836, .cts = 234375, },312.n_cts_48k = { .n = 11648, .cts = 140625, },313}, {314.tmds_clock_khz = 74250,315.n_cts_32k = { .n = 4096, .cts = 74250, },316.n_cts_44k1 = { .n = 6272, .cts = 82500, },317.n_cts_48k = { .n = 6144, .cts = 74250, },318}, {319.tmds_clock_khz = 148352,320.n_cts_32k = { .n = 11648, .cts = 421875, },321.n_cts_44k1 = { .n = 8918, .cts = 234375, },322.n_cts_48k = { .n = 5824, .cts = 140625, },323}, {324.tmds_clock_khz = 148500,325.n_cts_32k = { .n = 4096, .cts = 148500, },326.n_cts_44k1 = { .n = 6272, .cts = 165000, },327.n_cts_48k = { .n = 6144, .cts = 148500, },328}, {329.tmds_clock_khz = 296703,330.n_cts_32k = { .n = 5824, .cts = 421875, },331.n_cts_44k1 = { .n = 4459, .cts = 234375, },332.n_cts_48k = { .n = 5824, .cts = 281250, },333}, {334.tmds_clock_khz = 297000,335.n_cts_32k = { .n = 3072, .cts = 222750, },336.n_cts_44k1 = { .n = 4704, .cts = 247500, },337.n_cts_48k = { .n = 5120, .cts = 247500, },338}, {339.tmds_clock_khz = 593407,340.n_cts_32k = { .n = 5824, .cts = 843750, },341.n_cts_44k1 = { .n = 8918, .cts = 937500, },342.n_cts_48k = { .n = 5824, .cts = 562500, },343}, {344.tmds_clock_khz = 594000,345.n_cts_32k = { .n = 3072, .cts = 445500, },346.n_cts_44k1 = { .n = 9408, .cts = 990000, },347.n_cts_48k = { .n = 6144, .cts = 594000, },348},349};350351static int drm_hdmi_acr_find_tmds_entry(unsigned long tmds_clock_khz)352{353int i;354355/* skip the "other" entry */356for (i = 1; i < ARRAY_SIZE(hdmi_acr_n_cts); i++) {357if (hdmi_acr_n_cts[i].tmds_clock_khz == tmds_clock_khz)358return i;359}360361return 0;362}363364/**365* drm_hdmi_acr_get_n_cts() - get N and CTS values for Audio Clock Regeneration366*367* @tmds_char_rate: TMDS clock (char rate) as used by the HDMI connector368* @sample_rate: audio sample rate369* @out_n: a pointer to write the N value370* @out_cts: a pointer to write the CTS value371*372* Get the N and CTS values (either by calculating them or by returning data373* from the tables. This follows the HDMI 1.4b Section 7.2 "Audio Sample Clock374* Capture and Regeneration".375*376* Note, @sample_rate corresponds to the Fs value, see sections 7.2.4 - 7.2.6377* on how to select Fs for non-L-PCM formats.378*/379void380drm_hdmi_acr_get_n_cts(unsigned long long tmds_char_rate,381unsigned int sample_rate,382unsigned int *out_n,383unsigned int *out_cts)384{385/* be a bit more tolerant, especially for the 1.001 entries */386unsigned long tmds_clock_khz = DIV_ROUND_CLOSEST_ULL(tmds_char_rate, 1000);387const struct drm_hdmi_acr_n_cts_entry *entry;388unsigned int n, cts, mult;389int tmds_idx;390391tmds_idx = drm_hdmi_acr_find_tmds_entry(tmds_clock_khz);392393/*394* Don't change the order, 192 kHz is divisible by 48k and 32k, but it395* should use 48k entry.396*/397if (sample_rate % 48000 == 0) {398entry = &hdmi_acr_n_cts[tmds_idx].n_cts_48k;399mult = sample_rate / 48000;400} else if (sample_rate % 44100 == 0) {401entry = &hdmi_acr_n_cts[tmds_idx].n_cts_44k1;402mult = sample_rate / 44100;403} else if (sample_rate % 32000 == 0) {404entry = &hdmi_acr_n_cts[tmds_idx].n_cts_32k;405mult = sample_rate / 32000;406} else {407entry = NULL;408}409410if (entry) {411n = entry->n * mult;412cts = entry->cts;413} else {414/* Recommended optimal value, HDMI 1.4b, Section 7.2.1 */415n = 128 * sample_rate / 1000;416cts = 0;417}418419if (!cts)420cts = DIV_ROUND_CLOSEST_ULL(tmds_char_rate * n,421128 * sample_rate);422423*out_n = n;424*out_cts = cts;425}426EXPORT_SYMBOL(drm_hdmi_acr_get_n_cts);427428429