Path: blob/master/drivers/gpu/host1x/hw/hw_host1x07_vm.h
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/* SPDX-License-Identifier: GPL-2.0-only */1/*2* Copyright (c) 2018 NVIDIA Corporation.3*/45#define HOST1X_CHANNEL_DMASTART 0x00006#define HOST1X_CHANNEL_DMASTART_HI 0x00047#define HOST1X_CHANNEL_DMAPUT 0x00088#define HOST1X_CHANNEL_DMAPUT_HI 0x000c9#define HOST1X_CHANNEL_DMAGET 0x001010#define HOST1X_CHANNEL_DMAGET_HI 0x001411#define HOST1X_CHANNEL_DMAEND 0x001812#define HOST1X_CHANNEL_DMAEND_HI 0x001c13#define HOST1X_CHANNEL_DMACTRL 0x002014#define HOST1X_CHANNEL_DMACTRL_DMASTOP BIT(0)15#define HOST1X_CHANNEL_DMACTRL_DMAGETRST BIT(1)16#define HOST1X_CHANNEL_DMACTRL_DMAINITGET BIT(2)17#define HOST1X_CHANNEL_CMDFIFO_STAT 0x002418#define HOST1X_CHANNEL_CMDFIFO_STAT_EMPTY BIT(13)19#define HOST1X_CHANNEL_CMDFIFO_RDATA 0x002820#define HOST1X_CHANNEL_CMDP_OFFSET 0x003021#define HOST1X_CHANNEL_CMDP_CLASS 0x003422#define HOST1X_CHANNEL_CHANNELSTAT 0x003823#define HOST1X_CHANNEL_CMDPROC_STOP 0x004824#define HOST1X_CHANNEL_TEARDOWN 0x004c2526#define HOST1X_SYNC_SYNCPT_CPU_INCR(x) (0x6400 + 4 * (x))27#define HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(x) (0x6464 + 4 * (x))28#define HOST1X_SYNC_SYNCPT_THRESH_INT_ENABLE_CPU0(x) (0x652c + 4 * (x))29#define HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(x) (0x6590 + 4 * (x))30#define HOST1X_SYNC_SYNCPT(x) (0x8080 + 4 * (x))31#define HOST1X_SYNC_SYNCPT_INT_THRESH(x) (0x9980 + 4 * (x))32#define HOST1X_SYNC_SYNCPT_CH_APP(x) (0xa604 + 4 * (x))33#define HOST1X_SYNC_SYNCPT_CH_APP_CH(v) (((v) & 0x3f) << 8)343536