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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/drivers/gpu/nova-core/firmware/gsp.rs
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// SPDX-License-Identifier: GPL-2.0
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use kernel::{
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device,
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dma::{
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DataDirection,
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DmaAddress, //
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},
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kvec,
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prelude::*,
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scatterlist::{
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Owned,
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SGTable, //
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},
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};
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use crate::{
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dma::DmaObject,
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firmware::riscv::RiscvFirmware,
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gpu::{
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Architecture,
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Chipset, //
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},
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gsp::GSP_PAGE_SIZE,
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num::FromSafeCast,
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};
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/// Ad-hoc and temporary module to extract sections from ELF images.
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///
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/// Some firmware images are currently packaged as ELF files, where sections names are used as keys
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/// to specific and related bits of data. Future firmware versions are scheduled to move away from
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/// that scheme before nova-core becomes stable, which means this module will eventually be
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/// removed.
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mod elf {
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use kernel::{
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bindings,
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prelude::*,
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transmute::FromBytes, //
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};
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/// Newtype to provide a [`FromBytes`] implementation.
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#[repr(transparent)]
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struct Elf64Hdr(bindings::elf64_hdr);
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// SAFETY: all bit patterns are valid for this type, and it doesn't use interior mutability.
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unsafe impl FromBytes for Elf64Hdr {}
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#[repr(transparent)]
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struct Elf64SHdr(bindings::elf64_shdr);
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// SAFETY: all bit patterns are valid for this type, and it doesn't use interior mutability.
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unsafe impl FromBytes for Elf64SHdr {}
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/// Tries to extract section with name `name` from the ELF64 image `elf`, and returns it.
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pub(super) fn elf64_section<'a, 'b>(elf: &'a [u8], name: &'b str) -> Option<&'a [u8]> {
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let hdr = &elf
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.get(0..size_of::<bindings::elf64_hdr>())
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.and_then(Elf64Hdr::from_bytes)?
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.0;
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// Get all the section headers.
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let mut shdr = {
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let shdr_num = usize::from(hdr.e_shnum);
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let shdr_start = usize::try_from(hdr.e_shoff).ok()?;
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let shdr_end = shdr_num
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.checked_mul(size_of::<Elf64SHdr>())
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.and_then(|v| v.checked_add(shdr_start))?;
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elf.get(shdr_start..shdr_end)
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.map(|slice| slice.chunks_exact(size_of::<Elf64SHdr>()))?
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};
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// Get the strings table.
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let strhdr = shdr
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.clone()
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.nth(usize::from(hdr.e_shstrndx))
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.and_then(Elf64SHdr::from_bytes)?;
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// Find the section which name matches `name` and return it.
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shdr.find(|&sh| {
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let Some(hdr) = Elf64SHdr::from_bytes(sh) else {
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return false;
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};
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let Some(name_idx) = strhdr
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.0
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.sh_offset
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.checked_add(u64::from(hdr.0.sh_name))
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.and_then(|idx| usize::try_from(idx).ok())
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else {
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return false;
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};
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// Get the start of the name.
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elf.get(name_idx..)
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// Stop at the first `0`.
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.and_then(|nstr| nstr.get(0..=nstr.iter().position(|b| *b == 0)?))
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// Convert into CStr. This should never fail because of the line above.
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.and_then(|nstr| CStr::from_bytes_with_nul(nstr).ok())
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// Convert into str.
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.and_then(|c_str| c_str.to_str().ok())
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// Check that the name matches.
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.map(|str| str == name)
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.unwrap_or(false)
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})
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// Return the slice containing the section.
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.and_then(|sh| {
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let hdr = Elf64SHdr::from_bytes(sh)?;
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let start = usize::try_from(hdr.0.sh_offset).ok()?;
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let end = usize::try_from(hdr.0.sh_size)
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.ok()
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.and_then(|sh_size| start.checked_add(sh_size))?;
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elf.get(start..end)
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})
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}
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}
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/// GSP firmware with 3-level radix page tables for the GSP bootloader.
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///
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/// The bootloader expects firmware to be mapped starting at address 0 in GSP's virtual address
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/// space:
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///
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/// ```text
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/// Level 0: 1 page, 1 entry -> points to first level 1 page
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/// Level 1: Multiple pages/entries -> each entry points to a level 2 page
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/// Level 2: Multiple pages/entries -> each entry points to a firmware page
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/// ```
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///
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/// Each page is 4KB, each entry is 8 bytes (64-bit DMA address).
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/// Also known as "Radix3" firmware.
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#[pin_data]
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pub(crate) struct GspFirmware {
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/// The GSP firmware inside a [`VVec`], device-mapped via a SG table.
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#[pin]
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fw: SGTable<Owned<VVec<u8>>>,
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/// Level 2 page table whose entries contain DMA addresses of firmware pages.
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#[pin]
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level2: SGTable<Owned<VVec<u8>>>,
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/// Level 1 page table whose entries contain DMA addresses of level 2 pages.
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#[pin]
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level1: SGTable<Owned<VVec<u8>>>,
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/// Level 0 page table (single 4KB page) with one entry: DMA address of first level 1 page.
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level0: DmaObject,
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/// Size in bytes of the firmware contained in [`Self::fw`].
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pub(crate) size: usize,
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/// Device-mapped GSP signatures matching the GPU's [`Chipset`].
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pub(crate) signatures: DmaObject,
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/// GSP bootloader, verifies the GSP firmware before loading and running it.
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pub(crate) bootloader: RiscvFirmware,
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}
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impl GspFirmware {
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/// Loads the GSP firmware binaries, map them into `dev`'s address-space, and creates the page
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/// tables expected by the GSP bootloader to load it.
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pub(crate) fn new<'a, 'b>(
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dev: &'a device::Device<device::Bound>,
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chipset: Chipset,
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ver: &'b str,
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) -> Result<impl PinInit<Self, Error> + 'a> {
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let fw = super::request_firmware(dev, chipset, "gsp", ver)?;
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let fw_section = elf::elf64_section(fw.data(), ".fwimage").ok_or(EINVAL)?;
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let sigs_section = match chipset.arch() {
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Architecture::Ampere => ".fwsignature_ga10x",
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Architecture::Ada => ".fwsignature_ad10x",
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_ => return Err(ENOTSUPP),
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};
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let signatures = elf::elf64_section(fw.data(), sigs_section)
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.ok_or(EINVAL)
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.and_then(|data| DmaObject::from_data(dev, data))?;
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let size = fw_section.len();
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// Move the firmware into a vmalloc'd vector and map it into the device address
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// space.
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let fw_vvec = VVec::with_capacity(fw_section.len(), GFP_KERNEL)
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.and_then(|mut v| {
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v.extend_from_slice(fw_section, GFP_KERNEL)?;
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Ok(v)
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})
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.map_err(|_| ENOMEM)?;
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let bl = super::request_firmware(dev, chipset, "bootloader", ver)?;
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let bootloader = RiscvFirmware::new(dev, &bl)?;
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Ok(try_pin_init!(Self {
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fw <- SGTable::new(dev, fw_vvec, DataDirection::ToDevice, GFP_KERNEL),
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level2 <- {
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// Allocate the level 2 page table, map the firmware onto it, and map it into the
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// device address space.
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VVec::<u8>::with_capacity(
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fw.iter().count() * core::mem::size_of::<u64>(),
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GFP_KERNEL,
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)
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.map_err(|_| ENOMEM)
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.and_then(|level2| map_into_lvl(&fw, level2))
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.map(|level2| SGTable::new(dev, level2, DataDirection::ToDevice, GFP_KERNEL))?
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},
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level1 <- {
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// Allocate the level 1 page table, map the level 2 page table onto it, and map it
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// into the device address space.
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VVec::<u8>::with_capacity(
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level2.iter().count() * core::mem::size_of::<u64>(),
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GFP_KERNEL,
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)
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.map_err(|_| ENOMEM)
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.and_then(|level1| map_into_lvl(&level2, level1))
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.map(|level1| SGTable::new(dev, level1, DataDirection::ToDevice, GFP_KERNEL))?
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},
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level0: {
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// Allocate the level 0 page table as a device-visible DMA object, and map the
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// level 1 page table onto it.
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// Level 0 page table data.
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let mut level0_data = kvec![0u8; GSP_PAGE_SIZE]?;
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// Fill level 1 page entry.
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let level1_entry = level1.iter().next().ok_or(EINVAL)?;
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let level1_entry_addr = level1_entry.dma_address();
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let dst = &mut level0_data[..size_of_val(&level1_entry_addr)];
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dst.copy_from_slice(&level1_entry_addr.to_le_bytes());
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// Turn the level0 page table into a [`DmaObject`].
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DmaObject::from_data(dev, &level0_data)?
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},
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size,
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signatures,
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bootloader,
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}))
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}
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/// Returns the DMA handle of the radix3 level 0 page table.
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pub(crate) fn radix3_dma_handle(&self) -> DmaAddress {
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self.level0.dma_handle()
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}
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}
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/// Build a page table from a scatter-gather list.
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///
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/// Takes each DMA-mapped region from `sg_table` and writes page table entries
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/// for all 4KB pages within that region. For example, a 16KB SG entry becomes
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/// 4 consecutive page table entries.
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fn map_into_lvl(sg_table: &SGTable<Owned<VVec<u8>>>, mut dst: VVec<u8>) -> Result<VVec<u8>> {
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for sg_entry in sg_table.iter() {
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// Number of pages we need to map.
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let num_pages = usize::from_safe_cast(sg_entry.dma_len()).div_ceil(GSP_PAGE_SIZE);
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for i in 0..num_pages {
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let entry = sg_entry.dma_address()
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+ (u64::from_safe_cast(i) * u64::from_safe_cast(GSP_PAGE_SIZE));
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dst.extend_from_slice(&entry.to_le_bytes(), GFP_KERNEL)?;
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}
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}
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Ok(dst)
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}
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