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GitHub Repository: torvalds/linux
 Path: blob/master/drivers/hid/amd-sfh-hid/amd_sfh_common.h
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/* SPDX-License-Identifier: GPL-2.0-or-later */

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/*

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 * AMD MP2 common macros and structures

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 *

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 * Copyright (c) 2022, Advanced Micro Devices, Inc.

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 * All Rights Reserved.

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 *

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 * Author: Basavaraj Natikar <[email protected]>

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 */

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#ifndef AMD_SFH_COMMON_H

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#define AMD_SFH_COMMON_H

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#include <linux/pci.h>

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#include "amd_sfh_hid.h"

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#define PCI_DEVICE_ID_AMD_MP2		0x15E4

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#define PCI_DEVICE_ID_AMD_MP2_1_1	0x164A

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#define AMD_C2P_MSG(regno) (0x10500 + ((regno) * 4))

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#define AMD_P2C_MSG(regno) (0x10680 + ((regno) * 4))

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#define AMD_C2P_MSG_V1(regno) (0x10900 + ((regno) * 4))

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#define AMD_P2C_MSG_V1(regno) (0x10500 + ((regno) * 4))

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#define SENSOR_ENABLED			4

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#define SENSOR_DISABLED			5

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#define AMD_SFH_IDLE_LOOP		200

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enum cmd_id {

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	NO_OP,

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	ENABLE_SENSOR,

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	DISABLE_SENSOR,

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	STOP_ALL_SENSORS = 8,

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};

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struct amd_mp2_sensor_info {

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	u8 sensor_idx;

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	u32 period;

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	dma_addr_t dma_address;

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};

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struct sfh_dev_status {

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	bool is_hpd_present;

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	bool is_hpd_enabled;

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	bool is_als_present;

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	bool is_sra_present;

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};

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struct amd_mp2_dev {

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	struct pci_dev *pdev;

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	struct amdtp_cl_data *cl_data;

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	void __iomem *mmio;

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	void __iomem *vsbase;

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	const struct amd_sfh1_1_ops *sfh1_1_ops;

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	struct amd_mp2_ops *mp2_ops;

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	struct amd_input_data in_data;

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	/* mp2 active control status */

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	u32 mp2_acs;

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	struct sfh_dev_status dev_en;

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	struct work_struct work;

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	u8 init_done;

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	u8 rver;

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};

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struct amd_mp2_ops {

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	void (*start)(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info);

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	void (*stop)(struct amd_mp2_dev *privdata, u16 sensor_idx);

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	void (*stop_all)(struct amd_mp2_dev *privdata);

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	int (*response)(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts);

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	void (*clear_intr)(struct amd_mp2_dev *privdata);

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	int (*init_intr)(struct amd_mp2_dev *privdata);

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	int (*discovery_status)(struct amd_mp2_dev *privdata);

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	void (*suspend)(struct amd_mp2_dev *mp2);

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	void (*resume)(struct amd_mp2_dev *mp2);

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	void (*remove)(void *privdata);

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	int (*get_rep_desc)(int sensor_idx, u8 rep_desc[]);

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	u32 (*get_desc_sz)(int sensor_idx, int descriptor_name);

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	u8 (*get_feat_rep)(int sensor_idx, int report_id, u8 *feature_report);

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	u8 (*get_in_rep)(u8 current_index, int sensor_idx, int report_id,

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			 struct amd_input_data *in_data);

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};

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void amd_sfh_work(struct work_struct *work);

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void amd_sfh_work_buffer(struct work_struct *work);

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void amd_sfh_clear_intr_v2(struct amd_mp2_dev *privdata);

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int amd_sfh_irq_init_v2(struct amd_mp2_dev *privdata);

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void amd_sfh_clear_intr(struct amd_mp2_dev *privdata);

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int amd_sfh_irq_init(struct amd_mp2_dev *privdata);

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static inline u64 amd_get_c2p_val(struct amd_mp2_dev *mp2, u32 idx)

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{

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	return mp2->rver == 1 ? AMD_C2P_MSG_V1(idx) :  AMD_C2P_MSG(idx);

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}

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static inline u64 amd_get_p2c_val(struct amd_mp2_dev *mp2, u32 idx)

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{

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	return mp2->rver == 1 ? AMD_P2C_MSG_V1(idx) :  AMD_P2C_MSG(idx);

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}

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#endif

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