Path: blob/master/drivers/hid/amd-sfh-hid/amd_sfh_pcie.c
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// SPDX-License-Identifier: GPL-2.0-or-later1/*2* AMD MP2 PCIe communication driver3* Copyright 2020-2021 Advanced Micro Devices, Inc.4*5* Authors: Shyam Sundar S K <[email protected]>6* Sandeep Singh <[email protected]>7* Basavaraj Natikar <[email protected]>8*/910#include <linux/bitops.h>11#include <linux/delay.h>12#include <linux/devm-helpers.h>13#include <linux/dma-mapping.h>14#include <linux/dmi.h>15#include <linux/interrupt.h>16#include <linux/io-64-nonatomic-lo-hi.h>17#include <linux/iopoll.h>18#include <linux/module.h>19#include <linux/slab.h>20#include <linux/string_choices.h>2122#include "amd_sfh_pcie.h"23#include "sfh1_1/amd_sfh_init.h"2425#define DRIVER_NAME "pcie_mp2_amd"26#define DRIVER_DESC "AMD(R) PCIe MP2 Communication Driver"2728#define ACEL_EN BIT(0)29#define GYRO_EN BIT(1)30#define MAGNO_EN BIT(2)31#define OP_EN BIT(15)32#define HPD_EN BIT(16)33#define ALS_EN BIT(19)34#define ACS_EN BIT(22)3536static int sensor_mask_override = -1;37module_param_named(sensor_mask, sensor_mask_override, int, 0444);38MODULE_PARM_DESC(sensor_mask, "override the detected sensors mask");3940static bool intr_disable = true;4142static int amd_sfh_wait_response_v2(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts)43{44union cmd_response cmd_resp;4546/* Get response with status within a max of 10 seconds timeout */47if (!readl_poll_timeout(mp2->mmio + AMD_P2C_MSG(0), cmd_resp.resp,48(cmd_resp.response_v2.response == sensor_sts &&49cmd_resp.response_v2.status == 0 && (sid == 0xff ||50cmd_resp.response_v2.sensor_id == sid)), 500, 10000000))51return cmd_resp.response_v2.response;5253return SENSOR_DISABLED;54}5556static void amd_start_sensor_v2(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info)57{58union sfh_cmd_base cmd_base;5960cmd_base.ul = 0;61cmd_base.cmd_v2.cmd_id = ENABLE_SENSOR;62cmd_base.cmd_v2.intr_disable = intr_disable;63cmd_base.cmd_v2.period = info.period;64cmd_base.cmd_v2.sensor_id = info.sensor_idx;65cmd_base.cmd_v2.length = 16;6667if (info.sensor_idx == als_idx)68cmd_base.cmd_v2.mem_type = USE_C2P_REG;6970writeq(info.dma_address, privdata->mmio + AMD_C2P_MSG1);71writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG0);72}7374static void amd_stop_sensor_v2(struct amd_mp2_dev *privdata, u16 sensor_idx)75{76union sfh_cmd_base cmd_base;7778cmd_base.ul = 0;79cmd_base.cmd_v2.cmd_id = DISABLE_SENSOR;80cmd_base.cmd_v2.intr_disable = intr_disable;81cmd_base.cmd_v2.period = 0;82cmd_base.cmd_v2.sensor_id = sensor_idx;83cmd_base.cmd_v2.length = 16;8485writeq(0x0, privdata->mmio + AMD_C2P_MSG1);86writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG0);87}8889static void amd_stop_all_sensor_v2(struct amd_mp2_dev *privdata)90{91union sfh_cmd_base cmd_base;9293cmd_base.cmd_v2.cmd_id = STOP_ALL_SENSORS;94cmd_base.cmd_v2.intr_disable = intr_disable;95cmd_base.cmd_v2.period = 0;96cmd_base.cmd_v2.sensor_id = 0;9798writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG0);99}100101void amd_sfh_clear_intr_v2(struct amd_mp2_dev *privdata)102{103if (readl(privdata->mmio + amd_get_p2c_val(privdata, 4))) {104writel(0, privdata->mmio + amd_get_p2c_val(privdata, 4));105writel(0xf, privdata->mmio + amd_get_p2c_val(privdata, 5));106}107}108109void amd_sfh_clear_intr(struct amd_mp2_dev *privdata)110{111if (privdata->mp2_ops->clear_intr)112privdata->mp2_ops->clear_intr(privdata);113}114115static irqreturn_t amd_sfh_irq_handler(int irq, void *data)116{117amd_sfh_clear_intr(data);118119return IRQ_HANDLED;120}121122int amd_sfh_irq_init_v2(struct amd_mp2_dev *privdata)123{124int rc;125126pcim_intx(privdata->pdev, true);127128rc = devm_request_irq(&privdata->pdev->dev, privdata->pdev->irq,129amd_sfh_irq_handler, 0, DRIVER_NAME, privdata);130if (rc) {131dev_err(&privdata->pdev->dev, "failed to request irq %d err=%d\n",132privdata->pdev->irq, rc);133return rc;134}135136return 0;137}138139static int amd_sfh_dis_sts_v2(struct amd_mp2_dev *privdata)140{141return (readl(privdata->mmio + AMD_P2C_MSG(1)) &142SENSOR_DISCOVERY_STATUS_MASK) >> SENSOR_DISCOVERY_STATUS_SHIFT;143}144145static void amd_start_sensor(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info)146{147union sfh_cmd_param cmd_param;148union sfh_cmd_base cmd_base;149150/* fill up command register */151memset(&cmd_base, 0, sizeof(cmd_base));152cmd_base.s.cmd_id = ENABLE_SENSOR;153cmd_base.s.period = info.period;154cmd_base.s.sensor_id = info.sensor_idx;155156/* fill up command param register */157memset(&cmd_param, 0, sizeof(cmd_param));158cmd_param.s.buf_layout = 1;159cmd_param.s.buf_length = 16;160161writeq(info.dma_address, privdata->mmio + AMD_C2P_MSG2);162writel(cmd_param.ul, privdata->mmio + AMD_C2P_MSG1);163writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG0);164}165166static void amd_stop_sensor(struct amd_mp2_dev *privdata, u16 sensor_idx)167{168union sfh_cmd_base cmd_base;169170/* fill up command register */171memset(&cmd_base, 0, sizeof(cmd_base));172cmd_base.s.cmd_id = DISABLE_SENSOR;173cmd_base.s.period = 0;174cmd_base.s.sensor_id = sensor_idx;175176writeq(0x0, privdata->mmio + AMD_C2P_MSG2);177writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG0);178}179180static void amd_stop_all_sensors(struct amd_mp2_dev *privdata)181{182union sfh_cmd_base cmd_base;183184/* fill up command register */185memset(&cmd_base, 0, sizeof(cmd_base));186cmd_base.s.cmd_id = STOP_ALL_SENSORS;187cmd_base.s.period = 0;188cmd_base.s.sensor_id = 0;189190writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG0);191}192193static const struct dmi_system_id dmi_sensor_mask_overrides[] = {194{195.matches = {196DMI_MATCH(DMI_PRODUCT_NAME, "HP ENVY x360 Convertible 13-ag0xxx"),197},198.driver_data = (void *)(ACEL_EN | MAGNO_EN),199},200{201.matches = {202DMI_MATCH(DMI_PRODUCT_NAME, "HP ENVY x360 Convertible 15-cp0xxx"),203},204.driver_data = (void *)(ACEL_EN | MAGNO_EN),205},206{ }207};208209int amd_mp2_get_sensor_num(struct amd_mp2_dev *privdata, u8 *sensor_id)210{211int activestatus, num_of_sensors = 0;212const struct dmi_system_id *dmi_id;213214if (sensor_mask_override == -1) {215dmi_id = dmi_first_match(dmi_sensor_mask_overrides);216if (dmi_id)217sensor_mask_override = (long)dmi_id->driver_data;218}219220if (sensor_mask_override >= 0) {221activestatus = sensor_mask_override;222} else {223activestatus = privdata->mp2_acs >> 4;224}225226if (ACEL_EN & activestatus)227sensor_id[num_of_sensors++] = accel_idx;228229if (GYRO_EN & activestatus)230sensor_id[num_of_sensors++] = gyro_idx;231232if (MAGNO_EN & activestatus)233sensor_id[num_of_sensors++] = mag_idx;234235if (OP_EN & activestatus)236sensor_id[num_of_sensors++] = op_idx;237238if (ALS_EN & activestatus)239sensor_id[num_of_sensors++] = als_idx;240241if (HPD_EN & activestatus)242sensor_id[num_of_sensors++] = HPD_IDX;243244if (ACS_EN & activestatus)245sensor_id[num_of_sensors++] = ACS_IDX;246247return num_of_sensors;248}249250static void amd_mp2_pci_remove(void *privdata)251{252struct amd_mp2_dev *mp2 = privdata;253amd_sfh_hid_client_deinit(privdata);254mp2->mp2_ops->stop_all(mp2);255pcim_intx(mp2->pdev, false);256amd_sfh_clear_intr(mp2);257}258259static struct amd_mp2_ops amd_sfh_ops_v2 = {260.start = amd_start_sensor_v2,261.stop = amd_stop_sensor_v2,262.stop_all = amd_stop_all_sensor_v2,263.response = amd_sfh_wait_response_v2,264.clear_intr = amd_sfh_clear_intr_v2,265.init_intr = amd_sfh_irq_init_v2,266.discovery_status = amd_sfh_dis_sts_v2,267.remove = amd_mp2_pci_remove,268};269270static struct amd_mp2_ops amd_sfh_ops = {271.start = amd_start_sensor,272.stop = amd_stop_sensor,273.stop_all = amd_stop_all_sensors,274.remove = amd_mp2_pci_remove,275};276277static void mp2_select_ops(struct amd_mp2_dev *privdata)278{279u8 acs;280281privdata->mp2_acs = readl(privdata->mmio + AMD_P2C_MSG3);282acs = privdata->mp2_acs & GENMASK(3, 0);283284switch (acs) {285case V2_STATUS:286privdata->mp2_ops = &amd_sfh_ops_v2;287break;288default:289privdata->mp2_ops = &amd_sfh_ops;290break;291}292}293294int amd_sfh_irq_init(struct amd_mp2_dev *privdata)295{296if (privdata->mp2_ops->init_intr)297return privdata->mp2_ops->init_intr(privdata);298299return 0;300}301302static int mp2_disable_intr(const struct dmi_system_id *id)303{304intr_disable = false;305return 0;306}307308static const struct dmi_system_id dmi_sfh_table[] = {309{310/*311* https://bugzilla.kernel.org/show_bug.cgi?id=218104312*/313.callback = mp2_disable_intr,314.matches = {315DMI_MATCH(DMI_SYS_VENDOR, "HP"),316DMI_MATCH(DMI_PRODUCT_NAME, "HP ProBook x360 435 G7"),317},318},319{}320};321322static const struct dmi_system_id dmi_nodevs[] = {323{324/*325* Google Chromebooks use Chrome OS Embedded Controller Sensor326* Hub instead of Sensor Hub Fusion and leaves MP2327* uninitialized, which disables all functionalities, even328* including the registers necessary for feature detections.329*/330.matches = {331DMI_MATCH(DMI_SYS_VENDOR, "Google"),332},333},334{ }335};336337static ssize_t hpd_show(struct device *dev, struct device_attribute *attr, char *buf)338{339struct amd_mp2_dev *mp2 = dev_get_drvdata(dev);340341return sysfs_emit(buf, "%s\n", str_enabled_disabled(mp2->dev_en.is_hpd_enabled));342}343344static ssize_t hpd_store(struct device *dev,345struct device_attribute *attr,346const char *buf, size_t count)347{348struct amd_mp2_dev *mp2 = dev_get_drvdata(dev);349bool enabled;350int ret;351352ret = kstrtobool(buf, &enabled);353if (ret)354return ret;355356mp2->sfh1_1_ops->toggle_hpd(mp2, enabled);357358return count;359}360static DEVICE_ATTR_RW(hpd);361362static umode_t sfh_attr_is_visible(struct kobject *kobj, struct attribute *attr, int idx)363{364struct device *dev = kobj_to_dev(kobj);365struct amd_mp2_dev *mp2 = dev_get_drvdata(dev);366367if (!mp2->sfh1_1_ops || !mp2->dev_en.is_hpd_present)368return 0;369370return attr->mode;371}372373static struct attribute *sfh_attrs[] = {374&dev_attr_hpd.attr,375NULL,376};377378static struct attribute_group sfh_attr_group = {379.attrs = sfh_attrs,380.is_visible = sfh_attr_is_visible,381};382383static const struct attribute_group *amd_sfh_groups[] = {384&sfh_attr_group,385NULL,386};387388static void sfh1_1_init_work(struct work_struct *work)389{390struct amd_mp2_dev *mp2 = container_of(work, struct amd_mp2_dev, work);391int rc;392393rc = mp2->sfh1_1_ops->init(mp2);394if (rc)395return;396397amd_sfh_clear_intr(mp2);398mp2->init_done = 1;399400rc = sysfs_update_group(&mp2->pdev->dev.kobj, &sfh_attr_group);401if (rc)402dev_warn(&mp2->pdev->dev, "failed to update sysfs group\n");403404}405406static void sfh_init_work(struct work_struct *work)407{408struct amd_mp2_dev *mp2 = container_of(work, struct amd_mp2_dev, work);409struct pci_dev *pdev = mp2->pdev;410int rc;411412rc = amd_sfh_hid_client_init(mp2);413if (rc) {414amd_sfh_clear_intr(mp2);415dev_err(&pdev->dev, "amd_sfh_hid_client_init failed err %d\n", rc);416return;417}418419amd_sfh_clear_intr(mp2);420mp2->init_done = 1;421}422423static void amd_sfh_remove(struct pci_dev *pdev)424{425struct amd_mp2_dev *mp2 = pci_get_drvdata(pdev);426427flush_work(&mp2->work);428if (mp2->init_done)429mp2->mp2_ops->remove(mp2);430}431432static int amd_mp2_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)433{434struct amd_mp2_dev *privdata;435int rc;436437if (dmi_first_match(dmi_nodevs))438return -ENODEV;439440dmi_check_system(dmi_sfh_table);441442privdata = devm_kzalloc(&pdev->dev, sizeof(*privdata), GFP_KERNEL);443if (!privdata)444return -ENOMEM;445446privdata->pdev = pdev;447dev_set_drvdata(&pdev->dev, privdata);448rc = pcim_enable_device(pdev);449if (rc)450return rc;451452rc = pcim_iomap_regions(pdev, BIT(2), DRIVER_NAME);453if (rc)454return rc;455456privdata->mmio = pcim_iomap_table(pdev)[2];457pci_set_master(pdev);458rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));459if (rc) {460dev_err(&pdev->dev, "failed to set DMA mask\n");461return rc;462}463464privdata->cl_data = devm_kzalloc(&pdev->dev, sizeof(struct amdtp_cl_data), GFP_KERNEL);465if (!privdata->cl_data)466return -ENOMEM;467468privdata->sfh1_1_ops = (const struct amd_sfh1_1_ops *)id->driver_data;469if (privdata->sfh1_1_ops) {470if (boot_cpu_data.x86 >= 0x1A)471privdata->rver = 1;472473rc = devm_work_autocancel(&pdev->dev, &privdata->work, sfh1_1_init_work);474if (rc)475return rc;476477schedule_work(&privdata->work);478return 0;479}480481mp2_select_ops(privdata);482483rc = amd_sfh_irq_init(privdata);484if (rc) {485dev_err(&pdev->dev, "amd_sfh_irq_init failed\n");486return rc;487}488489rc = devm_work_autocancel(&pdev->dev, &privdata->work, sfh_init_work);490if (rc) {491amd_sfh_clear_intr(privdata);492return rc;493}494495schedule_work(&privdata->work);496return 0;497}498499static void amd_sfh_shutdown(struct pci_dev *pdev)500{501struct amd_mp2_dev *mp2 = pci_get_drvdata(pdev);502503if (mp2) {504flush_work(&mp2->work);505if (mp2->init_done)506mp2->mp2_ops->stop_all(mp2);507}508}509510static int __maybe_unused amd_mp2_pci_resume(struct device *dev)511{512struct amd_mp2_dev *mp2 = dev_get_drvdata(dev);513514flush_work(&mp2->work);515if (mp2->init_done)516mp2->mp2_ops->resume(mp2);517518return 0;519}520521static int __maybe_unused amd_mp2_pci_suspend(struct device *dev)522{523struct amd_mp2_dev *mp2 = dev_get_drvdata(dev);524525flush_work(&mp2->work);526if (mp2->init_done)527mp2->mp2_ops->suspend(mp2);528529return 0;530}531532static SIMPLE_DEV_PM_OPS(amd_mp2_pm_ops, amd_mp2_pci_suspend,533amd_mp2_pci_resume);534535static const struct pci_device_id amd_mp2_pci_tbl[] = {536{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_MP2) },537{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_MP2_1_1),538.driver_data = (kernel_ulong_t)&sfh1_1_ops },539{ }540};541MODULE_DEVICE_TABLE(pci, amd_mp2_pci_tbl);542543static struct pci_driver amd_mp2_pci_driver = {544.name = DRIVER_NAME,545.id_table = amd_mp2_pci_tbl,546.probe = amd_mp2_pci_probe,547.driver.pm = &amd_mp2_pm_ops,548.shutdown = amd_sfh_shutdown,549.remove = amd_sfh_remove,550.dev_groups = amd_sfh_groups,551};552module_pci_driver(amd_mp2_pci_driver);553554MODULE_DESCRIPTION(DRIVER_DESC);555MODULE_LICENSE("Dual BSD/GPL");556MODULE_AUTHOR("Shyam Sundar S K <[email protected]>");557MODULE_AUTHOR("Sandeep Singh <[email protected]>");558MODULE_AUTHOR("Basavaraj Natikar <[email protected]>");559560561