Path: blob/master/drivers/net/wireless/realtek/rtw88/fw.c
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// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause1/* Copyright(c) 2018-2019 Realtek Corporation2*/34#include <linux/iopoll.h>56#include "main.h"7#include "coex.h"8#include "fw.h"9#include "tx.h"10#include "reg.h"11#include "sec.h"12#include "debug.h"13#include "util.h"14#include "wow.h"15#include "ps.h"16#include "phy.h"17#include "mac.h"1819static const struct rtw_hw_reg_desc fw_h2c_regs[] = {20{REG_FWIMR, MASKDWORD, "FWIMR"},21{REG_FWIMR, BIT_FS_H2CCMD_INT_EN, "FWIMR enable"},22{REG_FWISR, MASKDWORD, "FWISR"},23{REG_FWISR, BIT_FS_H2CCMD_INT, "FWISR enable"},24{REG_HMETFR, BIT_INT_BOX_ALL, "BoxBitMap"},25{REG_HMEBOX0, MASKDWORD, "MSG 0"},26{REG_HMEBOX0_EX, MASKDWORD, "MSG_EX 0"},27{REG_HMEBOX1, MASKDWORD, "MSG 1"},28{REG_HMEBOX1_EX, MASKDWORD, "MSG_EX 1"},29{REG_HMEBOX2, MASKDWORD, "MSG 2"},30{REG_HMEBOX2_EX, MASKDWORD, "MSG_EX 2"},31{REG_HMEBOX3, MASKDWORD, "MSG 3"},32{REG_HMEBOX3_EX, MASKDWORD, "MSG_EX 3"},33{REG_FT1IMR, MASKDWORD, "FT1IMR"},34{REG_FT1IMR, BIT_FS_H2C_CMD_OK_INT_EN, "FT1IMR enable"},35{REG_FT1ISR, MASKDWORD, "FT1ISR"},36{REG_FT1ISR, BIT_FS_H2C_CMD_OK_INT, "FT1ISR enable "},37};3839static const struct rtw_hw_reg_desc fw_c2h_regs[] = {40{REG_FWIMR, MASKDWORD, "FWIMR"},41{REG_FWIMR, BIT_FS_H2CCMD_INT_EN, "CPWM"},42{REG_FWIMR, BIT_FS_HRCV_INT_EN, "HRECV"},43{REG_FWISR, MASKDWORD, "FWISR"},44{REG_FWISR, BIT_FS_H2CCMD_INT, "CPWM"},45{REG_FWISR, BIT_FS_HRCV_INT, "HRECV"},46{REG_CPWM, MASKDWORD, "REG_CPWM"},47};4849static const struct rtw_hw_reg_desc fw_core_regs[] = {50{REG_ARFR2_V1, MASKDWORD, "EPC"},51{REG_ARFRH2_V1, MASKDWORD, "BADADDR"},52{REG_ARFR3_V1, MASKDWORD, "CAUSE"},53{REG_ARFR3_V1, BIT_EXC_CODE, "ExcCode"},54{REG_ARFRH3_V1, MASKDWORD, "Status"},55{REG_ARFR4, MASKDWORD, "SP"},56{REG_ARFRH4, MASKDWORD, "RA"},57{REG_FW_DBG6, MASKDWORD, "DBG 6"},58{REG_FW_DBG7, MASKDWORD, "DBG 7"},59};6061static void _rtw_fw_dump_dbg_info(struct rtw_dev *rtwdev,62const struct rtw_hw_reg_desc regs[], u32 size)63{64const struct rtw_hw_reg_desc *reg;65u32 val;66int i;6768for (i = 0; i < size; i++) {69reg = ®s[i];70val = rtw_read32_mask(rtwdev, reg->addr, reg->mask);7172rtw_dbg(rtwdev, RTW_DBG_FW, "[%s]addr:0x%x mask:0x%x value:0x%x\n",73reg->desc, reg->addr, reg->mask, val);74}75}7677void rtw_fw_dump_dbg_info(struct rtw_dev *rtwdev)78{79int i;8081if (!rtw_dbg_is_enabled(rtwdev, RTW_DBG_FW))82return;8384_rtw_fw_dump_dbg_info(rtwdev, fw_h2c_regs, ARRAY_SIZE(fw_h2c_regs));85_rtw_fw_dump_dbg_info(rtwdev, fw_c2h_regs, ARRAY_SIZE(fw_c2h_regs));86for (i = 0 ; i < RTW_DEBUG_DUMP_TIMES; i++) {87rtw_dbg(rtwdev, RTW_DBG_FW, "Firmware Coredump %dth\n", i + 1);88_rtw_fw_dump_dbg_info(rtwdev, fw_core_regs, ARRAY_SIZE(fw_core_regs));89}90}9192static void rtw_fw_c2h_cmd_handle_ext(struct rtw_dev *rtwdev,93struct sk_buff *skb)94{95struct rtw_c2h_cmd *c2h;96u8 sub_cmd_id;9798c2h = get_c2h_from_skb(skb);99sub_cmd_id = c2h->payload[0];100101switch (sub_cmd_id) {102case C2H_CCX_RPT:103rtw_tx_report_handle(rtwdev, skb, C2H_CCX_RPT);104break;105case C2H_SCAN_STATUS_RPT:106rtw_hw_scan_status_report(rtwdev, skb);107break;108case C2H_CHAN_SWITCH:109rtw_hw_scan_chan_switch(rtwdev, skb);110break;111default:112break;113}114}115116static u16 get_max_amsdu_len(u32 bit_rate)117{118/* lower than ofdm, do not aggregate */119if (bit_rate < 550)120return 1;121122/* lower than 20M 2ss mcs8, make it small */123if (bit_rate < 1800)124return 1200;125126/* lower than 40M 2ss mcs9, make it medium */127if (bit_rate < 4000)128return 2600;129130/* not yet 80M 2ss mcs8/9, make it twice regular packet size */131if (bit_rate < 7000)132return 3500;133134/* unlimited */135return 0;136}137138struct rtw_fw_iter_ra_data {139struct rtw_dev *rtwdev;140u8 *payload;141u8 length;142};143144static void rtw_fw_ra_report_iter(void *data, struct ieee80211_sta *sta)145{146struct rtw_fw_iter_ra_data *ra_data = data;147struct rtw_c2h_ra_rpt *ra_rpt = (struct rtw_c2h_ra_rpt *)ra_data->payload;148struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;149u8 mac_id, rate, sgi, bw;150u8 mcs, nss;151u32 bit_rate;152153mac_id = ra_rpt->mac_id;154if (si->mac_id != mac_id)155return;156157si->ra_report.txrate.flags = 0;158159rate = u8_get_bits(ra_rpt->rate_sgi, RTW_C2H_RA_RPT_RATE);160sgi = u8_get_bits(ra_rpt->rate_sgi, RTW_C2H_RA_RPT_SGI);161if (ra_data->length >= offsetofend(typeof(*ra_rpt), bw))162bw = ra_rpt->bw;163else164bw = si->bw_mode;165166if (rate < DESC_RATEMCS0) {167si->ra_report.txrate.legacy = rtw_desc_to_bitrate(rate);168goto legacy;169}170171rtw_desc_to_mcsrate(rate, &mcs, &nss);172if (rate >= DESC_RATEVHT1SS_MCS0)173si->ra_report.txrate.flags |= RATE_INFO_FLAGS_VHT_MCS;174else if (rate >= DESC_RATEMCS0)175si->ra_report.txrate.flags |= RATE_INFO_FLAGS_MCS;176177if (rate >= DESC_RATEMCS0) {178si->ra_report.txrate.mcs = mcs;179si->ra_report.txrate.nss = nss;180}181182if (sgi)183si->ra_report.txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;184185if (bw == RTW_CHANNEL_WIDTH_80)186si->ra_report.txrate.bw = RATE_INFO_BW_80;187else if (bw == RTW_CHANNEL_WIDTH_40)188si->ra_report.txrate.bw = RATE_INFO_BW_40;189else190si->ra_report.txrate.bw = RATE_INFO_BW_20;191192legacy:193bit_rate = cfg80211_calculate_bitrate(&si->ra_report.txrate);194195si->ra_report.desc_rate = rate;196si->ra_report.bit_rate = bit_rate;197198sta->deflink.agg.max_rc_amsdu_len = get_max_amsdu_len(bit_rate);199}200201static void rtw_fw_ra_report_handle(struct rtw_dev *rtwdev, u8 *payload,202u8 length)203{204struct rtw_c2h_ra_rpt *ra_rpt = (struct rtw_c2h_ra_rpt *)payload;205struct rtw_fw_iter_ra_data ra_data;206207if (WARN(length < rtwdev->chip->c2h_ra_report_size,208"invalid ra report c2h length %d\n", length))209return;210211rtwdev->dm_info.tx_rate = u8_get_bits(ra_rpt->rate_sgi,212RTW_C2H_RA_RPT_RATE);213ra_data.rtwdev = rtwdev;214ra_data.payload = payload;215ra_data.length = length;216rtw_iterate_stas_atomic(rtwdev, rtw_fw_ra_report_iter, &ra_data);217}218219struct rtw_beacon_filter_iter_data {220struct rtw_dev *rtwdev;221u8 *payload;222};223224static void rtw_fw_bcn_filter_notify_vif_iter(void *data,225struct ieee80211_vif *vif)226{227struct rtw_beacon_filter_iter_data *iter_data = data;228struct rtw_dev *rtwdev = iter_data->rtwdev;229u8 *payload = iter_data->payload;230u8 type = GET_BCN_FILTER_NOTIFY_TYPE(payload);231u8 event = GET_BCN_FILTER_NOTIFY_EVENT(payload);232s8 sig = (s8)GET_BCN_FILTER_NOTIFY_RSSI(payload);233234switch (type) {235case BCN_FILTER_NOTIFY_SIGNAL_CHANGE:236event = event ? NL80211_CQM_RSSI_THRESHOLD_EVENT_HIGH :237NL80211_CQM_RSSI_THRESHOLD_EVENT_LOW;238ieee80211_cqm_rssi_notify(vif, event, sig, GFP_KERNEL);239break;240case BCN_FILTER_CONNECTION_LOSS:241ieee80211_connection_loss(vif);242break;243case BCN_FILTER_CONNECTED:244rtwdev->beacon_loss = false;245break;246case BCN_FILTER_NOTIFY_BEACON_LOSS:247rtwdev->beacon_loss = true;248rtw_leave_lps(rtwdev);249break;250}251}252253static void rtw_fw_bcn_filter_notify(struct rtw_dev *rtwdev, u8 *payload,254u8 length)255{256struct rtw_beacon_filter_iter_data dev_iter_data;257258dev_iter_data.rtwdev = rtwdev;259dev_iter_data.payload = payload;260rtw_iterate_vifs(rtwdev, rtw_fw_bcn_filter_notify_vif_iter,261&dev_iter_data);262}263264static void rtw_fw_scan_result(struct rtw_dev *rtwdev, u8 *payload,265u8 length)266{267struct rtw_dm_info *dm_info = &rtwdev->dm_info;268269dm_info->scan_density = payload[0];270271rtw_dbg(rtwdev, RTW_DBG_FW, "scan.density = %x\n",272dm_info->scan_density);273}274275static void rtw_fw_adaptivity_result(struct rtw_dev *rtwdev, u8 *payload,276u8 length)277{278const struct rtw_hw_reg_offset *edcca_th = rtwdev->chip->edcca_th;279struct rtw_c2h_adaptivity *result = (struct rtw_c2h_adaptivity *)payload;280281rtw_dbg(rtwdev, RTW_DBG_ADAPTIVITY,282"Adaptivity: density %x igi %x l2h_th_init %x l2h %x h2l %x option %x\n",283result->density, result->igi, result->l2h_th_init, result->l2h,284result->h2l, result->option);285286rtw_dbg(rtwdev, RTW_DBG_ADAPTIVITY, "Reg Setting: L2H %x H2L %x\n",287rtw_read32_mask(rtwdev, edcca_th[EDCCA_TH_L2H_IDX].hw_reg.addr,288edcca_th[EDCCA_TH_L2H_IDX].hw_reg.mask),289rtw_read32_mask(rtwdev, edcca_th[EDCCA_TH_H2L_IDX].hw_reg.addr,290edcca_th[EDCCA_TH_H2L_IDX].hw_reg.mask));291292rtw_dbg(rtwdev, RTW_DBG_ADAPTIVITY, "EDCCA Flag %s\n",293rtw_read32_mask(rtwdev, REG_EDCCA_REPORT, BIT_EDCCA_FLAG) ?294"Set" : "Unset");295}296297void rtw_fw_c2h_cmd_handle(struct rtw_dev *rtwdev, struct sk_buff *skb)298{299struct rtw_c2h_cmd *c2h;300u32 pkt_offset;301u8 len;302303pkt_offset = *((u32 *)skb->cb);304c2h = (struct rtw_c2h_cmd *)(skb->data + pkt_offset);305len = skb->len - pkt_offset - 2;306307mutex_lock(&rtwdev->mutex);308309if (!test_bit(RTW_FLAG_RUNNING, rtwdev->flags))310goto unlock;311312switch (c2h->id) {313case C2H_CCX_TX_RPT:314rtw_tx_report_handle(rtwdev, skb, C2H_CCX_TX_RPT);315break;316case C2H_BT_INFO:317rtw_coex_bt_info_notify(rtwdev, c2h->payload, len);318break;319case C2H_BT_HID_INFO:320rtw_coex_bt_hid_info_notify(rtwdev, c2h->payload, len);321break;322case C2H_WLAN_INFO:323rtw_coex_wl_fwdbginfo_notify(rtwdev, c2h->payload, len);324break;325case C2H_BCN_FILTER_NOTIFY:326rtw_fw_bcn_filter_notify(rtwdev, c2h->payload, len);327break;328case C2H_HALMAC:329rtw_fw_c2h_cmd_handle_ext(rtwdev, skb);330break;331case C2H_RA_RPT:332rtw_fw_ra_report_handle(rtwdev, c2h->payload, len);333break;334case C2H_ADAPTIVITY:335rtw_fw_adaptivity_result(rtwdev, c2h->payload, len);336break;337default:338rtw_dbg(rtwdev, RTW_DBG_FW, "C2H 0x%x isn't handled\n", c2h->id);339break;340}341342unlock:343mutex_unlock(&rtwdev->mutex);344}345346void rtw_fw_c2h_cmd_rx_irqsafe(struct rtw_dev *rtwdev, u32 pkt_offset,347struct sk_buff *skb)348{349struct rtw_c2h_cmd *c2h;350u8 len;351352c2h = (struct rtw_c2h_cmd *)(skb->data + pkt_offset);353len = skb->len - pkt_offset - 2;354*((u32 *)skb->cb) = pkt_offset;355356rtw_dbg(rtwdev, RTW_DBG_FW, "recv C2H, id=0x%02x, seq=0x%02x, len=%d\n",357c2h->id, c2h->seq, len);358359switch (c2h->id) {360case C2H_BT_MP_INFO:361rtw_coex_info_response(rtwdev, skb);362break;363case C2H_WLAN_RFON:364complete(&rtwdev->lps_leave_check);365dev_kfree_skb_any(skb);366break;367case C2H_SCAN_RESULT:368complete(&rtwdev->fw_scan_density);369rtw_fw_scan_result(rtwdev, c2h->payload, len);370dev_kfree_skb_any(skb);371break;372default:373/* pass offset for further operation */374*((u32 *)skb->cb) = pkt_offset;375skb_queue_tail(&rtwdev->c2h_queue, skb);376ieee80211_queue_work(rtwdev->hw, &rtwdev->c2h_work);377break;378}379}380EXPORT_SYMBOL(rtw_fw_c2h_cmd_rx_irqsafe);381382void rtw_fw_c2h_cmd_isr(struct rtw_dev *rtwdev)383{384if (rtw_read8(rtwdev, REG_MCU_TST_CFG) == VAL_FW_TRIGGER)385rtw_fw_recovery(rtwdev);386else387rtw_warn(rtwdev, "unhandled firmware c2h interrupt\n");388}389EXPORT_SYMBOL(rtw_fw_c2h_cmd_isr);390391static void rtw_fw_send_h2c_command_register(struct rtw_dev *rtwdev,392struct rtw_h2c_register *h2c)393{394u32 box_reg, box_ex_reg;395u8 box_state, box;396int ret;397398rtw_dbg(rtwdev, RTW_DBG_FW, "send H2C content %08x %08x\n", h2c->w0,399h2c->w1);400401lockdep_assert_held(&rtwdev->mutex);402403box = rtwdev->h2c.last_box_num;404switch (box) {405case 0:406box_reg = REG_HMEBOX0;407box_ex_reg = REG_HMEBOX0_EX;408break;409case 1:410box_reg = REG_HMEBOX1;411box_ex_reg = REG_HMEBOX1_EX;412break;413case 2:414box_reg = REG_HMEBOX2;415box_ex_reg = REG_HMEBOX2_EX;416break;417case 3:418box_reg = REG_HMEBOX3;419box_ex_reg = REG_HMEBOX3_EX;420break;421default:422WARN(1, "invalid h2c mail box number\n");423return;424}425426ret = read_poll_timeout_atomic(rtw_read8, box_state,427!((box_state >> box) & 0x1), 100, 3000,428false, rtwdev, REG_HMETFR);429430if (ret) {431rtw_err(rtwdev, "failed to send h2c command\n");432rtw_fw_dump_dbg_info(rtwdev);433return;434}435436rtw_write32(rtwdev, box_ex_reg, h2c->w1);437rtw_write32(rtwdev, box_reg, h2c->w0);438439if (++rtwdev->h2c.last_box_num >= 4)440rtwdev->h2c.last_box_num = 0;441}442443static void rtw_fw_send_h2c_command(struct rtw_dev *rtwdev,444u8 *h2c)445{446struct rtw_h2c_cmd *h2c_cmd = (struct rtw_h2c_cmd *)h2c;447u8 box;448u8 box_state;449u32 box_reg, box_ex_reg;450int ret;451452rtw_dbg(rtwdev, RTW_DBG_FW,453"send H2C content %02x%02x%02x%02x %02x%02x%02x%02x\n",454h2c[3], h2c[2], h2c[1], h2c[0],455h2c[7], h2c[6], h2c[5], h2c[4]);456457lockdep_assert_held(&rtwdev->mutex);458459box = rtwdev->h2c.last_box_num;460switch (box) {461case 0:462box_reg = REG_HMEBOX0;463box_ex_reg = REG_HMEBOX0_EX;464break;465case 1:466box_reg = REG_HMEBOX1;467box_ex_reg = REG_HMEBOX1_EX;468break;469case 2:470box_reg = REG_HMEBOX2;471box_ex_reg = REG_HMEBOX2_EX;472break;473case 3:474box_reg = REG_HMEBOX3;475box_ex_reg = REG_HMEBOX3_EX;476break;477default:478WARN(1, "invalid h2c mail box number\n");479return;480}481482ret = read_poll_timeout_atomic(rtw_read8, box_state,483!((box_state >> box) & 0x1), 100, 3000,484false, rtwdev, REG_HMETFR);485486if (ret) {487rtw_err(rtwdev, "failed to send h2c command\n");488return;489}490491rtw_write32(rtwdev, box_ex_reg, le32_to_cpu(h2c_cmd->msg_ext));492rtw_write32(rtwdev, box_reg, le32_to_cpu(h2c_cmd->msg));493494if (++rtwdev->h2c.last_box_num >= 4)495rtwdev->h2c.last_box_num = 0;496}497498void rtw_fw_h2c_cmd_dbg(struct rtw_dev *rtwdev, u8 *h2c)499{500rtw_fw_send_h2c_command(rtwdev, h2c);501}502503static void rtw_fw_send_h2c_packet(struct rtw_dev *rtwdev, u8 *h2c_pkt)504{505int ret;506507lockdep_assert_held(&rtwdev->mutex);508509FW_OFFLOAD_H2C_SET_SEQ_NUM(h2c_pkt, rtwdev->h2c.seq);510ret = rtw_hci_write_data_h2c(rtwdev, h2c_pkt, H2C_PKT_SIZE);511if (ret)512rtw_err(rtwdev, "failed to send h2c packet\n");513rtwdev->h2c.seq++;514}515516void517rtw_fw_send_general_info(struct rtw_dev *rtwdev)518{519struct rtw_fifo_conf *fifo = &rtwdev->fifo;520u8 h2c_pkt[H2C_PKT_SIZE] = {0};521u16 total_size = H2C_PKT_HDR_SIZE + 4;522523if (rtw_chip_wcpu_8051(rtwdev))524return;525526rtw_h2c_pkt_set_header(h2c_pkt, H2C_PKT_GENERAL_INFO);527528SET_PKT_H2C_TOTAL_LEN(h2c_pkt, total_size);529530GENERAL_INFO_SET_FW_TX_BOUNDARY(h2c_pkt,531fifo->rsvd_fw_txbuf_addr -532fifo->rsvd_boundary);533534rtw_fw_send_h2c_packet(rtwdev, h2c_pkt);535}536537void538rtw_fw_send_phydm_info(struct rtw_dev *rtwdev)539{540struct rtw_hal *hal = &rtwdev->hal;541struct rtw_efuse *efuse = &rtwdev->efuse;542u8 h2c_pkt[H2C_PKT_SIZE] = {0};543u16 total_size = H2C_PKT_HDR_SIZE + 8;544u8 fw_rf_type = 0;545546if (rtw_chip_wcpu_8051(rtwdev))547return;548549if (hal->rf_type == RF_1T1R)550fw_rf_type = FW_RF_1T1R;551else if (hal->rf_type == RF_2T2R)552fw_rf_type = FW_RF_2T2R;553554rtw_h2c_pkt_set_header(h2c_pkt, H2C_PKT_PHYDM_INFO);555556SET_PKT_H2C_TOTAL_LEN(h2c_pkt, total_size);557PHYDM_INFO_SET_REF_TYPE(h2c_pkt, efuse->rfe_option);558PHYDM_INFO_SET_RF_TYPE(h2c_pkt, fw_rf_type);559PHYDM_INFO_SET_CUT_VER(h2c_pkt, hal->cut_version);560PHYDM_INFO_SET_RX_ANT_STATUS(h2c_pkt, hal->antenna_tx);561PHYDM_INFO_SET_TX_ANT_STATUS(h2c_pkt, hal->antenna_rx);562563rtw_fw_send_h2c_packet(rtwdev, h2c_pkt);564}565566void rtw_fw_do_iqk(struct rtw_dev *rtwdev, struct rtw_iqk_para *para)567{568u8 h2c_pkt[H2C_PKT_SIZE] = {0};569u16 total_size = H2C_PKT_HDR_SIZE + 1;570571rtw_h2c_pkt_set_header(h2c_pkt, H2C_PKT_IQK);572SET_PKT_H2C_TOTAL_LEN(h2c_pkt, total_size);573IQK_SET_CLEAR(h2c_pkt, para->clear);574IQK_SET_SEGMENT_IQK(h2c_pkt, para->segment_iqk);575576rtw_fw_send_h2c_packet(rtwdev, h2c_pkt);577}578EXPORT_SYMBOL(rtw_fw_do_iqk);579580void rtw_fw_inform_rfk_status(struct rtw_dev *rtwdev, bool start)581{582u8 h2c_pkt[H2C_PKT_SIZE] = {0};583584SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_WIFI_CALIBRATION);585586RFK_SET_INFORM_START(h2c_pkt, start);587588rtw_fw_send_h2c_command(rtwdev, h2c_pkt);589}590EXPORT_SYMBOL(rtw_fw_inform_rfk_status);591592void rtw_fw_query_bt_info(struct rtw_dev *rtwdev)593{594u8 h2c_pkt[H2C_PKT_SIZE] = {0};595596SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_QUERY_BT_INFO);597598SET_QUERY_BT_INFO(h2c_pkt, true);599600rtw_fw_send_h2c_command(rtwdev, h2c_pkt);601}602603void rtw_fw_default_port(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif)604{605struct rtw_h2c_register h2c = {};606607if (rtwvif->net_type != RTW_NET_MGD_LINKED)608return;609610/* Leave LPS before default port H2C so FW timer is correct */611rtw_leave_lps(rtwdev);612613h2c.w0 = u32_encode_bits(H2C_CMD_DEFAULT_PORT, RTW_H2C_W0_CMDID) |614u32_encode_bits(rtwvif->port, RTW_H2C_DEFAULT_PORT_W0_PORTID) |615u32_encode_bits(rtwvif->mac_id, RTW_H2C_DEFAULT_PORT_W0_MACID);616617rtw_fw_send_h2c_command_register(rtwdev, &h2c);618}619620void rtw_fw_wl_ch_info(struct rtw_dev *rtwdev, u8 link, u8 ch, u8 bw)621{622u8 h2c_pkt[H2C_PKT_SIZE] = {0};623624SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_WL_CH_INFO);625626SET_WL_CH_INFO_LINK(h2c_pkt, link);627SET_WL_CH_INFO_CHNL(h2c_pkt, ch);628SET_WL_CH_INFO_BW(h2c_pkt, bw);629630rtw_fw_send_h2c_command(rtwdev, h2c_pkt);631}632633void rtw_fw_query_bt_mp_info(struct rtw_dev *rtwdev,634struct rtw_coex_info_req *req)635{636u8 h2c_pkt[H2C_PKT_SIZE] = {0};637638SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_QUERY_BT_MP_INFO);639640SET_BT_MP_INFO_SEQ(h2c_pkt, req->seq);641SET_BT_MP_INFO_OP_CODE(h2c_pkt, req->op_code);642SET_BT_MP_INFO_PARA1(h2c_pkt, req->para1);643SET_BT_MP_INFO_PARA2(h2c_pkt, req->para2);644SET_BT_MP_INFO_PARA3(h2c_pkt, req->para3);645646rtw_fw_send_h2c_command(rtwdev, h2c_pkt);647}648649void rtw_fw_force_bt_tx_power(struct rtw_dev *rtwdev, u8 bt_pwr_dec_lvl)650{651u8 h2c_pkt[H2C_PKT_SIZE] = {0};652u8 index = 0 - bt_pwr_dec_lvl;653654SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_FORCE_BT_TX_POWER);655656SET_BT_TX_POWER_INDEX(h2c_pkt, index);657658rtw_fw_send_h2c_command(rtwdev, h2c_pkt);659}660661void rtw_fw_bt_ignore_wlan_action(struct rtw_dev *rtwdev, bool enable)662{663u8 h2c_pkt[H2C_PKT_SIZE] = {0};664665SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_IGNORE_WLAN_ACTION);666667SET_IGNORE_WLAN_ACTION_EN(h2c_pkt, enable);668669rtw_fw_send_h2c_command(rtwdev, h2c_pkt);670}671672void rtw_fw_coex_tdma_type(struct rtw_dev *rtwdev,673u8 para1, u8 para2, u8 para3, u8 para4, u8 para5)674{675u8 h2c_pkt[H2C_PKT_SIZE] = {0};676677SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_COEX_TDMA_TYPE);678679SET_COEX_TDMA_TYPE_PARA1(h2c_pkt, para1);680SET_COEX_TDMA_TYPE_PARA2(h2c_pkt, para2);681SET_COEX_TDMA_TYPE_PARA3(h2c_pkt, para3);682SET_COEX_TDMA_TYPE_PARA4(h2c_pkt, para4);683SET_COEX_TDMA_TYPE_PARA5(h2c_pkt, para5);684685rtw_fw_send_h2c_command(rtwdev, h2c_pkt);686}687688void rtw_fw_coex_query_hid_info(struct rtw_dev *rtwdev, u8 sub_id, u8 data)689{690u8 h2c_pkt[H2C_PKT_SIZE] = {0};691692SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_QUERY_BT_HID_INFO);693694SET_COEX_QUERY_HID_INFO_SUBID(h2c_pkt, sub_id);695SET_COEX_QUERY_HID_INFO_DATA1(h2c_pkt, data);696697rtw_fw_send_h2c_command(rtwdev, h2c_pkt);698}699700void rtw_fw_bt_wifi_control(struct rtw_dev *rtwdev, u8 op_code, u8 *data)701{702u8 h2c_pkt[H2C_PKT_SIZE] = {0};703704SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_BT_WIFI_CONTROL);705706SET_BT_WIFI_CONTROL_OP_CODE(h2c_pkt, op_code);707708SET_BT_WIFI_CONTROL_DATA1(h2c_pkt, *data);709SET_BT_WIFI_CONTROL_DATA2(h2c_pkt, *(data + 1));710SET_BT_WIFI_CONTROL_DATA3(h2c_pkt, *(data + 2));711SET_BT_WIFI_CONTROL_DATA4(h2c_pkt, *(data + 3));712SET_BT_WIFI_CONTROL_DATA5(h2c_pkt, *(data + 4));713714rtw_fw_send_h2c_command(rtwdev, h2c_pkt);715}716717void rtw_fw_send_rssi_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si)718{719u8 h2c_pkt[H2C_PKT_SIZE] = {0};720u8 rssi = ewma_rssi_read(&si->avg_rssi);721bool stbc_en = si->stbc_en ? true : false;722723SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_RSSI_MONITOR);724725SET_RSSI_INFO_MACID(h2c_pkt, si->mac_id);726SET_RSSI_INFO_RSSI(h2c_pkt, rssi);727SET_RSSI_INFO_STBC(h2c_pkt, stbc_en);728729rtw_fw_send_h2c_command(rtwdev, h2c_pkt);730}731732void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si,733bool reset_ra_mask)734{735u8 h2c_pkt[H2C_PKT_SIZE] = {0};736bool disable_pt = true;737u32 mask_hi;738739SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_RA_INFO);740741SET_RA_INFO_MACID(h2c_pkt, si->mac_id);742SET_RA_INFO_RATE_ID(h2c_pkt, si->rate_id);743SET_RA_INFO_INIT_RA_LVL(h2c_pkt, si->init_ra_lv);744SET_RA_INFO_SGI_EN(h2c_pkt, si->sgi_enable);745SET_RA_INFO_BW_MODE(h2c_pkt, si->bw_mode);746SET_RA_INFO_LDPC(h2c_pkt, !!si->ldpc_en);747SET_RA_INFO_NO_UPDATE(h2c_pkt, !reset_ra_mask);748SET_RA_INFO_VHT_EN(h2c_pkt, si->vht_enable);749SET_RA_INFO_DIS_PT(h2c_pkt, disable_pt);750SET_RA_INFO_RA_MASK0(h2c_pkt, (si->ra_mask & 0xff));751SET_RA_INFO_RA_MASK1(h2c_pkt, (si->ra_mask & 0xff00) >> 8);752SET_RA_INFO_RA_MASK2(h2c_pkt, (si->ra_mask & 0xff0000) >> 16);753SET_RA_INFO_RA_MASK3(h2c_pkt, (si->ra_mask & 0xff000000) >> 24);754755si->init_ra_lv = 0;756757rtw_fw_send_h2c_command(rtwdev, h2c_pkt);758759if (rtwdev->chip->id != RTW_CHIP_TYPE_8814A)760return;761762SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_RA_INFO_HI);763764mask_hi = si->ra_mask >> 32;765766SET_RA_INFO_RA_MASK0(h2c_pkt, (mask_hi & 0xff));767SET_RA_INFO_RA_MASK1(h2c_pkt, (mask_hi & 0xff00) >> 8);768SET_RA_INFO_RA_MASK2(h2c_pkt, (mask_hi & 0xff0000) >> 16);769SET_RA_INFO_RA_MASK3(h2c_pkt, (mask_hi & 0xff000000) >> 24);770771rtw_fw_send_h2c_command(rtwdev, h2c_pkt);772}773774void rtw_fw_media_status_report(struct rtw_dev *rtwdev, u8 mac_id, bool connect)775{776u8 h2c_pkt[H2C_PKT_SIZE] = {0};777778SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_MEDIA_STATUS_RPT);779MEDIA_STATUS_RPT_SET_OP_MODE(h2c_pkt, connect);780MEDIA_STATUS_RPT_SET_MACID(h2c_pkt, mac_id);781782rtw_fw_send_h2c_command(rtwdev, h2c_pkt);783}784785void rtw_fw_update_wl_phy_info(struct rtw_dev *rtwdev)786{787struct rtw_traffic_stats *stats = &rtwdev->stats;788struct rtw_dm_info *dm_info = &rtwdev->dm_info;789u8 h2c_pkt[H2C_PKT_SIZE] = {0};790791SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_WL_PHY_INFO);792SET_WL_PHY_INFO_TX_TP(h2c_pkt, stats->tx_throughput);793SET_WL_PHY_INFO_RX_TP(h2c_pkt, stats->rx_throughput);794SET_WL_PHY_INFO_TX_RATE_DESC(h2c_pkt, dm_info->tx_rate);795SET_WL_PHY_INFO_RX_RATE_DESC(h2c_pkt, dm_info->curr_rx_rate);796SET_WL_PHY_INFO_RX_EVM(h2c_pkt, dm_info->rx_evm_dbm[RF_PATH_A]);797rtw_fw_send_h2c_command(rtwdev, h2c_pkt);798}799800void rtw_fw_beacon_filter_config(struct rtw_dev *rtwdev, bool connect,801struct ieee80211_vif *vif)802{803struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;804struct ieee80211_sta *sta = ieee80211_find_sta(vif, bss_conf->bssid);805static const u8 rssi_min = 0, rssi_max = 100, rssi_offset = 100;806struct rtw_sta_info *si =807sta ? (struct rtw_sta_info *)sta->drv_priv : NULL;808s32 thold = RTW_DEFAULT_CQM_THOLD;809u32 hyst = RTW_DEFAULT_CQM_HYST;810u8 h2c_pkt[H2C_PKT_SIZE] = {0};811812if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_BCN_FILTER))813return;814815if (bss_conf->cqm_rssi_thold)816thold = bss_conf->cqm_rssi_thold;817if (bss_conf->cqm_rssi_hyst)818hyst = bss_conf->cqm_rssi_hyst;819820if (!connect) {821SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_BCN_FILTER_OFFLOAD_P1);822SET_BCN_FILTER_OFFLOAD_P1_ENABLE(h2c_pkt, connect);823rtw_fw_send_h2c_command(rtwdev, h2c_pkt);824825return;826}827828if (!si)829return;830831SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_BCN_FILTER_OFFLOAD_P0);832ether_addr_copy(&h2c_pkt[1], bss_conf->bssid);833rtw_fw_send_h2c_command(rtwdev, h2c_pkt);834835memset(h2c_pkt, 0, sizeof(h2c_pkt));836thold = clamp_t(s32, thold + rssi_offset, rssi_min, rssi_max);837SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_BCN_FILTER_OFFLOAD_P1);838SET_BCN_FILTER_OFFLOAD_P1_ENABLE(h2c_pkt, connect);839SET_BCN_FILTER_OFFLOAD_P1_OFFLOAD_MODE(h2c_pkt,840BCN_FILTER_OFFLOAD_MODE_DEFAULT);841SET_BCN_FILTER_OFFLOAD_P1_THRESHOLD(h2c_pkt, thold);842SET_BCN_FILTER_OFFLOAD_P1_BCN_LOSS_CNT(h2c_pkt, BCN_LOSS_CNT);843SET_BCN_FILTER_OFFLOAD_P1_MACID(h2c_pkt, si->mac_id);844SET_BCN_FILTER_OFFLOAD_P1_HYST(h2c_pkt, hyst);845SET_BCN_FILTER_OFFLOAD_P1_BCN_INTERVAL(h2c_pkt, bss_conf->beacon_int);846rtw_fw_send_h2c_command(rtwdev, h2c_pkt);847}848849void rtw_fw_set_pwr_mode(struct rtw_dev *rtwdev)850{851struct rtw_lps_conf *conf = &rtwdev->lps_conf;852u8 h2c_pkt[H2C_PKT_SIZE] = {0};853854SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_SET_PWR_MODE);855856SET_PWR_MODE_SET_MODE(h2c_pkt, conf->mode);857SET_PWR_MODE_SET_RLBM(h2c_pkt, conf->rlbm);858SET_PWR_MODE_SET_SMART_PS(h2c_pkt, conf->smart_ps);859SET_PWR_MODE_SET_AWAKE_INTERVAL(h2c_pkt, conf->awake_interval);860SET_PWR_MODE_SET_PORT_ID(h2c_pkt, conf->port_id);861SET_PWR_MODE_SET_PWR_STATE(h2c_pkt, conf->state);862863rtw_fw_send_h2c_command(rtwdev, h2c_pkt);864}865866void rtw_fw_set_keep_alive_cmd(struct rtw_dev *rtwdev, bool enable)867{868u8 h2c_pkt[H2C_PKT_SIZE] = {0};869struct rtw_fw_wow_keep_alive_para mode = {870.adopt = true,871.pkt_type = KEEP_ALIVE_NULL_PKT,872.period = 5,873};874875SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_KEEP_ALIVE);876SET_KEEP_ALIVE_ENABLE(h2c_pkt, enable);877SET_KEEP_ALIVE_ADOPT(h2c_pkt, mode.adopt);878SET_KEEP_ALIVE_PKT_TYPE(h2c_pkt, mode.pkt_type);879SET_KEEP_ALIVE_CHECK_PERIOD(h2c_pkt, mode.period);880881rtw_fw_send_h2c_command(rtwdev, h2c_pkt);882}883884void rtw_fw_set_disconnect_decision_cmd(struct rtw_dev *rtwdev, bool enable)885{886struct rtw_wow_param *rtw_wow = &rtwdev->wow;887u8 h2c_pkt[H2C_PKT_SIZE] = {0};888struct rtw_fw_wow_disconnect_para mode = {889.adopt = true,890.period = 30,891.retry_count = 5,892};893894SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_DISCONNECT_DECISION);895896if (test_bit(RTW_WOW_FLAG_EN_DISCONNECT, rtw_wow->flags)) {897SET_DISCONNECT_DECISION_ENABLE(h2c_pkt, enable);898SET_DISCONNECT_DECISION_ADOPT(h2c_pkt, mode.adopt);899SET_DISCONNECT_DECISION_CHECK_PERIOD(h2c_pkt, mode.period);900SET_DISCONNECT_DECISION_TRY_PKT_NUM(h2c_pkt, mode.retry_count);901}902903rtw_fw_send_h2c_command(rtwdev, h2c_pkt);904}905906void rtw_fw_set_wowlan_ctrl_cmd(struct rtw_dev *rtwdev, bool enable)907{908struct rtw_wow_param *rtw_wow = &rtwdev->wow;909u8 h2c_pkt[H2C_PKT_SIZE] = {0};910911SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_WOWLAN);912913SET_WOWLAN_FUNC_ENABLE(h2c_pkt, enable);914if (rtw_wow_mgd_linked(rtwdev)) {915if (test_bit(RTW_WOW_FLAG_EN_MAGIC_PKT, rtw_wow->flags))916SET_WOWLAN_MAGIC_PKT_ENABLE(h2c_pkt, enable);917if (test_bit(RTW_WOW_FLAG_EN_DISCONNECT, rtw_wow->flags))918SET_WOWLAN_DEAUTH_WAKEUP_ENABLE(h2c_pkt, enable);919if (test_bit(RTW_WOW_FLAG_EN_REKEY_PKT, rtw_wow->flags))920SET_WOWLAN_REKEY_WAKEUP_ENABLE(h2c_pkt, enable);921if (rtw_wow->pattern_cnt)922SET_WOWLAN_PATTERN_MATCH_ENABLE(h2c_pkt, enable);923}924925rtw_fw_send_h2c_command(rtwdev, h2c_pkt);926}927928void rtw_fw_set_aoac_global_info_cmd(struct rtw_dev *rtwdev,929u8 pairwise_key_enc,930u8 group_key_enc)931{932u8 h2c_pkt[H2C_PKT_SIZE] = {0};933934SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_AOAC_GLOBAL_INFO);935936SET_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(h2c_pkt, pairwise_key_enc);937SET_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(h2c_pkt, group_key_enc);938939rtw_fw_send_h2c_command(rtwdev, h2c_pkt);940}941942void rtw_fw_set_remote_wake_ctrl_cmd(struct rtw_dev *rtwdev, bool enable)943{944u8 h2c_pkt[H2C_PKT_SIZE] = {0};945946SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_REMOTE_WAKE_CTRL);947948SET_REMOTE_WAKECTRL_ENABLE(h2c_pkt, enable);949950if (rtw_wow_no_link(rtwdev))951SET_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN(h2c_pkt, enable);952953rtw_fw_send_h2c_command(rtwdev, h2c_pkt);954}955956static u8 rtw_get_rsvd_page_location(struct rtw_dev *rtwdev,957enum rtw_rsvd_packet_type type)958{959struct rtw_rsvd_page *rsvd_pkt;960u8 location = 0;961962list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, build_list) {963if (type == rsvd_pkt->type)964location = rsvd_pkt->page;965}966967return location;968}969970void rtw_fw_set_nlo_info(struct rtw_dev *rtwdev, bool enable)971{972u8 h2c_pkt[H2C_PKT_SIZE] = {0};973u8 loc_nlo;974975loc_nlo = rtw_get_rsvd_page_location(rtwdev, RSVD_NLO_INFO);976977SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_NLO_INFO);978979SET_NLO_FUN_EN(h2c_pkt, enable);980if (enable) {981if (rtw_get_lps_deep_mode(rtwdev) != LPS_DEEP_MODE_NONE)982SET_NLO_PS_32K(h2c_pkt, enable);983SET_NLO_IGNORE_SECURITY(h2c_pkt, enable);984SET_NLO_LOC_NLO_INFO(h2c_pkt, loc_nlo);985}986987rtw_fw_send_h2c_command(rtwdev, h2c_pkt);988}989990void rtw_fw_set_recover_bt_device(struct rtw_dev *rtwdev)991{992u8 h2c_pkt[H2C_PKT_SIZE] = {0};993994SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_RECOVER_BT_DEV);995SET_RECOVER_BT_DEV_EN(h2c_pkt, 1);996997rtw_fw_send_h2c_command(rtwdev, h2c_pkt);998}9991000void rtw_fw_set_pg_info(struct rtw_dev *rtwdev)1001{1002struct rtw_lps_conf *conf = &rtwdev->lps_conf;1003u8 h2c_pkt[H2C_PKT_SIZE] = {0};1004u8 loc_pg, loc_dpk;10051006loc_pg = rtw_get_rsvd_page_location(rtwdev, RSVD_LPS_PG_INFO);1007loc_dpk = rtw_get_rsvd_page_location(rtwdev, RSVD_LPS_PG_DPK);10081009SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_LPS_PG_INFO);10101011LPS_PG_INFO_LOC(h2c_pkt, loc_pg);1012LPS_PG_DPK_LOC(h2c_pkt, loc_dpk);1013LPS_PG_SEC_CAM_EN(h2c_pkt, conf->sec_cam_backup);1014LPS_PG_PATTERN_CAM_EN(h2c_pkt, conf->pattern_cam_backup);10151016rtw_fw_send_h2c_command(rtwdev, h2c_pkt);1017}10181019static u8 rtw_get_rsvd_page_probe_req_location(struct rtw_dev *rtwdev,1020struct cfg80211_ssid *ssid)1021{1022struct rtw_rsvd_page *rsvd_pkt;1023u8 location = 0;10241025list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, build_list) {1026if (rsvd_pkt->type != RSVD_PROBE_REQ)1027continue;1028if ((!ssid && !rsvd_pkt->ssid) ||1029cfg80211_ssid_eq(rsvd_pkt->ssid, ssid))1030location = rsvd_pkt->page;1031}10321033return location;1034}10351036static u16 rtw_get_rsvd_page_probe_req_size(struct rtw_dev *rtwdev,1037struct cfg80211_ssid *ssid)1038{1039struct rtw_rsvd_page *rsvd_pkt;1040u16 size = 0;10411042list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, build_list) {1043if (rsvd_pkt->type != RSVD_PROBE_REQ)1044continue;1045if ((!ssid && !rsvd_pkt->ssid) ||1046cfg80211_ssid_eq(rsvd_pkt->ssid, ssid))1047size = rsvd_pkt->probe_req_size;1048}10491050return size;1051}10521053void rtw_send_rsvd_page_h2c(struct rtw_dev *rtwdev)1054{1055u8 h2c_pkt[H2C_PKT_SIZE] = {0};1056u8 location = 0;10571058SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_RSVD_PAGE);10591060location = rtw_get_rsvd_page_location(rtwdev, RSVD_PROBE_RESP);1061*(h2c_pkt + 1) = location;1062rtw_dbg(rtwdev, RTW_DBG_FW, "RSVD_PROBE_RESP loc: %d\n", location);10631064location = rtw_get_rsvd_page_location(rtwdev, RSVD_PS_POLL);1065*(h2c_pkt + 2) = location;1066rtw_dbg(rtwdev, RTW_DBG_FW, "RSVD_PS_POLL loc: %d\n", location);10671068location = rtw_get_rsvd_page_location(rtwdev, RSVD_NULL);1069*(h2c_pkt + 3) = location;1070rtw_dbg(rtwdev, RTW_DBG_FW, "RSVD_NULL loc: %d\n", location);10711072location = rtw_get_rsvd_page_location(rtwdev, RSVD_QOS_NULL);1073*(h2c_pkt + 4) = location;1074rtw_dbg(rtwdev, RTW_DBG_FW, "RSVD_QOS_NULL loc: %d\n", location);10751076rtw_fw_send_h2c_command(rtwdev, h2c_pkt);1077}10781079static struct sk_buff *rtw_nlo_info_get(struct ieee80211_hw *hw)1080{1081struct rtw_dev *rtwdev = hw->priv;1082const struct rtw_chip_info *chip = rtwdev->chip;1083struct rtw_pno_request *pno_req = &rtwdev->wow.pno_req;1084struct rtw_nlo_info_hdr *nlo_hdr;1085struct cfg80211_ssid *ssid;1086struct sk_buff *skb;1087u8 *pos, loc;1088u32 size;1089int i;10901091if (!pno_req->inited || !pno_req->match_set_cnt)1092return NULL;10931094size = sizeof(struct rtw_nlo_info_hdr) + pno_req->match_set_cnt *1095IEEE80211_MAX_SSID_LEN + chip->tx_pkt_desc_sz;10961097skb = alloc_skb(size, GFP_KERNEL);1098if (!skb)1099return NULL;11001101skb_reserve(skb, chip->tx_pkt_desc_sz);11021103nlo_hdr = skb_put_zero(skb, sizeof(struct rtw_nlo_info_hdr));11041105nlo_hdr->nlo_count = pno_req->match_set_cnt;1106nlo_hdr->hidden_ap_count = pno_req->match_set_cnt;11071108/* pattern check for firmware */1109memset(nlo_hdr->pattern_check, 0xA5, FW_NLO_INFO_CHECK_SIZE);11101111for (i = 0; i < pno_req->match_set_cnt; i++)1112nlo_hdr->ssid_len[i] = pno_req->match_sets[i].ssid.ssid_len;11131114for (i = 0; i < pno_req->match_set_cnt; i++) {1115ssid = &pno_req->match_sets[i].ssid;1116loc = rtw_get_rsvd_page_probe_req_location(rtwdev, ssid);1117if (!loc) {1118rtw_err(rtwdev, "failed to get probe req rsvd loc\n");1119kfree_skb(skb);1120return NULL;1121}1122nlo_hdr->location[i] = loc;1123}11241125for (i = 0; i < pno_req->match_set_cnt; i++) {1126pos = skb_put_zero(skb, IEEE80211_MAX_SSID_LEN);1127memcpy(pos, pno_req->match_sets[i].ssid.ssid,1128pno_req->match_sets[i].ssid.ssid_len);1129}11301131return skb;1132}11331134static struct sk_buff *rtw_cs_channel_info_get(struct ieee80211_hw *hw)1135{1136struct rtw_dev *rtwdev = hw->priv;1137const struct rtw_chip_info *chip = rtwdev->chip;1138struct rtw_pno_request *pno_req = &rtwdev->wow.pno_req;1139struct ieee80211_channel *channels = pno_req->channels;1140struct sk_buff *skb;1141int count = pno_req->channel_cnt;1142u8 *pos;1143int i = 0;11441145skb = alloc_skb(4 * count + chip->tx_pkt_desc_sz, GFP_KERNEL);1146if (!skb)1147return NULL;11481149skb_reserve(skb, chip->tx_pkt_desc_sz);11501151for (i = 0; i < count; i++) {1152pos = skb_put_zero(skb, 4);11531154CHSW_INFO_SET_CH(pos, channels[i].hw_value);11551156if (channels[i].flags & IEEE80211_CHAN_RADAR)1157CHSW_INFO_SET_ACTION_ID(pos, 0);1158else1159CHSW_INFO_SET_ACTION_ID(pos, 1);1160CHSW_INFO_SET_TIMEOUT(pos, 1);1161CHSW_INFO_SET_PRI_CH_IDX(pos, 1);1162CHSW_INFO_SET_BW(pos, 0);1163}11641165return skb;1166}11671168static struct sk_buff *rtw_lps_pg_dpk_get(struct ieee80211_hw *hw)1169{1170struct rtw_dev *rtwdev = hw->priv;1171const struct rtw_chip_info *chip = rtwdev->chip;1172struct rtw_dpk_info *dpk_info = &rtwdev->dm_info.dpk_info;1173struct rtw_lps_pg_dpk_hdr *dpk_hdr;1174struct sk_buff *skb;1175u32 size;11761177size = chip->tx_pkt_desc_sz + sizeof(*dpk_hdr);1178skb = alloc_skb(size, GFP_KERNEL);1179if (!skb)1180return NULL;11811182skb_reserve(skb, chip->tx_pkt_desc_sz);1183dpk_hdr = skb_put_zero(skb, sizeof(*dpk_hdr));1184dpk_hdr->dpk_ch = dpk_info->dpk_ch;1185dpk_hdr->dpk_path_ok = dpk_info->dpk_path_ok[0];1186memcpy(dpk_hdr->dpk_txagc, dpk_info->dpk_txagc, 2);1187memcpy(dpk_hdr->dpk_gs, dpk_info->dpk_gs, 4);1188memcpy(dpk_hdr->coef, dpk_info->coef, 160);11891190return skb;1191}11921193static struct sk_buff *rtw_lps_pg_info_get(struct ieee80211_hw *hw)1194{1195struct rtw_dev *rtwdev = hw->priv;1196const struct rtw_chip_info *chip = rtwdev->chip;1197struct rtw_lps_conf *conf = &rtwdev->lps_conf;1198struct rtw_lps_pg_info_hdr *pg_info_hdr;1199struct rtw_wow_param *rtw_wow = &rtwdev->wow;1200struct sk_buff *skb;1201u32 size;12021203size = chip->tx_pkt_desc_sz + sizeof(*pg_info_hdr);1204skb = alloc_skb(size, GFP_KERNEL);1205if (!skb)1206return NULL;12071208skb_reserve(skb, chip->tx_pkt_desc_sz);1209pg_info_hdr = skb_put_zero(skb, sizeof(*pg_info_hdr));1210pg_info_hdr->tx_bu_page_count = rtwdev->fifo.rsvd_drv_pg_num;1211pg_info_hdr->macid = find_first_bit(rtwdev->mac_id_map, RTW_MAX_MAC_ID_NUM);1212pg_info_hdr->sec_cam_count =1213rtw_sec_cam_pg_backup(rtwdev, pg_info_hdr->sec_cam);1214pg_info_hdr->pattern_count = rtw_wow->pattern_cnt;12151216conf->sec_cam_backup = pg_info_hdr->sec_cam_count != 0;1217conf->pattern_cam_backup = rtw_wow->pattern_cnt != 0;12181219return skb;1220}12211222static struct sk_buff *rtw_get_rsvd_page_skb(struct ieee80211_hw *hw,1223struct rtw_rsvd_page *rsvd_pkt)1224{1225struct ieee80211_vif *vif;1226struct rtw_vif *rtwvif;1227struct sk_buff *skb_new;1228struct cfg80211_ssid *ssid;1229u16 tim_offset = 0;12301231if (rsvd_pkt->type == RSVD_DUMMY) {1232skb_new = alloc_skb(1, GFP_KERNEL);1233if (!skb_new)1234return NULL;12351236skb_put(skb_new, 1);1237return skb_new;1238}12391240rtwvif = rsvd_pkt->rtwvif;1241if (!rtwvif)1242return NULL;12431244vif = rtwvif_to_vif(rtwvif);12451246switch (rsvd_pkt->type) {1247case RSVD_BEACON:1248skb_new = ieee80211_beacon_get_tim(hw, vif, &tim_offset, NULL, 0);1249rsvd_pkt->tim_offset = tim_offset;1250break;1251case RSVD_PS_POLL:1252skb_new = ieee80211_pspoll_get(hw, vif);1253break;1254case RSVD_PROBE_RESP:1255skb_new = ieee80211_proberesp_get(hw, vif);1256break;1257case RSVD_NULL:1258skb_new = ieee80211_nullfunc_get(hw, vif, -1, false);1259break;1260case RSVD_QOS_NULL:1261skb_new = ieee80211_nullfunc_get(hw, vif, -1, true);1262break;1263case RSVD_LPS_PG_DPK:1264skb_new = rtw_lps_pg_dpk_get(hw);1265break;1266case RSVD_LPS_PG_INFO:1267skb_new = rtw_lps_pg_info_get(hw);1268break;1269case RSVD_PROBE_REQ:1270ssid = (struct cfg80211_ssid *)rsvd_pkt->ssid;1271if (ssid)1272skb_new = ieee80211_probereq_get(hw, vif->addr,1273ssid->ssid,1274ssid->ssid_len, 0);1275else1276skb_new = ieee80211_probereq_get(hw, vif->addr, NULL, 0, 0);1277if (skb_new)1278rsvd_pkt->probe_req_size = (u16)skb_new->len;1279break;1280case RSVD_NLO_INFO:1281skb_new = rtw_nlo_info_get(hw);1282break;1283case RSVD_CH_INFO:1284skb_new = rtw_cs_channel_info_get(hw);1285break;1286default:1287return NULL;1288}12891290if (!skb_new)1291return NULL;12921293return skb_new;1294}12951296static void rtw_fill_rsvd_page_desc(struct rtw_dev *rtwdev, struct sk_buff *skb,1297enum rtw_rsvd_packet_type type)1298{1299struct rtw_tx_pkt_info pkt_info = {0};1300const struct rtw_chip_info *chip = rtwdev->chip;1301u8 *pkt_desc;13021303rtw_tx_rsvd_page_pkt_info_update(rtwdev, &pkt_info, skb, type);1304pkt_desc = skb_push(skb, chip->tx_pkt_desc_sz);1305memset(pkt_desc, 0, chip->tx_pkt_desc_sz);1306rtw_tx_fill_tx_desc(rtwdev, &pkt_info, skb);1307}13081309static inline u8 rtw_len_to_page(unsigned int len, u16 page_size)1310{1311return DIV_ROUND_UP(len, page_size);1312}13131314static void rtw_rsvd_page_list_to_buf(struct rtw_dev *rtwdev, u16 page_size,1315u16 page_margin, u32 page, u8 *buf,1316struct rtw_rsvd_page *rsvd_pkt)1317{1318struct sk_buff *skb = rsvd_pkt->skb;13191320if (page >= 1)1321memcpy(buf + page_margin + page_size * (page - 1),1322skb->data, skb->len);1323else1324memcpy(buf, skb->data, skb->len);1325}13261327static struct rtw_rsvd_page *rtw_alloc_rsvd_page(struct rtw_dev *rtwdev,1328enum rtw_rsvd_packet_type type,1329bool txdesc)1330{1331struct rtw_rsvd_page *rsvd_pkt = NULL;13321333rsvd_pkt = kzalloc(sizeof(*rsvd_pkt), GFP_KERNEL);13341335if (!rsvd_pkt)1336return NULL;13371338INIT_LIST_HEAD(&rsvd_pkt->vif_list);1339INIT_LIST_HEAD(&rsvd_pkt->build_list);1340rsvd_pkt->type = type;1341rsvd_pkt->add_txdesc = txdesc;13421343return rsvd_pkt;1344}13451346static void rtw_insert_rsvd_page(struct rtw_dev *rtwdev,1347struct rtw_vif *rtwvif,1348struct rtw_rsvd_page *rsvd_pkt)1349{1350lockdep_assert_held(&rtwdev->mutex);13511352list_add_tail(&rsvd_pkt->vif_list, &rtwvif->rsvd_page_list);1353}13541355static void rtw_add_rsvd_page(struct rtw_dev *rtwdev,1356struct rtw_vif *rtwvif,1357enum rtw_rsvd_packet_type type,1358bool txdesc)1359{1360struct rtw_rsvd_page *rsvd_pkt;13611362rsvd_pkt = rtw_alloc_rsvd_page(rtwdev, type, txdesc);1363if (!rsvd_pkt) {1364rtw_err(rtwdev, "failed to alloc rsvd page %d\n", type);1365return;1366}13671368rsvd_pkt->rtwvif = rtwvif;1369rtw_insert_rsvd_page(rtwdev, rtwvif, rsvd_pkt);1370}13711372static void rtw_add_rsvd_page_probe_req(struct rtw_dev *rtwdev,1373struct rtw_vif *rtwvif,1374struct cfg80211_ssid *ssid)1375{1376struct rtw_rsvd_page *rsvd_pkt;13771378rsvd_pkt = rtw_alloc_rsvd_page(rtwdev, RSVD_PROBE_REQ, true);1379if (!rsvd_pkt) {1380rtw_err(rtwdev, "failed to alloc probe req rsvd page\n");1381return;1382}13831384rsvd_pkt->rtwvif = rtwvif;1385rsvd_pkt->ssid = ssid;1386rtw_insert_rsvd_page(rtwdev, rtwvif, rsvd_pkt);1387}13881389void rtw_remove_rsvd_page(struct rtw_dev *rtwdev,1390struct rtw_vif *rtwvif)1391{1392struct rtw_rsvd_page *rsvd_pkt, *tmp;13931394lockdep_assert_held(&rtwdev->mutex);13951396/* remove all of the rsvd pages for vif */1397list_for_each_entry_safe(rsvd_pkt, tmp, &rtwvif->rsvd_page_list,1398vif_list) {1399list_del(&rsvd_pkt->vif_list);1400if (!list_empty(&rsvd_pkt->build_list))1401list_del(&rsvd_pkt->build_list);1402kfree(rsvd_pkt);1403}1404}14051406void rtw_add_rsvd_page_bcn(struct rtw_dev *rtwdev,1407struct rtw_vif *rtwvif)1408{1409struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif);14101411if (vif->type != NL80211_IFTYPE_AP &&1412vif->type != NL80211_IFTYPE_ADHOC &&1413vif->type != NL80211_IFTYPE_MESH_POINT) {1414rtw_warn(rtwdev, "Cannot add beacon rsvd page for %d\n",1415vif->type);1416return;1417}14181419rtw_add_rsvd_page(rtwdev, rtwvif, RSVD_BEACON, false);1420}14211422void rtw_add_rsvd_page_pno(struct rtw_dev *rtwdev,1423struct rtw_vif *rtwvif)1424{1425struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif);1426struct rtw_wow_param *rtw_wow = &rtwdev->wow;1427struct rtw_pno_request *rtw_pno_req = &rtw_wow->pno_req;1428struct cfg80211_ssid *ssid;1429int i;14301431if (vif->type != NL80211_IFTYPE_STATION) {1432rtw_warn(rtwdev, "Cannot add PNO rsvd page for %d\n",1433vif->type);1434return;1435}14361437for (i = 0 ; i < rtw_pno_req->match_set_cnt; i++) {1438ssid = &rtw_pno_req->match_sets[i].ssid;1439rtw_add_rsvd_page_probe_req(rtwdev, rtwvif, ssid);1440}14411442rtw_add_rsvd_page_probe_req(rtwdev, rtwvif, NULL);1443rtw_add_rsvd_page(rtwdev, rtwvif, RSVD_NLO_INFO, false);1444rtw_add_rsvd_page(rtwdev, rtwvif, RSVD_CH_INFO, true);1445}14461447void rtw_add_rsvd_page_sta(struct rtw_dev *rtwdev,1448struct rtw_vif *rtwvif)1449{1450struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif);14511452if (vif->type != NL80211_IFTYPE_STATION) {1453rtw_warn(rtwdev, "Cannot add sta rsvd page for %d\n",1454vif->type);1455return;1456}14571458rtw_add_rsvd_page(rtwdev, rtwvif, RSVD_PS_POLL, true);1459rtw_add_rsvd_page(rtwdev, rtwvif, RSVD_QOS_NULL, true);1460rtw_add_rsvd_page(rtwdev, rtwvif, RSVD_NULL, true);1461rtw_add_rsvd_page(rtwdev, rtwvif, RSVD_LPS_PG_DPK, true);1462rtw_add_rsvd_page(rtwdev, rtwvif, RSVD_LPS_PG_INFO, true);1463}14641465int rtw_fw_write_data_rsvd_page(struct rtw_dev *rtwdev, u16 pg_addr,1466u8 *buf, u32 size)1467{1468u8 bckp[3];1469u8 val;1470u16 rsvd_pg_head;1471u32 bcn_valid_addr;1472u32 bcn_valid_mask;1473int ret;14741475lockdep_assert_held(&rtwdev->mutex);14761477if (!size)1478return -EINVAL;14791480bckp[2] = rtw_read8(rtwdev, REG_BCN_CTRL);14811482if (rtw_chip_wcpu_8051(rtwdev)) {1483rtw_write32_set(rtwdev, REG_DWBCN0_CTRL, BIT_BCN_VALID);1484} else {1485pg_addr &= BIT_MASK_BCN_HEAD_1_V1;1486pg_addr |= BIT_BCN_VALID_V1;1487rtw_write16(rtwdev, REG_FIFOPAGE_CTRL_2, pg_addr);1488}14891490val = rtw_read8(rtwdev, REG_CR + 1);1491bckp[0] = val;1492val |= BIT_ENSWBCN >> 8;1493rtw_write8(rtwdev, REG_CR + 1, val);14941495rtw_write8(rtwdev, REG_BCN_CTRL,1496(bckp[2] & ~BIT_EN_BCN_FUNCTION) | BIT_DIS_TSF_UDT);14971498if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_PCIE) {1499val = rtw_read8(rtwdev, REG_FWHW_TXQ_CTRL + 2);1500bckp[1] = val;1501val &= ~(BIT_EN_BCNQ_DL >> 16);1502rtw_write8(rtwdev, REG_FWHW_TXQ_CTRL + 2, val);1503}15041505ret = rtw_hci_write_data_rsvd_page(rtwdev, buf, size);1506if (ret) {1507rtw_err(rtwdev, "failed to write data to rsvd page\n");1508goto restore;1509}15101511if (rtw_chip_wcpu_8051(rtwdev)) {1512bcn_valid_addr = REG_DWBCN0_CTRL;1513bcn_valid_mask = BIT_BCN_VALID;1514} else {1515bcn_valid_addr = REG_FIFOPAGE_CTRL_2;1516bcn_valid_mask = BIT_BCN_VALID_V1;1517}15181519if (!check_hw_ready(rtwdev, bcn_valid_addr, bcn_valid_mask, 1)) {1520rtw_err(rtwdev, "error beacon valid\n");1521ret = -EBUSY;1522}15231524restore:1525rsvd_pg_head = rtwdev->fifo.rsvd_boundary;1526rtw_write16(rtwdev, REG_FIFOPAGE_CTRL_2,1527rsvd_pg_head | BIT_BCN_VALID_V1);1528rtw_write8(rtwdev, REG_BCN_CTRL, bckp[2]);1529if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_PCIE)1530rtw_write8(rtwdev, REG_FWHW_TXQ_CTRL + 2, bckp[1]);1531rtw_write8(rtwdev, REG_CR + 1, bckp[0]);15321533return ret;1534}15351536static int rtw_download_drv_rsvd_page(struct rtw_dev *rtwdev, u8 *buf, u32 size)1537{1538u32 pg_size;1539u32 pg_num = 0;1540u16 pg_addr = 0;15411542pg_size = rtwdev->chip->page_size;1543pg_num = size / pg_size + ((size & (pg_size - 1)) ? 1 : 0);1544if (pg_num > rtwdev->fifo.rsvd_drv_pg_num)1545return -ENOMEM;15461547pg_addr = rtwdev->fifo.rsvd_drv_addr;15481549return rtw_fw_write_data_rsvd_page(rtwdev, pg_addr, buf, size);1550}15511552static void __rtw_build_rsvd_page_reset(struct rtw_dev *rtwdev)1553{1554struct rtw_rsvd_page *rsvd_pkt, *tmp;15551556list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list,1557build_list) {1558list_del_init(&rsvd_pkt->build_list);15591560/* Don't free except for the dummy rsvd page,1561* others will be freed when removing vif1562*/1563if (rsvd_pkt->type == RSVD_DUMMY)1564kfree(rsvd_pkt);1565}1566}15671568static void rtw_build_rsvd_page_iter(void *data, u8 *mac,1569struct ieee80211_vif *vif)1570{1571struct rtw_dev *rtwdev = data;1572struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;1573struct rtw_rsvd_page *rsvd_pkt;15741575/* AP not yet started, don't gather its rsvd pages */1576if (vif->type == NL80211_IFTYPE_AP && !rtwdev->ap_active)1577return;15781579list_for_each_entry(rsvd_pkt, &rtwvif->rsvd_page_list, vif_list) {1580if (rsvd_pkt->type == RSVD_BEACON)1581list_add(&rsvd_pkt->build_list,1582&rtwdev->rsvd_page_list);1583else1584list_add_tail(&rsvd_pkt->build_list,1585&rtwdev->rsvd_page_list);1586}1587}15881589static int __rtw_build_rsvd_page_from_vifs(struct rtw_dev *rtwdev)1590{1591struct rtw_rsvd_page *rsvd_pkt;15921593__rtw_build_rsvd_page_reset(rtwdev);15941595/* gather rsvd page from vifs */1596rtw_iterate_vifs_atomic(rtwdev, rtw_build_rsvd_page_iter, rtwdev);15971598rsvd_pkt = list_first_entry_or_null(&rtwdev->rsvd_page_list,1599struct rtw_rsvd_page, build_list);1600if (!rsvd_pkt) {1601WARN(1, "Should not have an empty reserved page\n");1602return -EINVAL;1603}16041605/* the first rsvd should be beacon, otherwise add a dummy one */1606if (rsvd_pkt->type != RSVD_BEACON) {1607struct rtw_rsvd_page *dummy_pkt;16081609dummy_pkt = rtw_alloc_rsvd_page(rtwdev, RSVD_DUMMY, false);1610if (!dummy_pkt) {1611rtw_err(rtwdev, "failed to alloc dummy rsvd page\n");1612return -ENOMEM;1613}16141615list_add(&dummy_pkt->build_list, &rtwdev->rsvd_page_list);1616}16171618return 0;1619}16201621static u8 *rtw_build_rsvd_page(struct rtw_dev *rtwdev, u32 *size)1622{1623const struct rtw_chip_info *chip = rtwdev->chip;1624struct ieee80211_hw *hw = rtwdev->hw;1625struct rtw_rsvd_page *rsvd_pkt;1626struct sk_buff *iter;1627u16 page_size, page_margin, tx_desc_sz;1628u8 total_page = 0;1629u32 page = 0;1630u8 *buf;1631int ret;16321633page_size = chip->page_size;1634tx_desc_sz = chip->tx_pkt_desc_sz;1635page_margin = page_size - tx_desc_sz;16361637ret = __rtw_build_rsvd_page_from_vifs(rtwdev);1638if (ret) {1639rtw_err(rtwdev,1640"failed to build rsvd page from vifs, ret %d\n", ret);1641return NULL;1642}16431644list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, build_list) {1645iter = rtw_get_rsvd_page_skb(hw, rsvd_pkt);1646if (!iter) {1647rtw_err(rtwdev, "failed to build rsvd packet\n");1648goto release_skb;1649}16501651/* Fill the tx_desc for the rsvd pkt that requires one.1652* And iter->len will be added with size of tx_desc_sz.1653*/1654if (rsvd_pkt->add_txdesc)1655rtw_fill_rsvd_page_desc(rtwdev, iter, rsvd_pkt->type);16561657rsvd_pkt->skb = iter;1658rsvd_pkt->page = total_page;16591660/* Reserved page is downloaded via TX path, and TX path will1661* generate a tx_desc at the header to describe length of1662* the buffer. If we are not counting page numbers with the1663* size of tx_desc added at the first rsvd_pkt (usually a1664* beacon, firmware default refer to the first page as the1665* content of beacon), we could generate a buffer which size1666* is smaller than the actual size of the whole rsvd_page1667*/1668if (total_page == 0) {1669if (rsvd_pkt->type != RSVD_BEACON &&1670rsvd_pkt->type != RSVD_DUMMY) {1671rtw_err(rtwdev, "first page should be a beacon\n");1672goto release_skb;1673}1674total_page += rtw_len_to_page(iter->len + tx_desc_sz,1675page_size);1676} else {1677total_page += rtw_len_to_page(iter->len, page_size);1678}1679}16801681if (total_page > rtwdev->fifo.rsvd_drv_pg_num) {1682rtw_err(rtwdev, "rsvd page over size: %d\n", total_page);1683goto release_skb;1684}16851686*size = (total_page - 1) * page_size + page_margin;1687buf = kzalloc(*size, GFP_KERNEL);1688if (!buf)1689goto release_skb;16901691/* Copy the content of each rsvd_pkt to the buf, and they should1692* be aligned to the pages.1693*1694* Note that the first rsvd_pkt is a beacon no matter what vif->type.1695* And that rsvd_pkt does not require tx_desc because when it goes1696* through TX path, the TX path will generate one for it.1697*/1698list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, build_list) {1699rtw_rsvd_page_list_to_buf(rtwdev, page_size, page_margin,1700page, buf, rsvd_pkt);1701if (page == 0)1702page += rtw_len_to_page(rsvd_pkt->skb->len +1703tx_desc_sz, page_size);1704else1705page += rtw_len_to_page(rsvd_pkt->skb->len, page_size);17061707kfree_skb(rsvd_pkt->skb);1708rsvd_pkt->skb = NULL;1709}17101711return buf;17121713release_skb:1714list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, build_list) {1715kfree_skb(rsvd_pkt->skb);1716rsvd_pkt->skb = NULL;1717}17181719return NULL;1720}17211722static int rtw_download_beacon(struct rtw_dev *rtwdev)1723{1724struct ieee80211_hw *hw = rtwdev->hw;1725struct rtw_rsvd_page *rsvd_pkt;1726struct sk_buff *skb;1727int ret = 0;17281729rsvd_pkt = list_first_entry_or_null(&rtwdev->rsvd_page_list,1730struct rtw_rsvd_page, build_list);1731if (!rsvd_pkt) {1732rtw_err(rtwdev, "failed to get rsvd page from build list\n");1733return -ENOENT;1734}17351736if (rsvd_pkt->type != RSVD_BEACON &&1737rsvd_pkt->type != RSVD_DUMMY) {1738rtw_err(rtwdev, "invalid rsvd page type %d, should be beacon or dummy\n",1739rsvd_pkt->type);1740return -EINVAL;1741}17421743skb = rtw_get_rsvd_page_skb(hw, rsvd_pkt);1744if (!skb) {1745rtw_err(rtwdev, "failed to get beacon skb\n");1746return -ENOMEM;1747}17481749ret = rtw_download_drv_rsvd_page(rtwdev, skb->data, skb->len);1750if (ret)1751rtw_err(rtwdev, "failed to download drv rsvd page\n");17521753dev_kfree_skb(skb);17541755return ret;1756}17571758int rtw_fw_download_rsvd_page(struct rtw_dev *rtwdev)1759{1760u8 *buf;1761u32 size;1762int ret;17631764buf = rtw_build_rsvd_page(rtwdev, &size);1765if (!buf) {1766rtw_err(rtwdev, "failed to build rsvd page pkt\n");1767return -ENOMEM;1768}17691770ret = rtw_download_drv_rsvd_page(rtwdev, buf, size);1771if (ret) {1772rtw_err(rtwdev, "failed to download drv rsvd page\n");1773goto free;1774}17751776/* The last thing is to download the *ONLY* beacon again, because1777* the previous tx_desc is to describe the total rsvd page. Download1778* the beacon again to replace the TX desc header, and we will get1779* a correct tx_desc for the beacon in the rsvd page.1780*/1781ret = rtw_download_beacon(rtwdev);1782if (ret) {1783rtw_err(rtwdev, "failed to download beacon\n");1784goto free;1785}17861787free:1788kfree(buf);17891790return ret;1791}17921793void rtw_fw_update_beacon_work(struct work_struct *work)1794{1795struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,1796update_beacon_work);17971798mutex_lock(&rtwdev->mutex);1799rtw_fw_download_rsvd_page(rtwdev);1800rtw_send_rsvd_page_h2c(rtwdev);1801mutex_unlock(&rtwdev->mutex);1802}18031804static void rtw_fw_read_fifo_page(struct rtw_dev *rtwdev, u32 offset, u32 size,1805u32 *buf, u32 residue, u16 start_pg)1806{1807u32 i;1808u16 idx = 0;1809u16 ctl;18101811ctl = rtw_read16(rtwdev, REG_PKTBUF_DBG_CTRL) & 0xf000;1812/* disable rx clock gate */1813rtw_write32_set(rtwdev, REG_RCR, BIT_DISGCLK);18141815do {1816rtw_write16(rtwdev, REG_PKTBUF_DBG_CTRL, start_pg | ctl);18171818for (i = FIFO_DUMP_ADDR + residue;1819i < FIFO_DUMP_ADDR + FIFO_PAGE_SIZE; i += 4) {1820buf[idx++] = rtw_read32(rtwdev, i);1821size -= 4;1822if (size == 0)1823goto out;1824}18251826residue = 0;1827start_pg++;1828} while (size);18291830out:1831rtw_write16(rtwdev, REG_PKTBUF_DBG_CTRL, ctl);1832/* restore rx clock gate */1833rtw_write32_clr(rtwdev, REG_RCR, BIT_DISGCLK);1834}18351836static void rtw_fw_read_fifo(struct rtw_dev *rtwdev, enum rtw_fw_fifo_sel sel,1837u32 offset, u32 size, u32 *buf)1838{1839const struct rtw_chip_info *chip = rtwdev->chip;1840u32 start_pg, residue;18411842if (sel >= RTW_FW_FIFO_MAX) {1843rtw_dbg(rtwdev, RTW_DBG_FW, "wrong fw fifo sel\n");1844return;1845}1846if (sel == RTW_FW_FIFO_SEL_RSVD_PAGE)1847offset += rtwdev->fifo.rsvd_boundary << TX_PAGE_SIZE_SHIFT;1848residue = offset & (FIFO_PAGE_SIZE - 1);1849start_pg = (offset >> FIFO_PAGE_SIZE_SHIFT) + chip->fw_fifo_addr[sel];18501851rtw_fw_read_fifo_page(rtwdev, offset, size, buf, residue, start_pg);1852}18531854static bool rtw_fw_dump_check_size(struct rtw_dev *rtwdev,1855enum rtw_fw_fifo_sel sel,1856u32 start_addr, u32 size)1857{1858switch (sel) {1859case RTW_FW_FIFO_SEL_TX:1860case RTW_FW_FIFO_SEL_RX:1861if ((start_addr + size) > rtwdev->chip->fw_fifo_addr[sel])1862return false;1863fallthrough;1864default:1865return true;1866}1867}18681869int rtw_fw_dump_fifo(struct rtw_dev *rtwdev, u8 fifo_sel, u32 addr, u32 size,1870u32 *buffer)1871{1872if (!rtwdev->chip->fw_fifo_addr[0]) {1873rtw_dbg(rtwdev, RTW_DBG_FW, "chip not support dump fw fifo\n");1874return -ENOTSUPP;1875}18761877if (size == 0 || !buffer)1878return -EINVAL;18791880if (size & 0x3) {1881rtw_dbg(rtwdev, RTW_DBG_FW, "not 4byte alignment\n");1882return -EINVAL;1883}18841885if (!rtw_fw_dump_check_size(rtwdev, fifo_sel, addr, size)) {1886rtw_dbg(rtwdev, RTW_DBG_FW, "fw fifo dump size overflow\n");1887return -EINVAL;1888}18891890rtw_fw_read_fifo(rtwdev, fifo_sel, addr, size, buffer);18911892return 0;1893}18941895static void __rtw_fw_update_pkt(struct rtw_dev *rtwdev, u8 pkt_id, u16 size,1896u8 location)1897{1898const struct rtw_chip_info *chip = rtwdev->chip;1899u8 h2c_pkt[H2C_PKT_SIZE] = {0};1900u16 total_size = H2C_PKT_HDR_SIZE + H2C_PKT_UPDATE_PKT_LEN;19011902rtw_h2c_pkt_set_header(h2c_pkt, H2C_PKT_UPDATE_PKT);19031904SET_PKT_H2C_TOTAL_LEN(h2c_pkt, total_size);1905UPDATE_PKT_SET_PKT_ID(h2c_pkt, pkt_id);1906UPDATE_PKT_SET_LOCATION(h2c_pkt, location);19071908/* include txdesc size */1909size += chip->tx_pkt_desc_sz;1910UPDATE_PKT_SET_SIZE(h2c_pkt, size);19111912rtw_fw_send_h2c_packet(rtwdev, h2c_pkt);1913}19141915void rtw_fw_update_pkt_probe_req(struct rtw_dev *rtwdev,1916struct cfg80211_ssid *ssid)1917{1918u8 loc;1919u16 size;19201921loc = rtw_get_rsvd_page_probe_req_location(rtwdev, ssid);1922if (!loc) {1923rtw_err(rtwdev, "failed to get probe_req rsvd loc\n");1924return;1925}19261927size = rtw_get_rsvd_page_probe_req_size(rtwdev, ssid);1928if (!size) {1929rtw_err(rtwdev, "failed to get probe_req rsvd size\n");1930return;1931}19321933__rtw_fw_update_pkt(rtwdev, RTW_PACKET_PROBE_REQ, size, loc);1934}19351936void rtw_fw_channel_switch(struct rtw_dev *rtwdev, bool enable)1937{1938struct rtw_pno_request *rtw_pno_req = &rtwdev->wow.pno_req;1939u8 h2c_pkt[H2C_PKT_SIZE] = {0};1940u16 total_size = H2C_PKT_HDR_SIZE + H2C_PKT_CH_SWITCH_LEN;1941u8 loc_ch_info;1942const struct rtw_ch_switch_option cs_option = {1943.dest_ch_en = 1,1944.dest_ch = 1,1945.periodic_option = 2,1946.normal_period = 5,1947.normal_period_sel = 0,1948.normal_cycle = 10,1949.slow_period = 1,1950.slow_period_sel = 1,1951};19521953rtw_h2c_pkt_set_header(h2c_pkt, H2C_PKT_CH_SWITCH);1954SET_PKT_H2C_TOTAL_LEN(h2c_pkt, total_size);19551956CH_SWITCH_SET_START(h2c_pkt, enable);1957CH_SWITCH_SET_DEST_CH_EN(h2c_pkt, cs_option.dest_ch_en);1958CH_SWITCH_SET_DEST_CH(h2c_pkt, cs_option.dest_ch);1959CH_SWITCH_SET_NORMAL_PERIOD(h2c_pkt, cs_option.normal_period);1960CH_SWITCH_SET_NORMAL_PERIOD_SEL(h2c_pkt, cs_option.normal_period_sel);1961CH_SWITCH_SET_SLOW_PERIOD(h2c_pkt, cs_option.slow_period);1962CH_SWITCH_SET_SLOW_PERIOD_SEL(h2c_pkt, cs_option.slow_period_sel);1963CH_SWITCH_SET_NORMAL_CYCLE(h2c_pkt, cs_option.normal_cycle);1964CH_SWITCH_SET_PERIODIC_OPT(h2c_pkt, cs_option.periodic_option);19651966CH_SWITCH_SET_CH_NUM(h2c_pkt, rtw_pno_req->channel_cnt);1967CH_SWITCH_SET_INFO_SIZE(h2c_pkt, rtw_pno_req->channel_cnt * 4);19681969loc_ch_info = rtw_get_rsvd_page_location(rtwdev, RSVD_CH_INFO);1970CH_SWITCH_SET_INFO_LOC(h2c_pkt, loc_ch_info);19711972rtw_fw_send_h2c_packet(rtwdev, h2c_pkt);1973}19741975void rtw_fw_adaptivity(struct rtw_dev *rtwdev)1976{1977struct rtw_dm_info *dm_info = &rtwdev->dm_info;1978u8 h2c_pkt[H2C_PKT_SIZE] = {0};19791980if (!rtw_edcca_enabled) {1981dm_info->edcca_mode = RTW_EDCCA_NORMAL;1982rtw_dbg(rtwdev, RTW_DBG_ADAPTIVITY,1983"EDCCA disabled by debugfs\n");1984}19851986SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_ADAPTIVITY);1987SET_ADAPTIVITY_MODE(h2c_pkt, dm_info->edcca_mode);1988SET_ADAPTIVITY_OPTION(h2c_pkt, 1);1989SET_ADAPTIVITY_IGI(h2c_pkt, dm_info->igi_history[0]);1990SET_ADAPTIVITY_L2H(h2c_pkt, dm_info->l2h_th_ini);1991SET_ADAPTIVITY_DENSITY(h2c_pkt, dm_info->scan_density);19921993rtw_fw_send_h2c_command(rtwdev, h2c_pkt);1994}19951996void rtw_fw_scan_notify(struct rtw_dev *rtwdev, bool start)1997{1998u8 h2c_pkt[H2C_PKT_SIZE] = {0};19992000SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_SCAN);2001SET_SCAN_START(h2c_pkt, start);20022003rtw_fw_send_h2c_command(rtwdev, h2c_pkt);2004}20052006static int rtw_append_probe_req_ie(struct rtw_dev *rtwdev, struct sk_buff *skb,2007struct sk_buff_head *list, u8 *bands,2008struct rtw_vif *rtwvif)2009{2010const struct rtw_chip_info *chip = rtwdev->chip;2011struct ieee80211_scan_ies *ies = rtwvif->scan_ies;2012struct sk_buff *new;2013u8 idx;20142015for (idx = NL80211_BAND_2GHZ; idx < NUM_NL80211_BANDS; idx++) {2016if (!(BIT(idx) & chip->band))2017continue;2018new = skb_copy(skb, GFP_KERNEL);2019if (!new)2020return -ENOMEM;2021skb_put_data(new, ies->ies[idx], ies->len[idx]);2022skb_put_data(new, ies->common_ies, ies->common_ie_len);2023skb_queue_tail(list, new);2024(*bands)++;2025}20262027return 0;2028}20292030static int _rtw_hw_scan_update_probe_req(struct rtw_dev *rtwdev, u8 num_probes,2031struct sk_buff_head *probe_req_list)2032{2033const struct rtw_chip_info *chip = rtwdev->chip;2034struct sk_buff *skb, *tmp;2035u16 pg_addr = rtwdev->fifo.rsvd_h2c_info_addr, loc;2036u8 tx_desc_sz = chip->tx_pkt_desc_sz;2037u16 page_size = chip->page_size;2038u8 page_offset = 1, *buf;2039u16 buf_offset = page_size * page_offset;2040unsigned int pkt_len;2041u8 page_cnt, pages;2042int ret;20432044if (rtw_fw_feature_ext_check(&rtwdev->fw, FW_FEATURE_EXT_OLD_PAGE_NUM))2045page_cnt = RTW_OLD_PROBE_PG_CNT;2046else2047page_cnt = RTW_PROBE_PG_CNT;20482049pages = page_offset + num_probes * page_cnt;20502051buf = kzalloc(page_size * pages, GFP_KERNEL);2052if (!buf)2053return -ENOMEM;20542055buf_offset -= tx_desc_sz;2056skb_queue_walk_safe(probe_req_list, skb, tmp) {2057skb_unlink(skb, probe_req_list);2058rtw_fill_rsvd_page_desc(rtwdev, skb, RSVD_PROBE_REQ);2059if (skb->len > page_size * page_cnt) {2060ret = -EINVAL;2061goto out;2062}20632064memcpy(buf + buf_offset, skb->data, skb->len);2065pkt_len = skb->len - tx_desc_sz;2066loc = pg_addr - rtwdev->fifo.rsvd_boundary + page_offset;2067__rtw_fw_update_pkt(rtwdev, RTW_PACKET_PROBE_REQ, pkt_len, loc);20682069buf_offset += page_cnt * page_size;2070page_offset += page_cnt;2071kfree_skb(skb);2072}20732074ret = rtw_fw_write_data_rsvd_page(rtwdev, pg_addr, buf, buf_offset);2075if (ret) {2076rtw_err(rtwdev, "Download probe request to firmware failed\n");2077goto out;2078}20792080rtwdev->scan_info.probe_pg_size = page_offset;2081out:2082kfree(buf);2083skb_queue_walk_safe(probe_req_list, skb, tmp)2084kfree_skb(skb);20852086return ret;2087}20882089static int rtw_hw_scan_update_probe_req(struct rtw_dev *rtwdev,2090struct rtw_vif *rtwvif)2091{2092struct cfg80211_scan_request *req = rtwvif->scan_req;2093struct sk_buff_head list;2094struct sk_buff *skb, *tmp;2095u8 num = req->n_ssids, i, bands = 0;2096int ret;20972098skb_queue_head_init(&list);2099for (i = 0; i < num; i++) {2100skb = ieee80211_probereq_get(rtwdev->hw, rtwvif->mac_addr,2101req->ssids[i].ssid,2102req->ssids[i].ssid_len,2103req->ie_len);2104if (!skb) {2105ret = -ENOMEM;2106goto out;2107}2108ret = rtw_append_probe_req_ie(rtwdev, skb, &list, &bands,2109rtwvif);2110if (ret)2111goto out;21122113kfree_skb(skb);2114}21152116return _rtw_hw_scan_update_probe_req(rtwdev, num * bands, &list);21172118out:2119skb_queue_walk_safe(&list, skb, tmp)2120kfree_skb(skb);21212122return ret;2123}21242125static int rtw_add_chan_info(struct rtw_dev *rtwdev, struct rtw_chan_info *info,2126struct rtw_chan_list *list, u8 *buf)2127{2128u8 *chan = &buf[list->size];2129u8 info_size = RTW_CH_INFO_SIZE;21302131if (list->size > list->buf_size)2132return -ENOMEM;21332134CH_INFO_SET_CH(chan, info->channel);2135CH_INFO_SET_PRI_CH_IDX(chan, info->pri_ch_idx);2136CH_INFO_SET_BW(chan, info->bw);2137CH_INFO_SET_TIMEOUT(chan, info->timeout);2138CH_INFO_SET_ACTION_ID(chan, info->action_id);2139CH_INFO_SET_EXTRA_INFO(chan, info->extra_info);2140if (info->extra_info) {2141EXTRA_CH_INFO_SET_ID(chan, RTW_SCAN_EXTRA_ID_DFS);2142EXTRA_CH_INFO_SET_INFO(chan, RTW_SCAN_EXTRA_ACTION_SCAN);2143EXTRA_CH_INFO_SET_SIZE(chan, RTW_EX_CH_INFO_SIZE -2144RTW_EX_CH_INFO_HDR_SIZE);2145EXTRA_CH_INFO_SET_DFS_EXT_TIME(chan, RTW_DFS_CHAN_TIME);2146info_size += RTW_EX_CH_INFO_SIZE;2147}2148list->size += info_size;2149list->ch_num++;21502151return 0;2152}21532154static int rtw_add_chan_list(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif,2155struct rtw_chan_list *list, u8 *buf)2156{2157struct cfg80211_scan_request *req = rtwvif->scan_req;2158struct rtw_fifo_conf *fifo = &rtwdev->fifo;2159struct ieee80211_channel *channel;2160int i, ret = 0;21612162for (i = 0; i < req->n_channels; i++) {2163struct rtw_chan_info ch_info = {0};21642165channel = req->channels[i];2166ch_info.channel = channel->hw_value;2167ch_info.bw = RTW_SCAN_WIDTH;2168ch_info.pri_ch_idx = RTW_PRI_CH_IDX;2169ch_info.timeout = req->duration_mandatory ?2170req->duration : RTW_CHANNEL_TIME;21712172if (channel->flags & (IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR)) {2173ch_info.action_id = RTW_CHANNEL_RADAR;2174ch_info.extra_info = 1;2175/* Overwrite duration for passive scans if necessary */2176ch_info.timeout = ch_info.timeout > RTW_PASS_CHAN_TIME ?2177ch_info.timeout : RTW_PASS_CHAN_TIME;2178} else {2179ch_info.action_id = RTW_CHANNEL_ACTIVE;2180}21812182ret = rtw_add_chan_info(rtwdev, &ch_info, list, buf);2183if (ret)2184return ret;2185}21862187if (list->size > fifo->rsvd_pg_num << TX_PAGE_SIZE_SHIFT) {2188rtw_err(rtwdev, "List exceeds rsvd page total size\n");2189return -EINVAL;2190}21912192list->addr = fifo->rsvd_h2c_info_addr + rtwdev->scan_info.probe_pg_size;2193ret = rtw_fw_write_data_rsvd_page(rtwdev, list->addr, buf, list->size);2194if (ret)2195rtw_err(rtwdev, "Download channel list failed\n");21962197return ret;2198}21992200static void rtw_fw_set_scan_offload(struct rtw_dev *rtwdev,2201struct rtw_ch_switch_option *opt,2202struct rtw_vif *rtwvif,2203struct rtw_chan_list *list)2204{2205struct rtw_hw_scan_info *scan_info = &rtwdev->scan_info;2206struct cfg80211_scan_request *req = rtwvif->scan_req;2207struct rtw_fifo_conf *fifo = &rtwdev->fifo;2208/* reserve one dummy page at the beginning for tx descriptor */2209u8 pkt_loc = fifo->rsvd_h2c_info_addr - fifo->rsvd_boundary + 1;2210bool random_seq = req->flags & NL80211_SCAN_FLAG_RANDOM_SN;2211u8 h2c_pkt[H2C_PKT_SIZE] = {0};22122213rtw_h2c_pkt_set_header(h2c_pkt, H2C_PKT_SCAN_OFFLOAD);2214SET_PKT_H2C_TOTAL_LEN(h2c_pkt, H2C_PKT_CH_SWITCH_LEN);22152216SCAN_OFFLOAD_SET_START(h2c_pkt, opt->switch_en);2217SCAN_OFFLOAD_SET_BACK_OP_EN(h2c_pkt, opt->back_op_en);2218SCAN_OFFLOAD_SET_RANDOM_SEQ_EN(h2c_pkt, random_seq);2219SCAN_OFFLOAD_SET_NO_CCK_EN(h2c_pkt, req->no_cck);2220SCAN_OFFLOAD_SET_CH_NUM(h2c_pkt, list->ch_num);2221SCAN_OFFLOAD_SET_CH_INFO_SIZE(h2c_pkt, list->size);2222SCAN_OFFLOAD_SET_CH_INFO_LOC(h2c_pkt, list->addr - fifo->rsvd_boundary);2223SCAN_OFFLOAD_SET_OP_CH(h2c_pkt, scan_info->op_chan);2224SCAN_OFFLOAD_SET_OP_PRI_CH_IDX(h2c_pkt, scan_info->op_pri_ch_idx);2225SCAN_OFFLOAD_SET_OP_BW(h2c_pkt, scan_info->op_bw);2226SCAN_OFFLOAD_SET_OP_PORT_ID(h2c_pkt, rtwvif->port);2227SCAN_OFFLOAD_SET_OP_DWELL_TIME(h2c_pkt, req->duration_mandatory ?2228req->duration : RTW_CHANNEL_TIME);2229SCAN_OFFLOAD_SET_OP_GAP_TIME(h2c_pkt, RTW_OFF_CHAN_TIME);2230SCAN_OFFLOAD_SET_SSID_NUM(h2c_pkt, req->n_ssids);2231SCAN_OFFLOAD_SET_PKT_LOC(h2c_pkt, pkt_loc);22322233rtw_fw_send_h2c_packet(rtwdev, h2c_pkt);2234}22352236void rtw_hw_scan_start(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,2237struct ieee80211_scan_request *scan_req)2238{2239struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;2240struct cfg80211_scan_request *req = &scan_req->req;2241u8 mac_addr[ETH_ALEN];22422243rtwdev->scan_info.scanning_vif = vif;2244rtwvif->scan_ies = &scan_req->ies;2245rtwvif->scan_req = req;22462247ieee80211_stop_queues(rtwdev->hw);2248rtw_leave_lps_deep(rtwdev);2249rtw_hci_flush_all_queues(rtwdev, false);2250rtw_mac_flush_all_queues(rtwdev, false);2251if (req->flags & NL80211_SCAN_FLAG_RANDOM_ADDR)2252get_random_mask_addr(mac_addr, req->mac_addr,2253req->mac_addr_mask);2254else2255ether_addr_copy(mac_addr, vif->addr);22562257rtw_core_scan_start(rtwdev, rtwvif, mac_addr, true);22582259rtwdev->hal.rcr &= ~BIT_CBSSID_BCN;2260rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr);2261}22622263void rtw_hw_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,2264bool aborted)2265{2266struct cfg80211_scan_info info = {2267.aborted = aborted,2268};2269struct rtw_hw_scan_info *scan_info = &rtwdev->scan_info;2270struct rtw_hal *hal = &rtwdev->hal;2271struct rtw_vif *rtwvif;2272u8 chan = scan_info->op_chan;22732274if (!vif)2275return;22762277rtwdev->hal.rcr |= BIT_CBSSID_BCN;2278rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr);22792280rtw_core_scan_complete(rtwdev, vif, true);22812282rtwvif = (struct rtw_vif *)vif->drv_priv;2283if (chan)2284rtw_store_op_chan(rtwdev, false);2285rtw_phy_set_tx_power_level(rtwdev, hal->current_channel);2286ieee80211_wake_queues(rtwdev->hw);2287ieee80211_scan_completed(rtwdev->hw, &info);22882289rtwvif->scan_req = NULL;2290rtwvif->scan_ies = NULL;2291rtwdev->scan_info.scanning_vif = NULL;2292}22932294static int rtw_hw_scan_prehandle(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif,2295struct rtw_chan_list *list)2296{2297struct cfg80211_scan_request *req = rtwvif->scan_req;2298int size = req->n_channels * (RTW_CH_INFO_SIZE + RTW_EX_CH_INFO_SIZE);2299u8 *buf;2300int ret;23012302buf = kmalloc(size, GFP_KERNEL);2303if (!buf)2304return -ENOMEM;23052306ret = rtw_hw_scan_update_probe_req(rtwdev, rtwvif);2307if (ret) {2308rtw_err(rtwdev, "Update probe request failed\n");2309goto out;2310}23112312list->buf_size = size;2313list->size = 0;2314list->ch_num = 0;2315ret = rtw_add_chan_list(rtwdev, rtwvif, list, buf);2316out:2317kfree(buf);23182319return ret;2320}23212322int rtw_hw_scan_offload(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,2323bool enable)2324{2325struct rtw_vif *rtwvif = vif ? (struct rtw_vif *)vif->drv_priv : NULL;2326struct rtw_hw_scan_info *scan_info = &rtwdev->scan_info;2327struct rtw_ch_switch_option cs_option = {0};2328struct rtw_chan_list chan_list = {0};2329int ret = 0;23302331if (!rtwvif)2332return -EINVAL;23332334cs_option.switch_en = enable;2335cs_option.back_op_en = scan_info->op_chan != 0;2336if (enable) {2337ret = rtw_hw_scan_prehandle(rtwdev, rtwvif, &chan_list);2338if (ret)2339goto out;2340}2341rtw_fw_set_scan_offload(rtwdev, &cs_option, rtwvif, &chan_list);2342out:2343if (rtwdev->ap_active) {2344ret = rtw_download_beacon(rtwdev);2345if (ret)2346rtw_err(rtwdev, "HW scan download beacon failed\n");2347}23482349return ret;2350}23512352void rtw_hw_scan_abort(struct rtw_dev *rtwdev)2353{2354struct ieee80211_vif *vif = rtwdev->scan_info.scanning_vif;23552356if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_SCAN_OFFLOAD))2357return;23582359rtw_hw_scan_offload(rtwdev, vif, false);2360rtw_hw_scan_complete(rtwdev, vif, true);2361}23622363void rtw_hw_scan_status_report(struct rtw_dev *rtwdev, struct sk_buff *skb)2364{2365struct ieee80211_vif *vif = rtwdev->scan_info.scanning_vif;2366struct rtw_c2h_cmd *c2h;2367bool aborted;2368u8 rc;23692370if (!test_bit(RTW_FLAG_SCANNING, rtwdev->flags))2371return;23722373c2h = get_c2h_from_skb(skb);2374rc = GET_SCAN_REPORT_RETURN_CODE(c2h->payload);2375aborted = rc != RTW_SCAN_REPORT_SUCCESS;2376rtw_hw_scan_complete(rtwdev, vif, aborted);23772378if (aborted)2379rtw_dbg(rtwdev, RTW_DBG_HW_SCAN, "HW scan aborted with code: %d\n", rc);2380}23812382void rtw_store_op_chan(struct rtw_dev *rtwdev, bool backup)2383{2384struct rtw_hw_scan_info *scan_info = &rtwdev->scan_info;2385struct rtw_hal *hal = &rtwdev->hal;2386u8 band;23872388if (backup) {2389scan_info->op_chan = hal->current_channel;2390scan_info->op_bw = hal->current_band_width;2391scan_info->op_pri_ch_idx = hal->current_primary_channel_index;2392scan_info->op_pri_ch = hal->primary_channel;2393} else {2394band = scan_info->op_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G;2395rtw_update_channel(rtwdev, scan_info->op_chan,2396scan_info->op_pri_ch,2397band, scan_info->op_bw);2398}2399}24002401void rtw_clear_op_chan(struct rtw_dev *rtwdev)2402{2403struct rtw_hw_scan_info *scan_info = &rtwdev->scan_info;24042405scan_info->op_chan = 0;2406scan_info->op_bw = 0;2407scan_info->op_pri_ch_idx = 0;2408scan_info->op_pri_ch = 0;2409}24102411static bool rtw_is_op_chan(struct rtw_dev *rtwdev, u8 channel)2412{2413struct rtw_hw_scan_info *scan_info = &rtwdev->scan_info;24142415return channel == scan_info->op_chan;2416}24172418void rtw_hw_scan_chan_switch(struct rtw_dev *rtwdev, struct sk_buff *skb)2419{2420struct rtw_hal *hal = &rtwdev->hal;2421struct rtw_c2h_cmd *c2h;2422enum rtw_scan_notify_id id;2423u8 chan, band, status;24242425if (!test_bit(RTW_FLAG_SCANNING, rtwdev->flags))2426return;24272428c2h = get_c2h_from_skb(skb);2429chan = GET_CHAN_SWITCH_CENTRAL_CH(c2h->payload);2430id = GET_CHAN_SWITCH_ID(c2h->payload);2431status = GET_CHAN_SWITCH_STATUS(c2h->payload);24322433if (id == RTW_SCAN_NOTIFY_ID_POSTSWITCH) {2434band = chan > 14 ? RTW_BAND_5G : RTW_BAND_2G;2435rtw_update_channel(rtwdev, chan, chan, band,2436RTW_CHANNEL_WIDTH_20);2437if (rtw_is_op_chan(rtwdev, chan)) {2438rtw_store_op_chan(rtwdev, false);2439ieee80211_wake_queues(rtwdev->hw);2440rtw_core_enable_beacon(rtwdev, true);2441}2442} else if (id == RTW_SCAN_NOTIFY_ID_PRESWITCH) {2443if (IS_CH_5G_BAND(chan)) {2444rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_5G);2445} else if (IS_CH_2G_BAND(chan)) {2446u8 chan_type;24472448if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))2449chan_type = COEX_SWITCH_TO_24G;2450else2451chan_type = COEX_SWITCH_TO_24G_NOFORSCAN;2452rtw_coex_switchband_notify(rtwdev, chan_type);2453}2454/* The channel of C2H RTW_SCAN_NOTIFY_ID_PRESWITCH is next2455* channel that hardware will switch. We need to stop queue2456* if next channel is non-op channel.2457*/2458if (!rtw_is_op_chan(rtwdev, chan) &&2459rtw_is_op_chan(rtwdev, hal->current_channel)) {2460rtw_core_enable_beacon(rtwdev, false);2461ieee80211_stop_queues(rtwdev->hw);2462}2463}24642465rtw_dbg(rtwdev, RTW_DBG_HW_SCAN,2466"Chan switch: %x, id: %x, status: %x\n", chan, id, status);2467}246824692470