Path: blob/master/drivers/net/wireless/realtek/rtw88/main.c
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// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause1/* Copyright(c) 2018-2019 Realtek Corporation2*/34#include <linux/devcoredump.h>56#include "main.h"7#include "regd.h"8#include "fw.h"9#include "ps.h"10#include "sec.h"11#include "mac.h"12#include "coex.h"13#include "phy.h"14#include "reg.h"15#include "efuse.h"16#include "tx.h"17#include "debug.h"18#include "bf.h"19#include "sar.h"20#include "sdio.h"21#include "led.h"2223bool rtw_disable_lps_deep_mode;24EXPORT_SYMBOL(rtw_disable_lps_deep_mode);25bool rtw_bf_support = true;26unsigned int rtw_debug_mask;27EXPORT_SYMBOL(rtw_debug_mask);28/* EDCCA is enabled during normal behavior. For debugging purpose in29* a noisy environment, it can be disabled via edcca debugfs. Because30* all rtw88 devices will probably be affected if environment is noisy,31* rtw_edcca_enabled is just declared by driver instead of by device.32* So, turning it off will take effect for all rtw88 devices before33* there is a tough reason to maintain rtw_edcca_enabled by device.34*/35bool rtw_edcca_enabled = true;3637module_param_named(disable_lps_deep, rtw_disable_lps_deep_mode, bool, 0644);38module_param_named(support_bf, rtw_bf_support, bool, 0644);39module_param_named(debug_mask, rtw_debug_mask, uint, 0644);4041MODULE_PARM_DESC(disable_lps_deep, "Set Y to disable Deep PS");42MODULE_PARM_DESC(support_bf, "Set Y to enable beamformee support");43MODULE_PARM_DESC(debug_mask, "Debugging mask");4445static struct ieee80211_channel rtw_channeltable_2g[] = {46{.center_freq = 2412, .hw_value = 1,},47{.center_freq = 2417, .hw_value = 2,},48{.center_freq = 2422, .hw_value = 3,},49{.center_freq = 2427, .hw_value = 4,},50{.center_freq = 2432, .hw_value = 5,},51{.center_freq = 2437, .hw_value = 6,},52{.center_freq = 2442, .hw_value = 7,},53{.center_freq = 2447, .hw_value = 8,},54{.center_freq = 2452, .hw_value = 9,},55{.center_freq = 2457, .hw_value = 10,},56{.center_freq = 2462, .hw_value = 11,},57{.center_freq = 2467, .hw_value = 12,},58{.center_freq = 2472, .hw_value = 13,},59{.center_freq = 2484, .hw_value = 14,},60};6162static struct ieee80211_channel rtw_channeltable_5g[] = {63{.center_freq = 5180, .hw_value = 36,},64{.center_freq = 5200, .hw_value = 40,},65{.center_freq = 5220, .hw_value = 44,},66{.center_freq = 5240, .hw_value = 48,},67{.center_freq = 5260, .hw_value = 52,},68{.center_freq = 5280, .hw_value = 56,},69{.center_freq = 5300, .hw_value = 60,},70{.center_freq = 5320, .hw_value = 64,},71{.center_freq = 5500, .hw_value = 100,},72{.center_freq = 5520, .hw_value = 104,},73{.center_freq = 5540, .hw_value = 108,},74{.center_freq = 5560, .hw_value = 112,},75{.center_freq = 5580, .hw_value = 116,},76{.center_freq = 5600, .hw_value = 120,},77{.center_freq = 5620, .hw_value = 124,},78{.center_freq = 5640, .hw_value = 128,},79{.center_freq = 5660, .hw_value = 132,},80{.center_freq = 5680, .hw_value = 136,},81{.center_freq = 5700, .hw_value = 140,},82{.center_freq = 5720, .hw_value = 144,},83{.center_freq = 5745, .hw_value = 149,},84{.center_freq = 5765, .hw_value = 153,},85{.center_freq = 5785, .hw_value = 157,},86{.center_freq = 5805, .hw_value = 161,},87{.center_freq = 5825, .hw_value = 165,88.flags = IEEE80211_CHAN_NO_HT40MINUS},89};9091static struct ieee80211_rate rtw_ratetable[] = {92{.bitrate = 10, .hw_value = 0x00,},93{.bitrate = 20, .hw_value = 0x01,},94{.bitrate = 55, .hw_value = 0x02,},95{.bitrate = 110, .hw_value = 0x03,},96{.bitrate = 60, .hw_value = 0x04,},97{.bitrate = 90, .hw_value = 0x05,},98{.bitrate = 120, .hw_value = 0x06,},99{.bitrate = 180, .hw_value = 0x07,},100{.bitrate = 240, .hw_value = 0x08,},101{.bitrate = 360, .hw_value = 0x09,},102{.bitrate = 480, .hw_value = 0x0a,},103{.bitrate = 540, .hw_value = 0x0b,},104};105106static const struct ieee80211_iface_limit rtw_iface_limits[] = {107{108.max = 1,109.types = BIT(NL80211_IFTYPE_STATION),110},111{112.max = 1,113.types = BIT(NL80211_IFTYPE_AP),114}115};116117static const struct ieee80211_iface_combination rtw_iface_combs[] = {118{119.limits = rtw_iface_limits,120.n_limits = ARRAY_SIZE(rtw_iface_limits),121.max_interfaces = 2,122.num_different_channels = 1,123}124};125126u16 rtw_desc_to_bitrate(u8 desc_rate)127{128struct ieee80211_rate rate;129130if (WARN(desc_rate >= ARRAY_SIZE(rtw_ratetable), "invalid desc rate\n"))131return 0;132133rate = rtw_ratetable[desc_rate];134135return rate.bitrate;136}137138static const struct ieee80211_supported_band rtw_band_2ghz = {139.band = NL80211_BAND_2GHZ,140141.channels = rtw_channeltable_2g,142.n_channels = ARRAY_SIZE(rtw_channeltable_2g),143144.bitrates = rtw_ratetable,145.n_bitrates = ARRAY_SIZE(rtw_ratetable),146147.ht_cap = {0},148.vht_cap = {0},149};150151static const struct ieee80211_supported_band rtw_band_5ghz = {152.band = NL80211_BAND_5GHZ,153154.channels = rtw_channeltable_5g,155.n_channels = ARRAY_SIZE(rtw_channeltable_5g),156157/* 5G has no CCK rates */158.bitrates = rtw_ratetable + 4,159.n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4,160161.ht_cap = {0},162.vht_cap = {0},163};164165struct rtw_watch_dog_iter_data {166struct rtw_dev *rtwdev;167struct rtw_vif *rtwvif;168};169170static void rtw_dynamic_csi_rate(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif)171{172struct rtw_bf_info *bf_info = &rtwdev->bf_info;173u8 fix_rate_enable = 0;174u8 new_csi_rate_idx;175176if (rtwvif->bfee.role != RTW_BFEE_SU &&177rtwvif->bfee.role != RTW_BFEE_MU)178return;179180rtw_chip_cfg_csi_rate(rtwdev, rtwdev->dm_info.min_rssi,181bf_info->cur_csi_rpt_rate,182fix_rate_enable, &new_csi_rate_idx);183184if (new_csi_rate_idx != bf_info->cur_csi_rpt_rate)185bf_info->cur_csi_rpt_rate = new_csi_rate_idx;186}187188static void rtw_vif_watch_dog_iter(void *data, struct ieee80211_vif *vif)189{190struct rtw_watch_dog_iter_data *iter_data = data;191struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;192193if (vif->type == NL80211_IFTYPE_STATION)194if (vif->cfg.assoc)195iter_data->rtwvif = rtwvif;196197rtw_dynamic_csi_rate(iter_data->rtwdev, rtwvif);198199rtwvif->stats.tx_unicast = 0;200rtwvif->stats.rx_unicast = 0;201rtwvif->stats.tx_cnt = 0;202rtwvif->stats.rx_cnt = 0;203}204205static void rtw_sw_beacon_loss_check(struct rtw_dev *rtwdev,206struct rtw_vif *rtwvif, int received_beacons)207{208int watchdog_delay = 2000000 / 1024; /* TU */209int beacon_int, expected_beacons;210211if (rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_BCN_FILTER) || !rtwvif)212return;213214beacon_int = rtwvif_to_vif(rtwvif)->bss_conf.beacon_int;215expected_beacons = DIV_ROUND_UP(watchdog_delay, beacon_int);216217rtwdev->beacon_loss = received_beacons < expected_beacons / 2;218}219220/* process TX/RX statistics periodically for hardware,221* the information helps hardware to enhance performance222*/223static void rtw_watch_dog_work(struct work_struct *work)224{225struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,226watch_dog_work.work);227struct rtw_traffic_stats *stats = &rtwdev->stats;228struct rtw_watch_dog_iter_data data = {};229bool busy_traffic = test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);230int received_beacons = rtwdev->dm_info.cur_pkt_count.num_bcn_pkt;231u32 tx_unicast_mbps, rx_unicast_mbps;232bool ps_active;233234mutex_lock(&rtwdev->mutex);235236if (!test_bit(RTW_FLAG_RUNNING, rtwdev->flags))237goto unlock;238239ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,240RTW_WATCH_DOG_DELAY_TIME);241242if (rtwdev->stats.tx_cnt > 100 || rtwdev->stats.rx_cnt > 100)243set_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);244else245clear_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);246247if (busy_traffic != test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags))248rtw_coex_wl_status_change_notify(rtwdev, 0);249250if (stats->tx_cnt > RTW_LPS_THRESHOLD ||251stats->rx_cnt > RTW_LPS_THRESHOLD)252ps_active = true;253else254ps_active = false;255256tx_unicast_mbps = stats->tx_unicast >> RTW_TP_SHIFT;257rx_unicast_mbps = stats->rx_unicast >> RTW_TP_SHIFT;258259ewma_tp_add(&stats->tx_ewma_tp, tx_unicast_mbps);260ewma_tp_add(&stats->rx_ewma_tp, rx_unicast_mbps);261stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp);262stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp);263264/* reset tx/rx statictics */265stats->tx_unicast = 0;266stats->rx_unicast = 0;267stats->tx_cnt = 0;268stats->rx_cnt = 0;269270if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))271goto unlock;272273/* make sure BB/RF is working for dynamic mech */274rtw_leave_lps(rtwdev);275rtw_coex_wl_status_check(rtwdev);276rtw_coex_query_bt_hid_list(rtwdev);277rtw_coex_active_query_bt_info(rtwdev);278279rtw_phy_dynamic_mechanism(rtwdev);280281rtw_hci_dynamic_rx_agg(rtwdev,282tx_unicast_mbps >= 1 || rx_unicast_mbps >= 1);283284data.rtwdev = rtwdev;285/* rtw_iterate_vifs internally uses an atomic iterator which is needed286* to avoid taking local->iflist_mtx mutex287*/288rtw_iterate_vifs(rtwdev, rtw_vif_watch_dog_iter, &data);289290rtw_sw_beacon_loss_check(rtwdev, data.rtwvif, received_beacons);291292/* fw supports only one station associated to enter lps, if there are293* more than two stations associated to the AP, then we can not enter294* lps, because fw does not handle the overlapped beacon interval295*296* rtw_recalc_lps() iterate vifs and determine if driver can enter297* ps by vif->type and vif->cfg.ps, all we need to do here is to298* get that vif and check if device is having traffic more than the299* threshold.300*/301if (rtwdev->ps_enabled && data.rtwvif && !ps_active &&302!rtwdev->beacon_loss && !rtwdev->ap_active)303rtw_enter_lps(rtwdev, data.rtwvif->port);304305rtwdev->watch_dog_cnt++;306307unlock:308mutex_unlock(&rtwdev->mutex);309}310311static void rtw_c2h_work(struct work_struct *work)312{313struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, c2h_work);314struct sk_buff *skb, *tmp;315316skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) {317skb_unlink(skb, &rtwdev->c2h_queue);318rtw_fw_c2h_cmd_handle(rtwdev, skb);319dev_kfree_skb_any(skb);320}321}322323static void rtw_ips_work(struct work_struct *work)324{325struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ips_work);326327mutex_lock(&rtwdev->mutex);328if (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)329rtw_enter_ips(rtwdev);330mutex_unlock(&rtwdev->mutex);331}332333static void rtw_sta_rc_work(struct work_struct *work)334{335struct rtw_sta_info *si = container_of(work, struct rtw_sta_info,336rc_work);337struct rtw_dev *rtwdev = si->rtwdev;338339mutex_lock(&rtwdev->mutex);340rtw_update_sta_info(rtwdev, si, true);341mutex_unlock(&rtwdev->mutex);342}343344int rtw_sta_add(struct rtw_dev *rtwdev, struct ieee80211_sta *sta,345struct ieee80211_vif *vif)346{347struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;348struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;349int i;350351if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {352si->mac_id = rtwvif->mac_id;353} else {354si->mac_id = rtw_acquire_macid(rtwdev);355if (si->mac_id >= RTW_MAX_MAC_ID_NUM)356return -ENOSPC;357}358359si->rtwdev = rtwdev;360si->sta = sta;361si->vif = vif;362si->init_ra_lv = 1;363ewma_rssi_init(&si->avg_rssi);364for (i = 0; i < ARRAY_SIZE(sta->txq); i++)365rtw_txq_init(rtwdev, sta->txq[i]);366INIT_WORK(&si->rc_work, rtw_sta_rc_work);367368rtw_update_sta_info(rtwdev, si, true);369rtw_fw_media_status_report(rtwdev, si->mac_id, true);370371rtwdev->sta_cnt++;372rtwdev->beacon_loss = false;373rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM joined with macid %d\n",374sta->addr, si->mac_id);375376return 0;377}378379void rtw_sta_remove(struct rtw_dev *rtwdev, struct ieee80211_sta *sta,380bool fw_exist)381{382struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;383struct ieee80211_vif *vif = si->vif;384int i;385386cancel_work_sync(&si->rc_work);387388if (vif->type != NL80211_IFTYPE_STATION || sta->tdls)389rtw_release_macid(rtwdev, si->mac_id);390if (fw_exist)391rtw_fw_media_status_report(rtwdev, si->mac_id, false);392393for (i = 0; i < ARRAY_SIZE(sta->txq); i++)394rtw_txq_cleanup(rtwdev, sta->txq[i]);395396kfree(si->mask);397398rtwdev->sta_cnt--;399rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM with macid %d left\n",400sta->addr, si->mac_id);401}402403struct rtw_fwcd_hdr {404u32 item;405u32 size;406u32 padding1;407u32 padding2;408} __packed;409410static int rtw_fwcd_prep(struct rtw_dev *rtwdev)411{412const struct rtw_chip_info *chip = rtwdev->chip;413struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;414const struct rtw_fwcd_segs *segs = chip->fwcd_segs;415u32 prep_size = chip->fw_rxff_size + sizeof(struct rtw_fwcd_hdr);416u8 i;417418if (segs) {419prep_size += segs->num * sizeof(struct rtw_fwcd_hdr);420421for (i = 0; i < segs->num; i++)422prep_size += segs->segs[i];423}424425desc->data = vmalloc(prep_size);426if (!desc->data)427return -ENOMEM;428429desc->size = prep_size;430desc->next = desc->data;431432return 0;433}434435static u8 *rtw_fwcd_next(struct rtw_dev *rtwdev, u32 item, u32 size)436{437struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;438struct rtw_fwcd_hdr *hdr;439u8 *next;440441if (!desc->data) {442rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared successfully\n");443return NULL;444}445446next = desc->next + sizeof(struct rtw_fwcd_hdr);447if (next - desc->data + size > desc->size) {448rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared enough\n");449return NULL;450}451452hdr = (struct rtw_fwcd_hdr *)(desc->next);453hdr->item = item;454hdr->size = size;455hdr->padding1 = 0x01234567;456hdr->padding2 = 0x89abcdef;457desc->next = next + size;458459return next;460}461462static void rtw_fwcd_dump(struct rtw_dev *rtwdev)463{464struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;465466rtw_dbg(rtwdev, RTW_DBG_FW, "dump fwcd\n");467468/* Data will be freed after lifetime of device coredump. After calling469* dev_coredump, data is supposed to be handled by the device coredump470* framework. Note that a new dump will be discarded if a previous one471* hasn't been released yet.472*/473dev_coredumpv(rtwdev->dev, desc->data, desc->size, GFP_KERNEL);474}475476static void rtw_fwcd_free(struct rtw_dev *rtwdev, bool free_self)477{478struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;479480if (free_self) {481rtw_dbg(rtwdev, RTW_DBG_FW, "free fwcd by self\n");482vfree(desc->data);483}484485desc->data = NULL;486desc->next = NULL;487}488489static int rtw_fw_dump_crash_log(struct rtw_dev *rtwdev)490{491u32 size = rtwdev->chip->fw_rxff_size;492u32 *buf;493u8 seq;494495buf = (u32 *)rtw_fwcd_next(rtwdev, RTW_FWCD_TLV, size);496if (!buf)497return -ENOMEM;498499if (rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0, size, buf)) {500rtw_dbg(rtwdev, RTW_DBG_FW, "dump fw fifo fail\n");501return -EINVAL;502}503504if (GET_FW_DUMP_LEN(buf) == 0) {505rtw_dbg(rtwdev, RTW_DBG_FW, "fw crash dump's length is 0\n");506return -EINVAL;507}508509seq = GET_FW_DUMP_SEQ(buf);510if (seq > 0) {511rtw_dbg(rtwdev, RTW_DBG_FW,512"fw crash dump's seq is wrong: %d\n", seq);513return -EINVAL;514}515516return 0;517}518519int rtw_dump_fw(struct rtw_dev *rtwdev, const u32 ocp_src, u32 size,520u32 fwcd_item)521{522u32 rxff = rtwdev->chip->fw_rxff_size;523u32 dump_size, done_size = 0;524u8 *buf;525int ret;526527buf = rtw_fwcd_next(rtwdev, fwcd_item, size);528if (!buf)529return -ENOMEM;530531while (size) {532dump_size = size > rxff ? rxff : size;533534ret = rtw_ddma_to_fw_fifo(rtwdev, ocp_src + done_size,535dump_size);536if (ret) {537rtw_err(rtwdev,538"ddma fw 0x%x [+0x%x] to fw fifo fail\n",539ocp_src, done_size);540return ret;541}542543ret = rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0,544dump_size, (u32 *)(buf + done_size));545if (ret) {546rtw_err(rtwdev,547"dump fw 0x%x [+0x%x] from fw fifo fail\n",548ocp_src, done_size);549return ret;550}551552size -= dump_size;553done_size += dump_size;554}555556return 0;557}558EXPORT_SYMBOL(rtw_dump_fw);559560int rtw_dump_reg(struct rtw_dev *rtwdev, const u32 addr, const u32 size)561{562u8 *buf;563u32 i;564565if (addr & 0x3) {566WARN(1, "should be 4-byte aligned, addr = 0x%08x\n", addr);567return -EINVAL;568}569570buf = rtw_fwcd_next(rtwdev, RTW_FWCD_REG, size);571if (!buf)572return -ENOMEM;573574for (i = 0; i < size; i += 4)575*(u32 *)(buf + i) = rtw_read32(rtwdev, addr + i);576577return 0;578}579EXPORT_SYMBOL(rtw_dump_reg);580581void rtw_vif_assoc_changed(struct rtw_vif *rtwvif,582struct ieee80211_bss_conf *conf)583{584struct ieee80211_vif *vif = NULL;585586if (conf)587vif = container_of(conf, struct ieee80211_vif, bss_conf);588589if (conf && vif->cfg.assoc) {590rtwvif->aid = vif->cfg.aid;591rtwvif->net_type = RTW_NET_MGD_LINKED;592} else {593rtwvif->aid = 0;594rtwvif->net_type = RTW_NET_NO_LINK;595}596}597598static void rtw_reset_key_iter(struct ieee80211_hw *hw,599struct ieee80211_vif *vif,600struct ieee80211_sta *sta,601struct ieee80211_key_conf *key,602void *data)603{604struct rtw_dev *rtwdev = (struct rtw_dev *)data;605struct rtw_sec_desc *sec = &rtwdev->sec;606607rtw_sec_clear_cam(rtwdev, sec, key->hw_key_idx);608}609610static void rtw_reset_sta_iter(void *data, struct ieee80211_sta *sta)611{612struct rtw_dev *rtwdev = (struct rtw_dev *)data;613614if (rtwdev->sta_cnt == 0) {615rtw_warn(rtwdev, "sta count before reset should not be 0\n");616return;617}618rtw_sta_remove(rtwdev, sta, false);619}620621static void rtw_reset_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)622{623struct rtw_dev *rtwdev = (struct rtw_dev *)data;624struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;625626rtw_bf_disassoc(rtwdev, vif, NULL);627rtw_vif_assoc_changed(rtwvif, NULL);628rtw_txq_cleanup(rtwdev, vif->txq);629630rtw_release_macid(rtwdev, rtwvif->mac_id);631}632633void rtw_fw_recovery(struct rtw_dev *rtwdev)634{635if (!test_bit(RTW_FLAG_RESTARTING, rtwdev->flags))636ieee80211_queue_work(rtwdev->hw, &rtwdev->fw_recovery_work);637}638EXPORT_SYMBOL(rtw_fw_recovery);639640static void __fw_recovery_work(struct rtw_dev *rtwdev)641{642int ret = 0;643644set_bit(RTW_FLAG_RESTARTING, rtwdev->flags);645clear_bit(RTW_FLAG_RESTART_TRIGGERING, rtwdev->flags);646647ret = rtw_fwcd_prep(rtwdev);648if (ret)649goto free;650ret = rtw_fw_dump_crash_log(rtwdev);651if (ret)652goto free;653ret = rtw_chip_dump_fw_crash(rtwdev);654if (ret)655goto free;656657rtw_fwcd_dump(rtwdev);658free:659rtw_fwcd_free(rtwdev, !!ret);660rtw_write8(rtwdev, REG_MCU_TST_CFG, 0);661662WARN(1, "firmware crash, start reset and recover\n");663664rcu_read_lock();665rtw_iterate_keys_rcu(rtwdev, NULL, rtw_reset_key_iter, rtwdev);666rcu_read_unlock();667rtw_iterate_stas_atomic(rtwdev, rtw_reset_sta_iter, rtwdev);668rtw_iterate_vifs_atomic(rtwdev, rtw_reset_vif_iter, rtwdev);669bitmap_zero(rtwdev->hw_port, RTW_PORT_NUM);670rtw_enter_ips(rtwdev);671}672673static void rtw_fw_recovery_work(struct work_struct *work)674{675struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,676fw_recovery_work);677678mutex_lock(&rtwdev->mutex);679__fw_recovery_work(rtwdev);680mutex_unlock(&rtwdev->mutex);681682ieee80211_restart_hw(rtwdev->hw);683}684685struct rtw_txq_ba_iter_data {686};687688static void rtw_txq_ba_iter(void *data, struct ieee80211_sta *sta)689{690struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;691int ret;692u8 tid;693694tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS);695while (tid != IEEE80211_NUM_TIDS) {696clear_bit(tid, si->tid_ba);697ret = ieee80211_start_tx_ba_session(sta, tid, 0);698if (ret == -EINVAL) {699struct ieee80211_txq *txq;700struct rtw_txq *rtwtxq;701702txq = sta->txq[tid];703rtwtxq = (struct rtw_txq *)txq->drv_priv;704set_bit(RTW_TXQ_BLOCK_BA, &rtwtxq->flags);705}706707tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS);708}709}710711static void rtw_txq_ba_work(struct work_struct *work)712{713struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ba_work);714struct rtw_txq_ba_iter_data data;715716rtw_iterate_stas_atomic(rtwdev, rtw_txq_ba_iter, &data);717}718719void rtw_set_rx_freq_band(struct rtw_rx_pkt_stat *pkt_stat, u8 channel)720{721if (IS_CH_2G_BAND(channel))722pkt_stat->band = NL80211_BAND_2GHZ;723else if (IS_CH_5G_BAND(channel))724pkt_stat->band = NL80211_BAND_5GHZ;725else726return;727728pkt_stat->freq = ieee80211_channel_to_frequency(channel, pkt_stat->band);729}730EXPORT_SYMBOL(rtw_set_rx_freq_band);731732void rtw_set_dtim_period(struct rtw_dev *rtwdev, u8 dtim_period)733{734rtw_write32_set(rtwdev, REG_TCR, BIT_TCR_UPDATE_TIMIE);735rtw_write8(rtwdev, REG_DTIM_COUNTER_ROOT, dtim_period ? dtim_period - 1 : 0);736}737738void rtw_update_channel(struct rtw_dev *rtwdev, u8 center_channel,739u8 primary_channel, enum rtw_supported_band band,740enum rtw_bandwidth bandwidth)741{742enum nl80211_band nl_band = rtw_hw_to_nl80211_band(band);743struct rtw_hal *hal = &rtwdev->hal;744u8 *cch_by_bw = hal->cch_by_bw;745u32 center_freq, primary_freq;746enum rtw_sar_bands sar_band;747u8 primary_channel_idx;748749center_freq = ieee80211_channel_to_frequency(center_channel, nl_band);750primary_freq = ieee80211_channel_to_frequency(primary_channel, nl_band);751752/* assign the center channel used while 20M bw is selected */753cch_by_bw[RTW_CHANNEL_WIDTH_20] = primary_channel;754755/* assign the center channel used while current bw is selected */756cch_by_bw[bandwidth] = center_channel;757758switch (bandwidth) {759case RTW_CHANNEL_WIDTH_20:760default:761primary_channel_idx = RTW_SC_DONT_CARE;762break;763case RTW_CHANNEL_WIDTH_40:764if (primary_freq > center_freq)765primary_channel_idx = RTW_SC_20_UPPER;766else767primary_channel_idx = RTW_SC_20_LOWER;768break;769case RTW_CHANNEL_WIDTH_80:770if (primary_freq > center_freq) {771if (primary_freq - center_freq == 10)772primary_channel_idx = RTW_SC_20_UPPER;773else774primary_channel_idx = RTW_SC_20_UPMOST;775776/* assign the center channel used777* while 40M bw is selected778*/779cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_channel + 4;780} else {781if (center_freq - primary_freq == 10)782primary_channel_idx = RTW_SC_20_LOWER;783else784primary_channel_idx = RTW_SC_20_LOWEST;785786/* assign the center channel used787* while 40M bw is selected788*/789cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_channel - 4;790}791break;792}793794switch (center_channel) {795case 1 ... 14:796sar_band = RTW_SAR_BAND_0;797break;798case 36 ... 64:799sar_band = RTW_SAR_BAND_1;800break;801case 100 ... 144:802sar_band = RTW_SAR_BAND_3;803break;804case 149 ... 177:805sar_band = RTW_SAR_BAND_4;806break;807default:808WARN(1, "unknown ch(%u) to SAR band\n", center_channel);809sar_band = RTW_SAR_BAND_0;810break;811}812813hal->current_primary_channel_index = primary_channel_idx;814hal->current_band_width = bandwidth;815hal->primary_channel = primary_channel;816hal->current_channel = center_channel;817hal->current_band_type = band;818hal->sar_band = sar_band;819}820821void rtw_get_channel_params(struct cfg80211_chan_def *chandef,822struct rtw_channel_params *chan_params)823{824struct ieee80211_channel *channel = chandef->chan;825enum nl80211_chan_width width = chandef->width;826u32 primary_freq, center_freq;827u8 center_chan;828u8 bandwidth = RTW_CHANNEL_WIDTH_20;829830center_chan = channel->hw_value;831primary_freq = channel->center_freq;832center_freq = chandef->center_freq1;833834switch (width) {835case NL80211_CHAN_WIDTH_20_NOHT:836case NL80211_CHAN_WIDTH_20:837bandwidth = RTW_CHANNEL_WIDTH_20;838break;839case NL80211_CHAN_WIDTH_40:840bandwidth = RTW_CHANNEL_WIDTH_40;841if (primary_freq > center_freq)842center_chan -= 2;843else844center_chan += 2;845break;846case NL80211_CHAN_WIDTH_80:847bandwidth = RTW_CHANNEL_WIDTH_80;848if (primary_freq > center_freq) {849if (primary_freq - center_freq == 10)850center_chan -= 2;851else852center_chan -= 6;853} else {854if (center_freq - primary_freq == 10)855center_chan += 2;856else857center_chan += 6;858}859break;860default:861center_chan = 0;862break;863}864865chan_params->center_chan = center_chan;866chan_params->bandwidth = bandwidth;867chan_params->primary_chan = channel->hw_value;868}869870void rtw_set_channel(struct rtw_dev *rtwdev)871{872const struct rtw_chip_info *chip = rtwdev->chip;873struct ieee80211_hw *hw = rtwdev->hw;874struct rtw_hal *hal = &rtwdev->hal;875struct rtw_channel_params ch_param;876u8 center_chan, primary_chan, bandwidth, band;877878rtw_get_channel_params(&hw->conf.chandef, &ch_param);879if (WARN(ch_param.center_chan == 0, "Invalid channel\n"))880return;881882center_chan = ch_param.center_chan;883primary_chan = ch_param.primary_chan;884bandwidth = ch_param.bandwidth;885band = ch_param.center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G;886887rtw_update_channel(rtwdev, center_chan, primary_chan, band, bandwidth);888889if (rtwdev->scan_info.op_chan)890rtw_store_op_chan(rtwdev, true);891892chip->ops->set_channel(rtwdev, center_chan, bandwidth,893hal->current_primary_channel_index);894895if (hal->current_band_type == RTW_BAND_5G) {896rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_5G);897} else {898if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))899rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G);900else901rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G_NOFORSCAN);902}903904rtw_phy_set_tx_power_level(rtwdev, center_chan);905906/* if the channel isn't set for scanning, we will do RF calibration907* in ieee80211_ops::mgd_prepare_tx(). Performing the calibration908* during scanning on each channel takes too long.909*/910if (!test_bit(RTW_FLAG_SCANNING, rtwdev->flags))911rtwdev->need_rfk = true;912}913914void rtw_chip_prepare_tx(struct rtw_dev *rtwdev)915{916const struct rtw_chip_info *chip = rtwdev->chip;917918if (rtwdev->need_rfk) {919rtwdev->need_rfk = false;920chip->ops->phy_calibration(rtwdev);921}922}923924static void rtw_vif_write_addr(struct rtw_dev *rtwdev, u32 start, u8 *addr)925{926int i;927928for (i = 0; i < ETH_ALEN; i++)929rtw_write8(rtwdev, start + i, addr[i]);930}931932void rtw_vif_port_config(struct rtw_dev *rtwdev,933struct rtw_vif *rtwvif,934u32 config)935{936u32 addr, mask;937938if (config & PORT_SET_MAC_ADDR) {939addr = rtwvif->conf->mac_addr.addr;940rtw_vif_write_addr(rtwdev, addr, rtwvif->mac_addr);941}942if (config & PORT_SET_BSSID) {943addr = rtwvif->conf->bssid.addr;944rtw_vif_write_addr(rtwdev, addr, rtwvif->bssid);945}946if (config & PORT_SET_NET_TYPE) {947addr = rtwvif->conf->net_type.addr;948mask = rtwvif->conf->net_type.mask;949rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type);950}951if (config & PORT_SET_AID) {952addr = rtwvif->conf->aid.addr;953mask = rtwvif->conf->aid.mask;954rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid);955}956if (config & PORT_SET_BCN_CTRL) {957addr = rtwvif->conf->bcn_ctrl.addr;958mask = rtwvif->conf->bcn_ctrl.mask;959rtw_write8_mask(rtwdev, addr, mask, rtwvif->bcn_ctrl);960}961}962963static u8 hw_bw_cap_to_bitamp(u8 bw_cap)964{965u8 bw = 0;966967switch (bw_cap) {968case EFUSE_HW_CAP_IGNORE:969case EFUSE_HW_CAP_SUPP_BW80:970bw |= BIT(RTW_CHANNEL_WIDTH_80);971fallthrough;972case EFUSE_HW_CAP_SUPP_BW40:973bw |= BIT(RTW_CHANNEL_WIDTH_40);974fallthrough;975default:976bw |= BIT(RTW_CHANNEL_WIDTH_20);977break;978}979980return bw;981}982983static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num)984{985const struct rtw_chip_info *chip = rtwdev->chip;986struct rtw_hal *hal = &rtwdev->hal;987988if (hw_ant_num == EFUSE_HW_CAP_IGNORE ||989hw_ant_num >= hal->rf_path_num)990return;991992switch (hw_ant_num) {993case 1:994hal->rf_type = RF_1T1R;995hal->rf_path_num = 1;996if (!chip->fix_rf_phy_num)997hal->rf_phy_num = hal->rf_path_num;998hal->antenna_tx = BB_PATH_A;999hal->antenna_rx = BB_PATH_A;1000break;1001default:1002WARN(1, "invalid hw configuration from efuse\n");1003break;1004}1005}10061007static u64 get_vht_ra_mask(struct ieee80211_sta *sta)1008{1009u64 ra_mask = 0;1010u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map);1011u8 vht_mcs_cap;1012int i, nss;10131014/* 4SS, every two bits for MCS7/8/9 */1015for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 10) {1016vht_mcs_cap = mcs_map & 0x3;1017switch (vht_mcs_cap) {1018case 2: /* MCS9 */1019ra_mask |= 0x3ffULL << nss;1020break;1021case 1: /* MCS8 */1022ra_mask |= 0x1ffULL << nss;1023break;1024case 0: /* MCS7 */1025ra_mask |= 0x0ffULL << nss;1026break;1027default:1028break;1029}1030}10311032return ra_mask;1033}10341035static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num)1036{1037u8 rate_id = 0;10381039switch (wireless_set) {1040case WIRELESS_CCK:1041rate_id = RTW_RATEID_B_20M;1042break;1043case WIRELESS_OFDM:1044rate_id = RTW_RATEID_G;1045break;1046case WIRELESS_CCK | WIRELESS_OFDM:1047rate_id = RTW_RATEID_BG;1048break;1049case WIRELESS_OFDM | WIRELESS_HT:1050if (tx_num == 1)1051rate_id = RTW_RATEID_GN_N1SS;1052else if (tx_num == 2)1053rate_id = RTW_RATEID_GN_N2SS;1054else if (tx_num == 3)1055rate_id = RTW_RATEID_ARFR5_N_3SS;1056break;1057case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT:1058if (bw_mode == RTW_CHANNEL_WIDTH_40) {1059if (tx_num == 1)1060rate_id = RTW_RATEID_BGN_40M_1SS;1061else if (tx_num == 2)1062rate_id = RTW_RATEID_BGN_40M_2SS;1063else if (tx_num == 3)1064rate_id = RTW_RATEID_ARFR5_N_3SS;1065else if (tx_num == 4)1066rate_id = RTW_RATEID_ARFR7_N_4SS;1067} else {1068if (tx_num == 1)1069rate_id = RTW_RATEID_BGN_20M_1SS;1070else if (tx_num == 2)1071rate_id = RTW_RATEID_BGN_20M_2SS;1072else if (tx_num == 3)1073rate_id = RTW_RATEID_ARFR5_N_3SS;1074else if (tx_num == 4)1075rate_id = RTW_RATEID_ARFR7_N_4SS;1076}1077break;1078case WIRELESS_OFDM | WIRELESS_VHT:1079if (tx_num == 1)1080rate_id = RTW_RATEID_ARFR1_AC_1SS;1081else if (tx_num == 2)1082rate_id = RTW_RATEID_ARFR0_AC_2SS;1083else if (tx_num == 3)1084rate_id = RTW_RATEID_ARFR4_AC_3SS;1085else if (tx_num == 4)1086rate_id = RTW_RATEID_ARFR6_AC_4SS;1087break;1088case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT:1089if (bw_mode >= RTW_CHANNEL_WIDTH_80) {1090if (tx_num == 1)1091rate_id = RTW_RATEID_ARFR1_AC_1SS;1092else if (tx_num == 2)1093rate_id = RTW_RATEID_ARFR0_AC_2SS;1094else if (tx_num == 3)1095rate_id = RTW_RATEID_ARFR4_AC_3SS;1096else if (tx_num == 4)1097rate_id = RTW_RATEID_ARFR6_AC_4SS;1098} else {1099if (tx_num == 1)1100rate_id = RTW_RATEID_ARFR2_AC_2G_1SS;1101else if (tx_num == 2)1102rate_id = RTW_RATEID_ARFR3_AC_2G_2SS;1103else if (tx_num == 3)1104rate_id = RTW_RATEID_ARFR4_AC_3SS;1105else if (tx_num == 4)1106rate_id = RTW_RATEID_ARFR6_AC_4SS;1107}1108break;1109default:1110break;1111}11121113return rate_id;1114}11151116#define RA_MASK_CCK_RATES 0x0000f1117#define RA_MASK_OFDM_RATES 0x00ff01118#define RA_MASK_HT_RATES_1SS (0xff000ULL << 0)1119#define RA_MASK_HT_RATES_2SS (0xff000ULL << 8)1120#define RA_MASK_HT_RATES_3SS (0xff000ULL << 16)1121#define RA_MASK_HT_RATES (RA_MASK_HT_RATES_1SS | \1122RA_MASK_HT_RATES_2SS | \1123RA_MASK_HT_RATES_3SS)1124#define RA_MASK_VHT_RATES_1SS (0x3ff000ULL << 0)1125#define RA_MASK_VHT_RATES_2SS (0x3ff000ULL << 10)1126#define RA_MASK_VHT_RATES_3SS (0x3ff000ULL << 20)1127#define RA_MASK_VHT_RATES (RA_MASK_VHT_RATES_1SS | \1128RA_MASK_VHT_RATES_2SS | \1129RA_MASK_VHT_RATES_3SS)1130#define RA_MASK_CCK_IN_BG 0x000051131#define RA_MASK_CCK_IN_HT 0x000051132#define RA_MASK_CCK_IN_VHT 0x000051133#define RA_MASK_OFDM_IN_VHT 0x000101134#define RA_MASK_OFDM_IN_HT_2G 0x000101135#define RA_MASK_OFDM_IN_HT_5G 0x0003011361137static u64 rtw_rate_mask_rssi(struct rtw_sta_info *si, u8 wireless_set)1138{1139u8 rssi_level = si->rssi_level;11401141if (wireless_set == WIRELESS_CCK)1142return 0xffffffffffffffffULL;11431144if (rssi_level == 0)1145return 0xffffffffffffffffULL;1146else if (rssi_level == 1)1147return 0xfffffffffffffff0ULL;1148else if (rssi_level == 2)1149return 0xffffffffffffefe0ULL;1150else if (rssi_level == 3)1151return 0xffffffffffffcfc0ULL;1152else if (rssi_level == 4)1153return 0xffffffffffff8f80ULL;1154else1155return 0xffffffffffff0f00ULL;1156}11571158static u64 rtw_rate_mask_recover(u64 ra_mask, u64 ra_mask_bak)1159{1160if ((ra_mask & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)) == 0)1161ra_mask |= (ra_mask_bak & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES));11621163if (ra_mask == 0)1164ra_mask |= (ra_mask_bak & (RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES));11651166return ra_mask;1167}11681169static u64 rtw_rate_mask_cfg(struct rtw_dev *rtwdev, struct rtw_sta_info *si,1170u64 ra_mask, bool is_vht_enable)1171{1172struct rtw_hal *hal = &rtwdev->hal;1173const struct cfg80211_bitrate_mask *mask = si->mask;1174u64 cfg_mask = GENMASK_ULL(63, 0);1175u8 band;11761177if (!si->use_cfg_mask)1178return ra_mask;11791180band = hal->current_band_type;1181if (band == RTW_BAND_2G) {1182band = NL80211_BAND_2GHZ;1183cfg_mask = mask->control[band].legacy;1184} else if (band == RTW_BAND_5G) {1185band = NL80211_BAND_5GHZ;1186cfg_mask = u64_encode_bits(mask->control[band].legacy,1187RA_MASK_OFDM_RATES);1188}11891190if (!is_vht_enable) {1191if (ra_mask & RA_MASK_HT_RATES_1SS)1192cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0],1193RA_MASK_HT_RATES_1SS);1194if (ra_mask & RA_MASK_HT_RATES_2SS)1195cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1],1196RA_MASK_HT_RATES_2SS);1197} else {1198if (ra_mask & RA_MASK_VHT_RATES_1SS)1199cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0],1200RA_MASK_VHT_RATES_1SS);1201if (ra_mask & RA_MASK_VHT_RATES_2SS)1202cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1],1203RA_MASK_VHT_RATES_2SS);1204}12051206ra_mask &= cfg_mask;12071208return ra_mask;1209}12101211void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si,1212bool reset_ra_mask)1213{1214struct rtw_dm_info *dm_info = &rtwdev->dm_info;1215struct ieee80211_sta *sta = si->sta;1216struct rtw_efuse *efuse = &rtwdev->efuse;1217struct rtw_hal *hal = &rtwdev->hal;1218u8 wireless_set;1219u8 bw_mode;1220u8 rate_id;1221u8 stbc_en = 0;1222u8 ldpc_en = 0;1223u8 tx_num = 1;1224u64 ra_mask = 0;1225u64 ra_mask_bak = 0;1226bool is_vht_enable = false;1227bool is_support_sgi = false;12281229if (sta->deflink.vht_cap.vht_supported) {1230is_vht_enable = true;1231ra_mask |= get_vht_ra_mask(sta);1232if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK)1233stbc_en = VHT_STBC_EN;1234if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)1235ldpc_en = VHT_LDPC_EN;1236} else if (sta->deflink.ht_cap.ht_supported) {1237ra_mask |= ((u64)sta->deflink.ht_cap.mcs.rx_mask[3] << 36) |1238((u64)sta->deflink.ht_cap.mcs.rx_mask[2] << 28) |1239(sta->deflink.ht_cap.mcs.rx_mask[1] << 20) |1240(sta->deflink.ht_cap.mcs.rx_mask[0] << 12);1241if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)1242stbc_en = HT_STBC_EN;1243if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)1244ldpc_en = HT_LDPC_EN;1245}12461247if (efuse->hw_cap.nss == 1 || rtwdev->hal.txrx_1ss)1248ra_mask &= RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS;1249else if (efuse->hw_cap.nss == 2)1250ra_mask &= RA_MASK_VHT_RATES_2SS | RA_MASK_HT_RATES_2SS |1251RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS;12521253if (hal->current_band_type == RTW_BAND_5G) {1254ra_mask |= (u64)sta->deflink.supp_rates[NL80211_BAND_5GHZ] << 4;1255ra_mask_bak = ra_mask;1256if (sta->deflink.vht_cap.vht_supported) {1257ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT;1258wireless_set = WIRELESS_OFDM | WIRELESS_VHT;1259} else if (sta->deflink.ht_cap.ht_supported) {1260ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G;1261wireless_set = WIRELESS_OFDM | WIRELESS_HT;1262} else {1263wireless_set = WIRELESS_OFDM;1264}1265dm_info->rrsr_val_init = RRSR_INIT_5G;1266} else if (hal->current_band_type == RTW_BAND_2G) {1267ra_mask |= sta->deflink.supp_rates[NL80211_BAND_2GHZ];1268ra_mask_bak = ra_mask;1269if (sta->deflink.vht_cap.vht_supported) {1270ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT |1271RA_MASK_OFDM_IN_VHT;1272wireless_set = WIRELESS_CCK | WIRELESS_OFDM |1273WIRELESS_HT | WIRELESS_VHT;1274} else if (sta->deflink.ht_cap.ht_supported) {1275ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT |1276RA_MASK_OFDM_IN_HT_2G;1277wireless_set = WIRELESS_CCK | WIRELESS_OFDM |1278WIRELESS_HT;1279} else if (sta->deflink.supp_rates[0] <= 0xf) {1280wireless_set = WIRELESS_CCK;1281} else {1282ra_mask &= RA_MASK_OFDM_RATES | RA_MASK_CCK_IN_BG;1283wireless_set = WIRELESS_CCK | WIRELESS_OFDM;1284}1285dm_info->rrsr_val_init = RRSR_INIT_2G;1286} else {1287rtw_err(rtwdev, "Unknown band type\n");1288ra_mask_bak = ra_mask;1289wireless_set = 0;1290}12911292switch (sta->deflink.bandwidth) {1293case IEEE80211_STA_RX_BW_80:1294bw_mode = RTW_CHANNEL_WIDTH_80;1295is_support_sgi = sta->deflink.vht_cap.vht_supported &&1296(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80);1297break;1298case IEEE80211_STA_RX_BW_40:1299bw_mode = RTW_CHANNEL_WIDTH_40;1300is_support_sgi = sta->deflink.ht_cap.ht_supported &&1301(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40);1302break;1303default:1304bw_mode = RTW_CHANNEL_WIDTH_20;1305is_support_sgi = sta->deflink.ht_cap.ht_supported &&1306(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20);1307break;1308}13091310if (sta->deflink.vht_cap.vht_supported ||1311sta->deflink.ht_cap.ht_supported)1312tx_num = efuse->hw_cap.nss;13131314rate_id = get_rate_id(wireless_set, bw_mode, tx_num);13151316ra_mask &= rtw_rate_mask_rssi(si, wireless_set);1317ra_mask = rtw_rate_mask_recover(ra_mask, ra_mask_bak);1318ra_mask = rtw_rate_mask_cfg(rtwdev, si, ra_mask, is_vht_enable);13191320si->bw_mode = bw_mode;1321si->stbc_en = stbc_en;1322si->ldpc_en = ldpc_en;1323si->sgi_enable = is_support_sgi;1324si->vht_enable = is_vht_enable;1325si->ra_mask = ra_mask;1326si->rate_id = rate_id;13271328rtw_fw_send_ra_info(rtwdev, si, reset_ra_mask);1329}13301331int rtw_wait_firmware_completion(struct rtw_dev *rtwdev)1332{1333const struct rtw_chip_info *chip = rtwdev->chip;1334struct rtw_fw_state *fw;1335int ret = 0;13361337fw = &rtwdev->fw;1338wait_for_completion(&fw->completion);1339if (!fw->firmware)1340ret = -EINVAL;13411342if (chip->wow_fw_name) {1343fw = &rtwdev->wow_fw;1344wait_for_completion(&fw->completion);1345if (!fw->firmware)1346ret = -EINVAL;1347}13481349return ret;1350}1351EXPORT_SYMBOL(rtw_wait_firmware_completion);13521353static enum rtw_lps_deep_mode rtw_update_lps_deep_mode(struct rtw_dev *rtwdev,1354struct rtw_fw_state *fw)1355{1356const struct rtw_chip_info *chip = rtwdev->chip;13571358if (rtw_disable_lps_deep_mode || !chip->lps_deep_mode_supported ||1359!fw->feature)1360return LPS_DEEP_MODE_NONE;13611362if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_PG)) &&1363rtw_fw_feature_check(fw, FW_FEATURE_PG))1364return LPS_DEEP_MODE_PG;13651366if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_LCLK)) &&1367rtw_fw_feature_check(fw, FW_FEATURE_LCLK))1368return LPS_DEEP_MODE_LCLK;13691370return LPS_DEEP_MODE_NONE;1371}13721373int rtw_power_on(struct rtw_dev *rtwdev)1374{1375const struct rtw_chip_info *chip = rtwdev->chip;1376struct rtw_fw_state *fw = &rtwdev->fw;1377bool wifi_only;1378int ret;13791380ret = rtw_hci_setup(rtwdev);1381if (ret) {1382rtw_err(rtwdev, "failed to setup hci\n");1383goto err;1384}13851386/* power on MAC before firmware downloaded */1387ret = rtw_mac_power_on(rtwdev);1388if (ret) {1389rtw_err(rtwdev, "failed to power on mac\n");1390goto err;1391}13921393ret = rtw_wait_firmware_completion(rtwdev);1394if (ret) {1395rtw_err(rtwdev, "failed to wait firmware completion\n");1396goto err_off;1397}13981399ret = rtw_download_firmware(rtwdev, fw);1400if (ret) {1401rtw_err(rtwdev, "failed to download firmware\n");1402goto err_off;1403}14041405/* config mac after firmware downloaded */1406ret = rtw_mac_init(rtwdev);1407if (ret) {1408rtw_err(rtwdev, "failed to configure mac\n");1409goto err_off;1410}14111412chip->ops->phy_set_param(rtwdev);14131414ret = rtw_mac_postinit(rtwdev);1415if (ret) {1416rtw_err(rtwdev, "failed to configure mac in postinit\n");1417goto err_off;1418}14191420ret = rtw_hci_start(rtwdev);1421if (ret) {1422rtw_err(rtwdev, "failed to start hci\n");1423goto err_off;1424}14251426/* send H2C after HCI has started */1427rtw_fw_send_general_info(rtwdev);1428rtw_fw_send_phydm_info(rtwdev);14291430wifi_only = !rtwdev->efuse.btcoex;1431rtw_coex_power_on_setting(rtwdev);1432rtw_coex_init_hw_config(rtwdev, wifi_only);14331434return 0;14351436err_off:1437rtw_mac_power_off(rtwdev);14381439err:1440return ret;1441}1442EXPORT_SYMBOL(rtw_power_on);14431444void rtw_core_fw_scan_notify(struct rtw_dev *rtwdev, bool start)1445{1446if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_NOTIFY_SCAN))1447return;14481449if (start) {1450rtw_fw_scan_notify(rtwdev, true);1451} else {1452reinit_completion(&rtwdev->fw_scan_density);1453rtw_fw_scan_notify(rtwdev, false);1454if (!wait_for_completion_timeout(&rtwdev->fw_scan_density,1455SCAN_NOTIFY_TIMEOUT))1456rtw_warn(rtwdev, "firmware failed to report density after scan\n");1457}1458}14591460void rtw_core_scan_start(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif,1461const u8 *mac_addr, bool hw_scan)1462{1463u32 config = 0;1464int ret = 0;14651466rtw_leave_lps(rtwdev);14671468if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)) {1469ret = rtw_leave_ips(rtwdev);1470if (ret) {1471rtw_err(rtwdev, "failed to leave idle state\n");1472return;1473}1474}14751476ether_addr_copy(rtwvif->mac_addr, mac_addr);1477config |= PORT_SET_MAC_ADDR;1478rtw_vif_port_config(rtwdev, rtwvif, config);14791480rtw_coex_scan_notify(rtwdev, COEX_SCAN_START);1481rtw_core_fw_scan_notify(rtwdev, true);14821483set_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags);1484set_bit(RTW_FLAG_SCANNING, rtwdev->flags);14851486rtw_phy_dig_set_max_coverage(rtwdev);1487}14881489void rtw_core_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,1490bool hw_scan)1491{1492struct rtw_vif *rtwvif = vif ? (struct rtw_vif *)vif->drv_priv : NULL;1493u32 config = 0;14941495if (!rtwvif)1496return;14971498rtw_phy_dig_reset(rtwdev);1499clear_bit(RTW_FLAG_SCANNING, rtwdev->flags);1500clear_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags);15011502rtw_core_fw_scan_notify(rtwdev, false);15031504ether_addr_copy(rtwvif->mac_addr, vif->addr);1505config |= PORT_SET_MAC_ADDR;1506rtw_vif_port_config(rtwdev, rtwvif, config);15071508rtw_coex_scan_notify(rtwdev, COEX_SCAN_FINISH);15091510if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE))1511ieee80211_queue_work(rtwdev->hw, &rtwdev->ips_work);1512}15131514int rtw_core_start(struct rtw_dev *rtwdev)1515{1516int ret;15171518ret = rtwdev->chip->ops->power_on(rtwdev);1519if (ret)1520return ret;15211522rtw_sec_enable_sec_engine(rtwdev);15231524rtwdev->lps_conf.deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->fw);1525rtwdev->lps_conf.wow_deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->wow_fw);15261527/* rcr reset after powered on */1528rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr);15291530ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,1531RTW_WATCH_DOG_DELAY_TIME);15321533set_bit(RTW_FLAG_RUNNING, rtwdev->flags);15341535return 0;1536}15371538void rtw_power_off(struct rtw_dev *rtwdev)1539{1540rtw_hci_stop(rtwdev);1541rtw_coex_power_off_setting(rtwdev);1542rtw_mac_power_off(rtwdev);1543}1544EXPORT_SYMBOL(rtw_power_off);15451546void rtw_core_stop(struct rtw_dev *rtwdev)1547{1548struct rtw_coex *coex = &rtwdev->coex;15491550clear_bit(RTW_FLAG_RUNNING, rtwdev->flags);1551clear_bit(RTW_FLAG_FW_RUNNING, rtwdev->flags);15521553mutex_unlock(&rtwdev->mutex);15541555cancel_work_sync(&rtwdev->c2h_work);1556cancel_work_sync(&rtwdev->update_beacon_work);1557cancel_delayed_work_sync(&rtwdev->watch_dog_work);1558cancel_delayed_work_sync(&coex->bt_relink_work);1559cancel_delayed_work_sync(&coex->bt_reenable_work);1560cancel_delayed_work_sync(&coex->defreeze_work);1561cancel_delayed_work_sync(&coex->wl_remain_work);1562cancel_delayed_work_sync(&coex->bt_remain_work);1563cancel_delayed_work_sync(&coex->wl_connecting_work);1564cancel_delayed_work_sync(&coex->bt_multi_link_remain_work);1565cancel_delayed_work_sync(&coex->wl_ccklock_work);15661567mutex_lock(&rtwdev->mutex);15681569rtwdev->chip->ops->power_off(rtwdev);1570}15711572static void rtw_init_ht_cap(struct rtw_dev *rtwdev,1573struct ieee80211_sta_ht_cap *ht_cap)1574{1575const struct rtw_chip_info *chip = rtwdev->chip;1576struct rtw_efuse *efuse = &rtwdev->efuse;1577int i;15781579ht_cap->ht_supported = true;1580ht_cap->cap = 0;1581ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |1582IEEE80211_HT_CAP_MAX_AMSDU |1583(1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);15841585if (rtw_chip_has_rx_ldpc(rtwdev))1586ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING;1587if (rtw_chip_has_tx_stbc(rtwdev))1588ht_cap->cap |= IEEE80211_HT_CAP_TX_STBC;15891590if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40))1591ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |1592IEEE80211_HT_CAP_DSSSCCK40 |1593IEEE80211_HT_CAP_SGI_40;1594ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;1595ht_cap->ampdu_density = chip->ampdu_density;1596ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;15971598for (i = 0; i < efuse->hw_cap.nss; i++)1599ht_cap->mcs.rx_mask[i] = 0xFF;1600ht_cap->mcs.rx_mask[4] = 0x01;1601ht_cap->mcs.rx_highest = cpu_to_le16(150 * efuse->hw_cap.nss);1602}16031604static void rtw_init_vht_cap(struct rtw_dev *rtwdev,1605struct ieee80211_sta_vht_cap *vht_cap)1606{1607struct rtw_efuse *efuse = &rtwdev->efuse;1608u16 mcs_map = 0;1609__le16 highest;1610int i;16111612if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE &&1613efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT)1614return;16151616vht_cap->vht_supported = true;1617vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |1618IEEE80211_VHT_CAP_SHORT_GI_80 |1619IEEE80211_VHT_CAP_RXSTBC_1 |1620IEEE80211_VHT_CAP_HTC_VHT |1621IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |16220;1623if (rtwdev->hal.rf_path_num > 1)1624vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;1625vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |1626IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE;1627vht_cap->cap |= (rtwdev->hal.bfee_sts_cap <<1628IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT);16291630if (rtw_chip_has_rx_ldpc(rtwdev))1631vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;16321633for (i = 0; i < 8; i++) {1634if (i < efuse->hw_cap.nss)1635mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2);1636else1637mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2);1638}16391640highest = cpu_to_le16(390 * efuse->hw_cap.nss);16411642vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map);1643vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map);1644vht_cap->vht_mcs.rx_highest = highest;1645vht_cap->vht_mcs.tx_highest = highest;1646}16471648static u16 rtw_get_max_scan_ie_len(struct rtw_dev *rtwdev)1649{1650u16 len;16511652len = rtwdev->chip->max_scan_ie_len;16531654if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_SCAN_OFFLOAD) &&1655rtwdev->chip->id == RTW_CHIP_TYPE_8822C)1656len = IEEE80211_MAX_DATA_LEN;1657else if (rtw_fw_feature_ext_check(&rtwdev->fw, FW_FEATURE_EXT_OLD_PAGE_NUM))1658len -= RTW_OLD_PROBE_PG_CNT * TX_PAGE_SIZE;16591660return len;1661}16621663static struct ieee80211_supported_band *1664rtw_sband_dup(struct rtw_dev *rtwdev,1665const struct ieee80211_supported_band *sband)1666{1667struct ieee80211_supported_band *dup;16681669dup = devm_kmemdup(rtwdev->dev, sband, sizeof(*sband), GFP_KERNEL);1670if (!dup)1671return NULL;16721673dup->channels = devm_kmemdup_array(rtwdev->dev, sband->channels,1674sband->n_channels,1675sizeof(*sband->channels),1676GFP_KERNEL);1677if (!dup->channels)1678return NULL;16791680dup->bitrates = devm_kmemdup_array(rtwdev->dev, sband->bitrates,1681sband->n_bitrates,1682sizeof(*sband->bitrates),1683GFP_KERNEL);1684if (!dup->bitrates)1685return NULL;16861687return dup;1688}16891690static void rtw_set_supported_band(struct ieee80211_hw *hw,1691const struct rtw_chip_info *chip)1692{1693struct ieee80211_supported_band *sband;1694struct rtw_dev *rtwdev = hw->priv;16951696if (chip->band & RTW_BAND_2G) {1697sband = rtw_sband_dup(rtwdev, &rtw_band_2ghz);1698if (!sband)1699goto err_out;1700if (chip->ht_supported)1701rtw_init_ht_cap(rtwdev, &sband->ht_cap);1702hw->wiphy->bands[NL80211_BAND_2GHZ] = sband;1703}17041705if (chip->band & RTW_BAND_5G) {1706sband = rtw_sband_dup(rtwdev, &rtw_band_5ghz);1707if (!sband)1708goto err_out;1709if (chip->ht_supported)1710rtw_init_ht_cap(rtwdev, &sband->ht_cap);1711if (chip->vht_supported)1712rtw_init_vht_cap(rtwdev, &sband->vht_cap);1713hw->wiphy->bands[NL80211_BAND_5GHZ] = sband;1714}17151716return;17171718err_out:1719rtw_err(rtwdev, "failed to set supported band\n");1720}17211722static void rtw_vif_smps_iter(void *data, u8 *mac,1723struct ieee80211_vif *vif)1724{1725struct rtw_dev *rtwdev = (struct rtw_dev *)data;17261727if (vif->type != NL80211_IFTYPE_STATION || !vif->cfg.assoc)1728return;17291730if (rtwdev->hal.txrx_1ss)1731ieee80211_request_smps(vif, 0, IEEE80211_SMPS_STATIC);1732else1733ieee80211_request_smps(vif, 0, IEEE80211_SMPS_OFF);1734}17351736void rtw_set_txrx_1ss(struct rtw_dev *rtwdev, bool txrx_1ss)1737{1738const struct rtw_chip_info *chip = rtwdev->chip;1739struct rtw_hal *hal = &rtwdev->hal;17401741if (!chip->ops->config_txrx_mode || rtwdev->hal.txrx_1ss == txrx_1ss)1742return;17431744rtwdev->hal.txrx_1ss = txrx_1ss;1745if (txrx_1ss)1746chip->ops->config_txrx_mode(rtwdev, BB_PATH_A, BB_PATH_A, false);1747else1748chip->ops->config_txrx_mode(rtwdev, hal->antenna_tx,1749hal->antenna_rx, false);1750rtw_iterate_vifs_atomic(rtwdev, rtw_vif_smps_iter, rtwdev);1751}17521753static void __update_firmware_feature(struct rtw_dev *rtwdev,1754struct rtw_fw_state *fw)1755{1756u32 feature;1757const struct rtw_fw_hdr *fw_hdr =1758(const struct rtw_fw_hdr *)fw->firmware->data;17591760feature = le32_to_cpu(fw_hdr->feature);1761fw->feature = feature & FW_FEATURE_SIG ? feature : 0;17621763if (rtwdev->chip->id == RTW_CHIP_TYPE_8822C &&1764RTW_FW_SUIT_VER_CODE(rtwdev->fw) < RTW_FW_VER_CODE(9, 9, 13))1765fw->feature_ext |= FW_FEATURE_EXT_OLD_PAGE_NUM;1766}17671768static void __update_firmware_info(struct rtw_dev *rtwdev,1769struct rtw_fw_state *fw)1770{1771const struct rtw_fw_hdr *fw_hdr =1772(const struct rtw_fw_hdr *)fw->firmware->data;17731774fw->h2c_version = le16_to_cpu(fw_hdr->h2c_fmt_ver);1775fw->version = le16_to_cpu(fw_hdr->version);1776fw->sub_version = fw_hdr->subversion;1777fw->sub_index = fw_hdr->subindex;17781779__update_firmware_feature(rtwdev, fw);1780}17811782static void __update_firmware_info_legacy(struct rtw_dev *rtwdev,1783struct rtw_fw_state *fw)1784{1785struct rtw_fw_hdr_legacy *legacy =1786(struct rtw_fw_hdr_legacy *)fw->firmware->data;17871788fw->h2c_version = 0;1789fw->version = le16_to_cpu(legacy->version);1790fw->sub_version = legacy->subversion1;1791fw->sub_index = legacy->subversion2;1792}17931794static void update_firmware_info(struct rtw_dev *rtwdev,1795struct rtw_fw_state *fw)1796{1797if (rtw_chip_wcpu_8051(rtwdev))1798__update_firmware_info_legacy(rtwdev, fw);1799else1800__update_firmware_info(rtwdev, fw);1801}18021803static void rtw_load_firmware_cb(const struct firmware *firmware, void *context)1804{1805struct rtw_fw_state *fw = context;1806struct rtw_dev *rtwdev = fw->rtwdev;18071808if (!firmware || !firmware->data) {1809rtw_err(rtwdev, "failed to request firmware\n");1810complete_all(&fw->completion);1811return;1812}18131814fw->firmware = firmware;1815update_firmware_info(rtwdev, fw);1816complete_all(&fw->completion);18171818rtw_info(rtwdev, "%sFirmware version %u.%u.%u, H2C version %u\n",1819fw->type == RTW_WOWLAN_FW ? "WOW " : "",1820fw->version, fw->sub_version, fw->sub_index, fw->h2c_version);1821}18221823static int rtw_load_firmware(struct rtw_dev *rtwdev, enum rtw_fw_type type)1824{1825const char *fw_name;1826struct rtw_fw_state *fw;1827int ret;18281829switch (type) {1830case RTW_WOWLAN_FW:1831fw = &rtwdev->wow_fw;1832fw_name = rtwdev->chip->wow_fw_name;1833break;18341835case RTW_NORMAL_FW:1836fw = &rtwdev->fw;1837fw_name = rtwdev->chip->fw_name;1838break;18391840default:1841rtw_warn(rtwdev, "unsupported firmware type\n");1842return -ENOENT;1843}18441845fw->type = type;1846fw->rtwdev = rtwdev;1847init_completion(&fw->completion);18481849ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev,1850GFP_KERNEL, fw, rtw_load_firmware_cb);1851if (ret) {1852rtw_err(rtwdev, "failed to async firmware request\n");1853return ret;1854}18551856return 0;1857}18581859static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev)1860{1861const struct rtw_chip_info *chip = rtwdev->chip;1862struct rtw_hal *hal = &rtwdev->hal;1863struct rtw_efuse *efuse = &rtwdev->efuse;18641865switch (rtw_hci_type(rtwdev)) {1866case RTW_HCI_TYPE_PCIE:1867rtwdev->hci.rpwm_addr = 0x03d9;1868rtwdev->hci.cpwm_addr = 0x03da;1869break;1870case RTW_HCI_TYPE_SDIO:1871rtwdev->hci.rpwm_addr = REG_SDIO_HRPWM1;1872rtwdev->hci.cpwm_addr = REG_SDIO_HCPWM1_V2;1873break;1874case RTW_HCI_TYPE_USB:1875rtwdev->hci.rpwm_addr = 0xfe58;1876rtwdev->hci.cpwm_addr = 0xfe57;1877break;1878default:1879rtw_err(rtwdev, "unsupported hci type\n");1880return -EINVAL;1881}18821883hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1);1884hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version);1885hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1;1886if (hal->chip_version & BIT_RF_TYPE_ID) {1887hal->rf_type = RF_2T2R;1888hal->rf_path_num = 2;1889hal->antenna_tx = BB_PATH_AB;1890hal->antenna_rx = BB_PATH_AB;1891} else {1892hal->rf_type = RF_1T1R;1893hal->rf_path_num = 1;1894hal->antenna_tx = BB_PATH_A;1895hal->antenna_rx = BB_PATH_A;1896}1897hal->rf_phy_num = chip->fix_rf_phy_num ? chip->fix_rf_phy_num :1898hal->rf_path_num;18991900efuse->physical_size = chip->phy_efuse_size;1901efuse->logical_size = chip->log_efuse_size;1902efuse->protect_size = chip->ptct_efuse_size;19031904/* default use ack */1905rtwdev->hal.rcr |= BIT_VHT_DACK;19061907hal->bfee_sts_cap = 3;19081909return 0;1910}19111912static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev)1913{1914struct rtw_fw_state *fw = &rtwdev->fw;1915int ret;19161917ret = rtw_hci_setup(rtwdev);1918if (ret) {1919rtw_err(rtwdev, "failed to setup hci\n");1920goto err;1921}19221923ret = rtw_mac_power_on(rtwdev);1924if (ret) {1925rtw_err(rtwdev, "failed to power on mac\n");1926goto err;1927}19281929rtw_write8(rtwdev, REG_C2HEVT, C2H_HW_FEATURE_DUMP);19301931wait_for_completion(&fw->completion);1932if (!fw->firmware) {1933ret = -EINVAL;1934rtw_err(rtwdev, "failed to load firmware\n");1935goto err;1936}19371938ret = rtw_download_firmware(rtwdev, fw);1939if (ret) {1940rtw_err(rtwdev, "failed to download firmware\n");1941goto err_off;1942}19431944return 0;19451946err_off:1947rtw_mac_power_off(rtwdev);19481949err:1950return ret;1951}19521953static int rtw_dump_hw_feature(struct rtw_dev *rtwdev)1954{1955struct rtw_efuse *efuse = &rtwdev->efuse;1956u8 hw_feature[HW_FEATURE_LEN];1957u8 id;1958u8 bw;1959int i;19601961if (!rtwdev->chip->hw_feature_report)1962return 0;19631964id = rtw_read8(rtwdev, REG_C2HEVT);1965if (id != C2H_HW_FEATURE_REPORT) {1966rtw_err(rtwdev, "failed to read hw feature report\n");1967return -EBUSY;1968}19691970for (i = 0; i < HW_FEATURE_LEN; i++)1971hw_feature[i] = rtw_read8(rtwdev, REG_C2HEVT + 2 + i);19721973rtw_write8(rtwdev, REG_C2HEVT, 0);19741975bw = GET_EFUSE_HW_CAP_BW(hw_feature);1976efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw);1977efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature);1978efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature);1979efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature);1980efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature);19811982rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num);19831984if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE ||1985efuse->hw_cap.nss > rtwdev->hal.rf_path_num)1986efuse->hw_cap.nss = rtwdev->hal.rf_path_num;19871988rtw_dbg(rtwdev, RTW_DBG_EFUSE,1989"hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n",1990efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl,1991efuse->hw_cap.ant_num, efuse->hw_cap.nss);19921993return 0;1994}19951996static void rtw_chip_efuse_disable(struct rtw_dev *rtwdev)1997{1998rtw_hci_stop(rtwdev);1999rtw_mac_power_off(rtwdev);2000}20012002static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev)2003{2004struct rtw_efuse *efuse = &rtwdev->efuse;2005int ret;20062007mutex_lock(&rtwdev->mutex);20082009/* power on mac to read efuse */2010ret = rtw_chip_efuse_enable(rtwdev);2011if (ret)2012goto out_unlock;20132014ret = rtw_parse_efuse_map(rtwdev);2015if (ret)2016goto out_disable;20172018ret = rtw_dump_hw_feature(rtwdev);2019if (ret)2020goto out_disable;20212022ret = rtw_check_supported_rfe(rtwdev);2023if (ret)2024goto out_disable;20252026if (efuse->crystal_cap == 0xff)2027efuse->crystal_cap = 0;2028if (efuse->pa_type_2g == 0xff)2029efuse->pa_type_2g = 0;2030if (efuse->pa_type_5g == 0xff)2031efuse->pa_type_5g = 0;2032if (efuse->lna_type_2g == 0xff)2033efuse->lna_type_2g = 0;2034if (efuse->lna_type_5g == 0xff)2035efuse->lna_type_5g = 0;2036if (efuse->channel_plan == 0xff)2037efuse->channel_plan = 0x7f;2038if (efuse->rf_board_option == 0xff)2039efuse->rf_board_option = 0;2040if (efuse->bt_setting & BIT(0))2041efuse->share_ant = true;2042if (efuse->regd == 0xff)2043efuse->regd = 0;2044if (efuse->tx_bb_swing_setting_2g == 0xff)2045efuse->tx_bb_swing_setting_2g = 0;2046if (efuse->tx_bb_swing_setting_5g == 0xff)2047efuse->tx_bb_swing_setting_5g = 0;20482049efuse->btcoex = (efuse->rf_board_option & 0xe0) == 0x20;2050efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0;2051efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0;2052efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0;2053efuse->ext_lna_5g = efuse->lna_type_5g & BIT(3) ? 1 : 0;20542055if (!is_valid_ether_addr(efuse->addr)) {2056eth_random_addr(efuse->addr);2057dev_warn(rtwdev->dev, "efuse MAC invalid, using random\n");2058}20592060out_disable:2061rtw_chip_efuse_disable(rtwdev);20622063out_unlock:2064mutex_unlock(&rtwdev->mutex);2065return ret;2066}20672068static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev)2069{2070struct rtw_hal *hal = &rtwdev->hal;2071const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev);20722073if (!rfe_def)2074return -ENODEV;20752076rtw_phy_setup_phy_cond(rtwdev, hal->pkg_type);20772078rtw_phy_init_tx_power(rtwdev);2079rtw_load_table(rtwdev, rfe_def->phy_pg_tbl);2080rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl);2081rtw_phy_tx_power_by_rate_config(hal);2082rtw_phy_tx_power_limit_config(hal);20832084return 0;2085}20862087int rtw_chip_info_setup(struct rtw_dev *rtwdev)2088{2089int ret;20902091ret = rtw_chip_parameter_setup(rtwdev);2092if (ret) {2093rtw_err(rtwdev, "failed to setup chip parameters\n");2094goto err_out;2095}20962097ret = rtw_chip_efuse_info_setup(rtwdev);2098if (ret) {2099rtw_err(rtwdev, "failed to setup chip efuse info\n");2100goto err_out;2101}21022103ret = rtw_chip_board_info_setup(rtwdev);2104if (ret) {2105rtw_err(rtwdev, "failed to setup chip board info\n");2106goto err_out;2107}21082109return 0;21102111err_out:2112return ret;2113}2114EXPORT_SYMBOL(rtw_chip_info_setup);21152116static void rtw_stats_init(struct rtw_dev *rtwdev)2117{2118struct rtw_traffic_stats *stats = &rtwdev->stats;2119struct rtw_dm_info *dm_info = &rtwdev->dm_info;2120int i;21212122ewma_tp_init(&stats->tx_ewma_tp);2123ewma_tp_init(&stats->rx_ewma_tp);21242125for (i = 0; i < RTW_EVM_NUM; i++)2126ewma_evm_init(&dm_info->ewma_evm[i]);2127for (i = 0; i < RTW_SNR_NUM; i++)2128ewma_snr_init(&dm_info->ewma_snr[i]);2129}21302131int rtw_core_init(struct rtw_dev *rtwdev)2132{2133const struct rtw_chip_info *chip = rtwdev->chip;2134struct rtw_coex *coex = &rtwdev->coex;2135int ret;21362137INIT_LIST_HEAD(&rtwdev->rsvd_page_list);2138INIT_LIST_HEAD(&rtwdev->txqs);21392140timer_setup(&rtwdev->tx_report.purge_timer,2141rtw_tx_report_purge_timer, 0);2142rtwdev->tx_wq = alloc_workqueue("rtw_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0);2143if (!rtwdev->tx_wq) {2144rtw_warn(rtwdev, "alloc_workqueue rtw_tx_wq failed\n");2145return -ENOMEM;2146}21472148INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work);2149INIT_DELAYED_WORK(&coex->bt_relink_work, rtw_coex_bt_relink_work);2150INIT_DELAYED_WORK(&coex->bt_reenable_work, rtw_coex_bt_reenable_work);2151INIT_DELAYED_WORK(&coex->defreeze_work, rtw_coex_defreeze_work);2152INIT_DELAYED_WORK(&coex->wl_remain_work, rtw_coex_wl_remain_work);2153INIT_DELAYED_WORK(&coex->bt_remain_work, rtw_coex_bt_remain_work);2154INIT_DELAYED_WORK(&coex->wl_connecting_work, rtw_coex_wl_connecting_work);2155INIT_DELAYED_WORK(&coex->bt_multi_link_remain_work,2156rtw_coex_bt_multi_link_remain_work);2157INIT_DELAYED_WORK(&coex->wl_ccklock_work, rtw_coex_wl_ccklock_work);2158INIT_WORK(&rtwdev->tx_work, rtw_tx_work);2159INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work);2160INIT_WORK(&rtwdev->ips_work, rtw_ips_work);2161INIT_WORK(&rtwdev->fw_recovery_work, rtw_fw_recovery_work);2162INIT_WORK(&rtwdev->update_beacon_work, rtw_fw_update_beacon_work);2163INIT_WORK(&rtwdev->ba_work, rtw_txq_ba_work);2164skb_queue_head_init(&rtwdev->c2h_queue);2165skb_queue_head_init(&rtwdev->coex.queue);2166skb_queue_head_init(&rtwdev->tx_report.queue);21672168spin_lock_init(&rtwdev->txq_lock);2169spin_lock_init(&rtwdev->tx_report.q_lock);21702171mutex_init(&rtwdev->mutex);2172mutex_init(&rtwdev->hal.tx_power_mutex);21732174init_waitqueue_head(&rtwdev->coex.wait);2175init_completion(&rtwdev->lps_leave_check);2176init_completion(&rtwdev->fw_scan_density);21772178rtwdev->sec.total_cam_num = 32;2179rtwdev->hal.current_channel = 1;2180rtwdev->dm_info.fix_rate = U8_MAX;21812182rtw_stats_init(rtwdev);21832184/* default rx filter setting */2185rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV |2186BIT_PKTCTL_DLEN | BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS |2187BIT_AB | BIT_AM | BIT_APM;21882189ret = rtw_load_firmware(rtwdev, RTW_NORMAL_FW);2190if (ret) {2191rtw_warn(rtwdev, "no firmware loaded\n");2192goto out;2193}21942195if (chip->wow_fw_name) {2196ret = rtw_load_firmware(rtwdev, RTW_WOWLAN_FW);2197if (ret) {2198rtw_warn(rtwdev, "no wow firmware loaded\n");2199wait_for_completion(&rtwdev->fw.completion);2200if (rtwdev->fw.firmware)2201release_firmware(rtwdev->fw.firmware);2202goto out;2203}2204}22052206return 0;22072208out:2209destroy_workqueue(rtwdev->tx_wq);2210return ret;2211}2212EXPORT_SYMBOL(rtw_core_init);22132214void rtw_core_deinit(struct rtw_dev *rtwdev)2215{2216struct rtw_fw_state *fw = &rtwdev->fw;2217struct rtw_fw_state *wow_fw = &rtwdev->wow_fw;2218struct rtw_rsvd_page *rsvd_pkt, *tmp;2219unsigned long flags;22202221rtw_wait_firmware_completion(rtwdev);22222223if (fw->firmware)2224release_firmware(fw->firmware);22252226if (wow_fw->firmware)2227release_firmware(wow_fw->firmware);22282229destroy_workqueue(rtwdev->tx_wq);2230timer_delete_sync(&rtwdev->tx_report.purge_timer);2231spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags);2232skb_queue_purge(&rtwdev->tx_report.queue);2233spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags);2234skb_queue_purge(&rtwdev->coex.queue);2235skb_queue_purge(&rtwdev->c2h_queue);22362237list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list,2238build_list) {2239list_del(&rsvd_pkt->build_list);2240kfree(rsvd_pkt);2241}22422243mutex_destroy(&rtwdev->mutex);2244mutex_destroy(&rtwdev->hal.tx_power_mutex);2245}2246EXPORT_SYMBOL(rtw_core_deinit);22472248int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)2249{2250struct rtw_hal *hal = &rtwdev->hal;2251int max_tx_headroom = 0;2252int ret;22532254max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz;22552256if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO)2257max_tx_headroom += RTW_SDIO_DATA_PTR_ALIGN;22582259hw->extra_tx_headroom = max_tx_headroom;2260hw->queues = IEEE80211_NUM_ACS;2261hw->txq_data_size = sizeof(struct rtw_txq);2262hw->sta_data_size = sizeof(struct rtw_sta_info);2263hw->vif_data_size = sizeof(struct rtw_vif);22642265ieee80211_hw_set(hw, SIGNAL_DBM);2266ieee80211_hw_set(hw, RX_INCLUDES_FCS);2267ieee80211_hw_set(hw, AMPDU_AGGREGATION);2268ieee80211_hw_set(hw, MFP_CAPABLE);2269ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);2270ieee80211_hw_set(hw, SUPPORTS_PS);2271ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);2272ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);2273if (rtwdev->chip->amsdu_in_ampdu)2274ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);2275ieee80211_hw_set(hw, HAS_RATE_CONTROL);2276ieee80211_hw_set(hw, TX_AMSDU);2277ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);22782279hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |2280BIT(NL80211_IFTYPE_AP) |2281BIT(NL80211_IFTYPE_ADHOC);2282hw->wiphy->available_antennas_tx = hal->antenna_tx;2283hw->wiphy->available_antennas_rx = hal->antenna_rx;22842285hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS |2286WIPHY_FLAG_TDLS_EXTERNAL_SETUP;22872288hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;2289hw->wiphy->max_scan_ssids = RTW_SCAN_MAX_SSIDS;2290hw->wiphy->max_scan_ie_len = rtw_get_max_scan_ie_len(rtwdev);22912292if (rtwdev->chip->id == RTW_CHIP_TYPE_8822C) {2293hw->wiphy->iface_combinations = rtw_iface_combs;2294hw->wiphy->n_iface_combinations = ARRAY_SIZE(rtw_iface_combs);2295}22962297wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);2298wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SCAN_RANDOM_SN);2299wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);23002301#ifdef CONFIG_PM2302hw->wiphy->wowlan = rtwdev->chip->wowlan_stub;2303hw->wiphy->max_sched_scan_ssids = rtwdev->chip->max_sched_scan_ssids;2304#endif2305rtw_set_supported_band(hw, rtwdev->chip);2306SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr);23072308hw->wiphy->sar_capa = &rtw_sar_capa;23092310ret = rtw_regd_init(rtwdev);2311if (ret) {2312rtw_err(rtwdev, "failed to init regd\n");2313return ret;2314}23152316rtw_led_init(rtwdev);23172318ret = ieee80211_register_hw(hw);2319if (ret) {2320rtw_err(rtwdev, "failed to register hw\n");2321goto led_deinit;2322}23232324ret = rtw_regd_hint(rtwdev);2325if (ret) {2326rtw_err(rtwdev, "failed to hint regd\n");2327goto led_deinit;2328}23292330rtw_debugfs_init(rtwdev);23312332rtwdev->bf_info.bfer_mu_cnt = 0;2333rtwdev->bf_info.bfer_su_cnt = 0;23342335return 0;23362337led_deinit:2338rtw_led_deinit(rtwdev);2339return ret;2340}2341EXPORT_SYMBOL(rtw_register_hw);23422343void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)2344{2345ieee80211_unregister_hw(hw);2346rtw_debugfs_deinit(rtwdev);2347rtw_led_deinit(rtwdev);2348}2349EXPORT_SYMBOL(rtw_unregister_hw);23502351static2352void rtw_swap_reg_nbytes(struct rtw_dev *rtwdev, const struct rtw_hw_reg *reg1,2353const struct rtw_hw_reg *reg2, u8 nbytes)2354{2355u8 i;23562357for (i = 0; i < nbytes; i++) {2358u8 v1 = rtw_read8(rtwdev, reg1->addr + i);2359u8 v2 = rtw_read8(rtwdev, reg2->addr + i);23602361rtw_write8(rtwdev, reg1->addr + i, v2);2362rtw_write8(rtwdev, reg2->addr + i, v1);2363}2364}23652366static2367void rtw_swap_reg_mask(struct rtw_dev *rtwdev, const struct rtw_hw_reg *reg1,2368const struct rtw_hw_reg *reg2)2369{2370u32 v1, v2;23712372v1 = rtw_read32_mask(rtwdev, reg1->addr, reg1->mask);2373v2 = rtw_read32_mask(rtwdev, reg2->addr, reg2->mask);2374rtw_write32_mask(rtwdev, reg2->addr, reg2->mask, v1);2375rtw_write32_mask(rtwdev, reg1->addr, reg1->mask, v2);2376}23772378struct rtw_iter_port_switch_data {2379struct rtw_dev *rtwdev;2380struct rtw_vif *rtwvif_ap;2381};23822383static void rtw_port_switch_iter(void *data, struct ieee80211_vif *vif)2384{2385struct rtw_iter_port_switch_data *iter_data = data;2386struct rtw_dev *rtwdev = iter_data->rtwdev;2387struct rtw_vif *rtwvif_target = (struct rtw_vif *)vif->drv_priv;2388struct rtw_vif *rtwvif_ap = iter_data->rtwvif_ap;2389const struct rtw_hw_reg *reg1, *reg2;23902391if (rtwvif_target->port != RTW_PORT_0)2392return;23932394rtw_dbg(rtwdev, RTW_DBG_STATE, "AP port switch from %d -> %d\n",2395rtwvif_ap->port, rtwvif_target->port);23962397/* Leave LPS so the value swapped are not in PS mode */2398rtw_leave_lps(rtwdev);23992400reg1 = &rtwvif_ap->conf->net_type;2401reg2 = &rtwvif_target->conf->net_type;2402rtw_swap_reg_mask(rtwdev, reg1, reg2);24032404reg1 = &rtwvif_ap->conf->mac_addr;2405reg2 = &rtwvif_target->conf->mac_addr;2406rtw_swap_reg_nbytes(rtwdev, reg1, reg2, ETH_ALEN);24072408reg1 = &rtwvif_ap->conf->bssid;2409reg2 = &rtwvif_target->conf->bssid;2410rtw_swap_reg_nbytes(rtwdev, reg1, reg2, ETH_ALEN);24112412reg1 = &rtwvif_ap->conf->bcn_ctrl;2413reg2 = &rtwvif_target->conf->bcn_ctrl;2414rtw_swap_reg_nbytes(rtwdev, reg1, reg2, 1);24152416swap(rtwvif_target->port, rtwvif_ap->port);2417swap(rtwvif_target->conf, rtwvif_ap->conf);24182419rtw_fw_default_port(rtwdev, rtwvif_target);2420}24212422void rtw_core_port_switch(struct rtw_dev *rtwdev, struct ieee80211_vif *vif)2423{2424struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;2425struct rtw_iter_port_switch_data iter_data;24262427if (vif->type != NL80211_IFTYPE_AP || rtwvif->port == RTW_PORT_0)2428return;24292430iter_data.rtwdev = rtwdev;2431iter_data.rtwvif_ap = rtwvif;2432rtw_iterate_vifs(rtwdev, rtw_port_switch_iter, &iter_data);2433}24342435static void rtw_check_sta_active_iter(void *data, struct ieee80211_vif *vif)2436{2437struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;2438bool *active = data;24392440if (*active)2441return;24422443if (vif->type != NL80211_IFTYPE_STATION)2444return;24452446if (vif->cfg.assoc || !is_zero_ether_addr(rtwvif->bssid))2447*active = true;2448}24492450bool rtw_core_check_sta_active(struct rtw_dev *rtwdev)2451{2452bool sta_active = false;24532454rtw_iterate_vifs(rtwdev, rtw_check_sta_active_iter, &sta_active);24552456return rtwdev->ap_active || sta_active;2457}24582459void rtw_core_enable_beacon(struct rtw_dev *rtwdev, bool enable)2460{2461if (!rtwdev->ap_active)2462return;24632464if (enable) {2465rtw_write32_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION);2466rtw_write8_clr(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE);2467} else {2468rtw_write32_clr(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION);2469rtw_write8_set(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE);2470}2471}24722473void rtw_set_ampdu_factor(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,2474struct ieee80211_bss_conf *bss_conf)2475{2476const struct rtw_chip_ops *ops = rtwdev->chip->ops;2477struct ieee80211_sta *sta;2478u8 factor = 0xff;24792480if (!ops->set_ampdu_factor)2481return;24822483rcu_read_lock();24842485sta = ieee80211_find_sta(vif, bss_conf->bssid);2486if (!sta) {2487rcu_read_unlock();2488rtw_warn(rtwdev, "%s: failed to find station %pM\n",2489__func__, bss_conf->bssid);2490return;2491}24922493if (sta->deflink.vht_cap.vht_supported)2494factor = u32_get_bits(sta->deflink.vht_cap.cap,2495IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK);2496else if (sta->deflink.ht_cap.ht_supported)2497factor = sta->deflink.ht_cap.ampdu_factor;24982499rcu_read_unlock();25002501if (factor != 0xff)2502ops->set_ampdu_factor(rtwdev, factor);2503}25042505MODULE_AUTHOR("Realtek Corporation");2506MODULE_DESCRIPTION("Realtek 802.11ac wireless core module");2507MODULE_LICENSE("Dual BSD/GPL");250825092510