Path: blob/master/include/asm-generic/bitops/instrumented-lock.h
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/* SPDX-License-Identifier: GPL-2.0 */12/*3* This file provides wrappers with sanitizer instrumentation for bit4* locking operations.5*6* To use this functionality, an arch's bitops.h file needs to define each of7* the below bit operations with an arch_ prefix (e.g. arch_set_bit(),8* arch___set_bit(), etc.).9*/10#ifndef _ASM_GENERIC_BITOPS_INSTRUMENTED_LOCK_H11#define _ASM_GENERIC_BITOPS_INSTRUMENTED_LOCK_H1213#include <linux/instrumented.h>1415/**16* clear_bit_unlock - Clear a bit in memory, for unlock17* @nr: the bit to set18* @addr: the address to start counting from19*20* This operation is atomic and provides release barrier semantics.21*/22static inline void clear_bit_unlock(long nr, volatile unsigned long *addr)23{24kcsan_release();25instrument_atomic_write(addr + BIT_WORD(nr), sizeof(long));26arch_clear_bit_unlock(nr, addr);27}2829/**30* __clear_bit_unlock - Clears a bit in memory31* @nr: Bit to clear32* @addr: Address to start counting from33*34* This is a non-atomic operation but implies a release barrier before the35* memory operation. It can be used for an unlock if no other CPUs can36* concurrently modify other bits in the word.37*/38static inline void __clear_bit_unlock(long nr, volatile unsigned long *addr)39{40kcsan_release();41instrument_write(addr + BIT_WORD(nr), sizeof(long));42arch___clear_bit_unlock(nr, addr);43}4445/**46* test_and_set_bit_lock - Set a bit and return its old value, for lock47* @nr: Bit to set48* @addr: Address to count from49*50* This operation is atomic and provides acquire barrier semantics if51* the returned value is 0.52* It can be used to implement bit locks.53*/54static inline bool test_and_set_bit_lock(long nr, volatile unsigned long *addr)55{56instrument_atomic_read_write(addr + BIT_WORD(nr), sizeof(long));57return arch_test_and_set_bit_lock(nr, addr);58}5960/**61* xor_unlock_is_negative_byte - XOR a single byte in memory and test if62* it is negative, for unlock.63* @mask: Change the bits which are set in this mask.64* @addr: The address of the word containing the byte to change.65*66* Changes some of bits 0-6 in the word pointed to by @addr.67* This operation is atomic and provides release barrier semantics.68* Used to optimise some folio operations which are commonly paired69* with an unlock or end of writeback. Bit 7 is used as PG_waiters to70* indicate whether anybody is waiting for the unlock.71*72* Return: Whether the top bit of the byte is set.73*/74static inline bool xor_unlock_is_negative_byte(unsigned long mask,75volatile unsigned long *addr)76{77kcsan_release();78instrument_atomic_write(addr, sizeof(long));79return arch_xor_unlock_is_negative_byte(mask, addr);80}81#endif /* _ASM_GENERIC_BITOPS_INSTRUMENTED_LOCK_H */828384