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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/include/asm-generic/bitops/instrumented-lock.h
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* This file provides wrappers with sanitizer instrumentation for bit
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* locking operations.
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*
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* To use this functionality, an arch's bitops.h file needs to define each of
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* the below bit operations with an arch_ prefix (e.g. arch_set_bit(),
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* arch___set_bit(), etc.).
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*/
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#ifndef _ASM_GENERIC_BITOPS_INSTRUMENTED_LOCK_H
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#define _ASM_GENERIC_BITOPS_INSTRUMENTED_LOCK_H
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#include <linux/instrumented.h>
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/**
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* clear_bit_unlock - Clear a bit in memory, for unlock
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* @nr: the bit to set
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* @addr: the address to start counting from
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*
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* This operation is atomic and provides release barrier semantics.
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*/
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static inline void clear_bit_unlock(long nr, volatile unsigned long *addr)
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{
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kcsan_release();
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instrument_atomic_write(addr + BIT_WORD(nr), sizeof(long));
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arch_clear_bit_unlock(nr, addr);
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}
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/**
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* __clear_bit_unlock - Clears a bit in memory
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* @nr: Bit to clear
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* @addr: Address to start counting from
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*
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* This is a non-atomic operation but implies a release barrier before the
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* memory operation. It can be used for an unlock if no other CPUs can
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* concurrently modify other bits in the word.
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*/
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static inline void __clear_bit_unlock(long nr, volatile unsigned long *addr)
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{
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kcsan_release();
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instrument_write(addr + BIT_WORD(nr), sizeof(long));
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arch___clear_bit_unlock(nr, addr);
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}
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/**
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* test_and_set_bit_lock - Set a bit and return its old value, for lock
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This operation is atomic and provides acquire barrier semantics if
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* the returned value is 0.
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* It can be used to implement bit locks.
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*/
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static inline bool test_and_set_bit_lock(long nr, volatile unsigned long *addr)
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{
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instrument_atomic_read_write(addr + BIT_WORD(nr), sizeof(long));
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return arch_test_and_set_bit_lock(nr, addr);
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}
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/**
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* xor_unlock_is_negative_byte - XOR a single byte in memory and test if
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* it is negative, for unlock.
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* @mask: Change the bits which are set in this mask.
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* @addr: The address of the word containing the byte to change.
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*
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* Changes some of bits 0-6 in the word pointed to by @addr.
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* This operation is atomic and provides release barrier semantics.
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* Used to optimise some folio operations which are commonly paired
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* with an unlock or end of writeback. Bit 7 is used as PG_waiters to
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* indicate whether anybody is waiting for the unlock.
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*
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* Return: Whether the top bit of the byte is set.
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*/
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static inline bool xor_unlock_is_negative_byte(unsigned long mask,
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volatile unsigned long *addr)
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{
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kcsan_release();
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instrument_atomic_write(addr, sizeof(long));
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return arch_xor_unlock_is_negative_byte(mask, addr);
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}
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#endif /* _ASM_GENERIC_BITOPS_INSTRUMENTED_LOCK_H */
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