CoCalc -- amlogic,a1-peripherals-clkc.h

GitHub Repository: torvalds/linux
Path: blob/master/include/dt-bindings/clock/amlogic,a1-peripherals-clkc.h
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/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
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/*
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 * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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 * Author: Jian Hu <[email protected]>
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 *
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 * Copyright (c) 2023, SberDevices. All Rights Reserved.
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 * Author: Dmitry Rokosov <[email protected]>
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 */
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#ifndef __A1_PERIPHERALS_CLKC_H
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#define __A1_PERIPHERALS_CLKC_H
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#define CLKID_XTAL_IN		0
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#define CLKID_FIXPLL_IN		1
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#define CLKID_USB_PHY_IN	2
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#define CLKID_USB_CTRL_IN	3
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#define CLKID_HIFIPLL_IN	4
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#define CLKID_SYSPLL_IN		5
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#define CLKID_DDS_IN		6
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#define CLKID_SYS		7
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#define CLKID_CLKTREE		8
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#define CLKID_RESET_CTRL	9
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#define CLKID_ANALOG_CTRL	10
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#define CLKID_PWR_CTRL		11
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#define CLKID_PAD_CTRL		12
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#define CLKID_SYS_CTRL		13
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#define CLKID_TEMP_SENSOR	14
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#define CLKID_AM2AXI_DIV	15
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#define CLKID_SPICC_B		16
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#define CLKID_SPICC_A		17
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#define CLKID_MSR		18
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#define CLKID_AUDIO		19
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#define CLKID_JTAG_CTRL		20
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#define CLKID_SARADC_EN		21
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#define CLKID_PWM_EF		22
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#define CLKID_PWM_CD		23
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#define CLKID_PWM_AB		24
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#define CLKID_CEC		25
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#define CLKID_I2C_S		26
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#define CLKID_IR_CTRL		27
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#define CLKID_I2C_M_D		28
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#define CLKID_I2C_M_C		29
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#define CLKID_I2C_M_B		30
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#define CLKID_I2C_M_A		31
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#define CLKID_ACODEC		32
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#define CLKID_OTP		33
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#define CLKID_SD_EMMC_A		34
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#define CLKID_USB_PHY		35
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#define CLKID_USB_CTRL		36
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#define CLKID_SYS_DSPB		37
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#define CLKID_SYS_DSPA		38
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#define CLKID_DMA		39
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#define CLKID_IRQ_CTRL		40
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#define CLKID_NIC		41
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#define CLKID_GIC		42
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#define CLKID_UART_C		43
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#define CLKID_UART_B		44
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#define CLKID_UART_A		45
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#define CLKID_SYS_PSRAM		46
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#define CLKID_RSA		47
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#define CLKID_CORESIGHT		48
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#define CLKID_AM2AXI_VAD	49
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#define CLKID_AUDIO_VAD		50
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#define CLKID_AXI_DMC		51
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#define CLKID_AXI_PSRAM		52
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#define CLKID_RAMB		53
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#define CLKID_RAMA		54
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#define CLKID_AXI_SPIFC		55
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#define CLKID_AXI_NIC		56
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#define CLKID_AXI_DMA		57
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#define CLKID_CPU_CTRL		58
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#define CLKID_ROM		59
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#define CLKID_PROC_I2C		60
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#define CLKID_DSPA_SEL		61
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#define CLKID_DSPB_SEL		62
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#define CLKID_DSPA_EN		63
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#define CLKID_DSPA_EN_NIC	64
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#define CLKID_DSPB_EN		65
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#define CLKID_DSPB_EN_NIC	66
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#define CLKID_RTC		67
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#define CLKID_CECA_32K		68
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#define CLKID_CECB_32K		69
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#define CLKID_24M		70
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#define CLKID_12M		71
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#define CLKID_FCLK_DIV2_DIVN	72
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#define CLKID_GEN		73
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#define CLKID_SARADC_SEL	74
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#define CLKID_SARADC		75
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#define CLKID_PWM_A		76
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#define CLKID_PWM_B		77
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#define CLKID_PWM_C		78
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#define CLKID_PWM_D		79
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#define CLKID_PWM_E		80
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#define CLKID_PWM_F		81
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#define CLKID_SPICC		82
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#define CLKID_TS		83
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#define CLKID_SPIFC		84
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#define CLKID_USB_BUS		85
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#define CLKID_SD_EMMC		86
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#define CLKID_PSRAM		87
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#define CLKID_DMC		88
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#define CLKID_SYS_A_SEL		89
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#define CLKID_SYS_A_DIV		90
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#define CLKID_SYS_A		91
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#define CLKID_SYS_B_SEL		92
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#define CLKID_SYS_B_DIV		93
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#define CLKID_SYS_B		94
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#define CLKID_DSPA_A_SEL	95
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#define CLKID_DSPA_A_DIV	96
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#define CLKID_DSPA_A		97
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#define CLKID_DSPA_B_SEL	98
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#define CLKID_DSPA_B_DIV	99
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#define CLKID_DSPA_B		100
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#define CLKID_DSPB_A_SEL	101
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#define CLKID_DSPB_A_DIV	102
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#define CLKID_DSPB_A		103
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#define CLKID_DSPB_B_SEL	104
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#define CLKID_DSPB_B_DIV	105
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#define CLKID_DSPB_B		106
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#define CLKID_RTC_32K_IN	107
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#define CLKID_RTC_32K_DIV	108
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#define CLKID_RTC_32K_XTAL	109
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#define CLKID_RTC_32K_SEL	110
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#define CLKID_CECB_32K_IN	111
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#define CLKID_CECB_32K_DIV	112
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#define CLKID_CECB_32K_SEL_PRE	113
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#define CLKID_CECB_32K_SEL	114
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#define CLKID_CECA_32K_IN	115
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#define CLKID_CECA_32K_DIV	116
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#define CLKID_CECA_32K_SEL_PRE	117
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#define CLKID_CECA_32K_SEL	118
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#define CLKID_DIV2_PRE		119
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#define CLKID_24M_DIV2		120
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#define CLKID_GEN_SEL		121
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#define CLKID_GEN_DIV		122
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#define CLKID_SARADC_DIV	123
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#define CLKID_PWM_A_SEL		124
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#define CLKID_PWM_A_DIV		125
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#define CLKID_PWM_B_SEL		126
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#define CLKID_PWM_B_DIV		127
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#define CLKID_PWM_C_SEL		128
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#define CLKID_PWM_C_DIV		129
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#define CLKID_PWM_D_SEL		130
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#define CLKID_PWM_D_DIV		131
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#define CLKID_PWM_E_SEL		132
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#define CLKID_PWM_E_DIV		133
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#define CLKID_PWM_F_SEL		134
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#define CLKID_PWM_F_DIV		135
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#define CLKID_SPICC_SEL		136
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#define CLKID_SPICC_DIV		137
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#define CLKID_SPICC_SEL2	138
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#define CLKID_TS_DIV		139
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#define CLKID_SPIFC_SEL		140
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#define CLKID_SPIFC_DIV		141
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#define CLKID_SPIFC_SEL2	142
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#define CLKID_USB_BUS_SEL	143
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#define CLKID_USB_BUS_DIV	144
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#define CLKID_SD_EMMC_SEL	145
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#define CLKID_SD_EMMC_DIV	146
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#define CLKID_SD_EMMC_SEL2	147
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#define CLKID_PSRAM_SEL		148
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#define CLKID_PSRAM_DIV		149
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#define CLKID_PSRAM_SEL2	150
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#define CLKID_DMC_SEL		151
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#define CLKID_DMC_DIV		152
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#define CLKID_DMC_SEL2		153
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#define CLKID_SYS_PLL_DIV16	154
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#endif /* __A1_PERIPHERALS_CLKC_H */
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