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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/include/dt-bindings/clock/amlogic,s4-pll-clkc.h
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/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */

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/*

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 * Copyright (c) 2022-2023 Amlogic, Inc. All rights reserved.

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 * Author: Yu Tu <[email protected]>

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 */

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#ifndef _DT_BINDINGS_CLOCK_AMLOGIC_S4_PLL_CLKC_H

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#define _DT_BINDINGS_CLOCK_AMLOGIC_S4_PLL_CLKC_H

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#define CLKID_FIXED_PLL_DCO		0

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#define CLKID_FIXED_PLL			1

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#define CLKID_FCLK_DIV2_DIV		2

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#define CLKID_FCLK_DIV2			3

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#define CLKID_FCLK_DIV3_DIV		4

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#define CLKID_FCLK_DIV3			5

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#define CLKID_FCLK_DIV4_DIV		6

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#define CLKID_FCLK_DIV4			7

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#define CLKID_FCLK_DIV5_DIV		8

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#define CLKID_FCLK_DIV5			9

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#define CLKID_FCLK_DIV7_DIV		10

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#define CLKID_FCLK_DIV7			11

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#define CLKID_FCLK_DIV2P5_DIV		12

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#define CLKID_FCLK_DIV2P5		13

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#define CLKID_GP0_PLL_DCO		14

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#define CLKID_GP0_PLL			15

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#define CLKID_HIFI_PLL_DCO		16

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#define CLKID_HIFI_PLL			17

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#define CLKID_HDMI_PLL_DCO		18

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#define CLKID_HDMI_PLL_OD		19

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#define CLKID_HDMI_PLL			20

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#define CLKID_MPLL_50M_DIV		21

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#define CLKID_MPLL_50M			22

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#define CLKID_MPLL_PREDIV		23

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#define CLKID_MPLL0_DIV			24

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#define CLKID_MPLL0			25

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#define CLKID_MPLL1_DIV			26

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#define CLKID_MPLL1			27

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#define CLKID_MPLL2_DIV			28

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#define CLKID_MPLL2			29

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#define CLKID_MPLL3_DIV			30

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#define CLKID_MPLL3			31

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#endif /* _DT_BINDINGS_CLOCK_AMLOGIC_S4_PLL_CLKC_H */

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