CoCalc -- amlogic,t7-peripherals-clkc.h

GitHub Repository: torvalds/linux
Path: blob/master/include/dt-bindings/clock/amlogic,t7-peripherals-clkc.h
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/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
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/*
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 * Copyright (C) 2024-2025 Amlogic, Inc. All rights reserved
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 */
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#ifndef __T7_PERIPHERALS_CLKC_H
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#define __T7_PERIPHERALS_CLKC_H
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#define CLKID_RTC_DUALDIV_IN		0
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#define CLKID_RTC_DUALDIV_DIV		1
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#define CLKID_RTC_DUALDIV_SEL		2
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#define CLKID_RTC_DUALDIV		3
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#define CLKID_RTC			4
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#define CLKID_CECA_DUALDIV_IN		5
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#define CLKID_CECA_DUALDIV_DIV		6
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#define CLKID_CECA_DUALDIV_SEL		7
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#define CLKID_CECA_DUALDIV		8
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#define CLKID_CECA			9
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#define CLKID_CECB_DUALDIV_IN		10
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#define CLKID_CECB_DUALDIV_DIV		11
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#define CLKID_CECB_DUALDIV_SEL		12
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#define CLKID_CECB_DUALDIV		13
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#define CLKID_CECB			14
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#define CLKID_SC_SEL			15
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#define CLKID_SC_DIV			16
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#define CLKID_SC			17
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#define CLKID_DSPA_0_SEL		18
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#define CLKID_DSPA_0_DIV		19
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#define CLKID_DSPA_0			20
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#define CLKID_DSPA_1_SEL		21
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#define CLKID_DSPA_1_DIV		22
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#define CLKID_DSPA_1			23
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#define CLKID_DSPA			24
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#define CLKID_DSPB_0_SEL		25
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#define CLKID_DSPB_0_DIV		26
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#define CLKID_DSPB_0			27
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#define CLKID_DSPB_1_SEL		28
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#define CLKID_DSPB_1_DIV		29
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#define CLKID_DSPB_1			30
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#define CLKID_DSPB			31
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#define CLKID_24M			32
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#define CLKID_24M_DIV2			33
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#define CLKID_12M			34
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#define CLKID_25M_DIV			35
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#define CLKID_25M			36
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#define CLKID_ANAKIN_0_SEL		37
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#define CLKID_ANAKIN_0_DIV		38
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#define CLKID_ANAKIN_0			39
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#define CLKID_ANAKIN_1_SEL		40
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#define CLKID_ANAKIN_1_DIV		41
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#define CLKID_ANAKIN_1			42
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#define CLKID_ANAKIN_01_SEL		43
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#define CLKID_ANAKIN			44
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#define CLKID_TS_DIV			45
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#define CLKID_TS			46
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#define CLKID_MIPI_CSI_PHY_0_SEL	47
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#define CLKID_MIPI_CSI_PHY_0_DIV	48
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#define CLKID_MIPI_CSI_PHY_0		49
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#define CLKID_MIPI_CSI_PHY_1_SEL	50
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#define CLKID_MIPI_CSI_PHY_1_DIV	51
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#define CLKID_MIPI_CSI_PHY_1		52
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#define CLKID_MIPI_CSI_PHY		53
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#define CLKID_MIPI_ISP_SEL		54
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#define CLKID_MIPI_ISP_DIV		55
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#define CLKID_MIPI_ISP			56
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#define CLKID_MALI_0_SEL		57
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#define CLKID_MALI_0_DIV		58
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#define CLKID_MALI_0			59
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#define CLKID_MALI_1_SEL		60
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#define CLKID_MALI_1_DIV		61
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#define CLKID_MALI_1			62
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#define CLKID_MALI			63
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#define CLKID_ETH_RMII_SEL		64
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#define CLKID_ETH_RMII_DIV		65
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#define CLKID_ETH_RMII			66
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#define CLKID_FCLK_DIV2_DIV8		67
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#define CLKID_ETH_125M			68
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#define CLKID_SD_EMMC_A_SEL		69
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#define CLKID_SD_EMMC_A_DIV		70
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#define CLKID_SD_EMMC_A			71
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#define CLKID_SD_EMMC_B_SEL		72
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#define CLKID_SD_EMMC_B_DIV		73
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#define CLKID_SD_EMMC_B			74
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#define CLKID_SD_EMMC_C_SEL		75
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#define CLKID_SD_EMMC_C_DIV		76
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#define CLKID_SD_EMMC_C			77
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#define CLKID_SPICC0_SEL		78
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#define CLKID_SPICC0_DIV		79
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#define CLKID_SPICC0			80
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#define CLKID_SPICC1_SEL		81
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#define CLKID_SPICC1_DIV		82
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#define CLKID_SPICC1			83
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#define CLKID_SPICC2_SEL		84
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#define CLKID_SPICC2_DIV		85
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#define CLKID_SPICC2			86
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#define CLKID_SPICC3_SEL		87
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#define CLKID_SPICC3_DIV		88
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#define CLKID_SPICC3			89
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#define CLKID_SPICC4_SEL		90
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#define CLKID_SPICC4_DIV		91
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#define CLKID_SPICC4			92
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#define CLKID_SPICC5_SEL		93
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#define CLKID_SPICC5_DIV		94
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#define CLKID_SPICC5			95
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#define CLKID_SARADC_SEL		96
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#define CLKID_SARADC_DIV		97
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#define CLKID_SARADC			98
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#define CLKID_PWM_A_SEL			99
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#define CLKID_PWM_A_DIV			100
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#define CLKID_PWM_A			101
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#define CLKID_PWM_B_SEL			102
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#define CLKID_PWM_B_DIV			103
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#define CLKID_PWM_B			104
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#define CLKID_PWM_C_SEL			105
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#define CLKID_PWM_C_DIV			106
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#define CLKID_PWM_C			107
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#define CLKID_PWM_D_SEL			108
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#define CLKID_PWM_D_DIV			109
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#define CLKID_PWM_D			110
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#define CLKID_PWM_E_SEL			111
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#define CLKID_PWM_E_DIV			112
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#define CLKID_PWM_E			113
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#define CLKID_PWM_F_SEL			114
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#define CLKID_PWM_F_DIV			115
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#define CLKID_PWM_F			116
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#define CLKID_PWM_AO_A_SEL		117
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#define CLKID_PWM_AO_A_DIV		118
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#define CLKID_PWM_AO_A			119
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#define CLKID_PWM_AO_B_SEL		120
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#define CLKID_PWM_AO_B_DIV		121
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#define CLKID_PWM_AO_B			122
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#define CLKID_PWM_AO_C_SEL		123
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#define CLKID_PWM_AO_C_DIV		124
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#define CLKID_PWM_AO_C			125
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#define CLKID_PWM_AO_D_SEL		126
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#define CLKID_PWM_AO_D_DIV		127
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#define CLKID_PWM_AO_D			128
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#define CLKID_PWM_AO_E_SEL		129
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#define CLKID_PWM_AO_E_DIV		130
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#define CLKID_PWM_AO_E			131
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#define CLKID_PWM_AO_F_SEL		132
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#define CLKID_PWM_AO_F_DIV		133
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#define CLKID_PWM_AO_F			134
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#define CLKID_PWM_AO_G_SEL		135
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#define CLKID_PWM_AO_G_DIV		136
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#define CLKID_PWM_AO_G			137
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#define CLKID_PWM_AO_H_SEL		138
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#define CLKID_PWM_AO_H_DIV		139
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#define CLKID_PWM_AO_H			140
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#define CLKID_SYS_DDR			141
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#define CLKID_SYS_DOS			142
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#define CLKID_SYS_MIPI_DSI_A		143
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#define CLKID_SYS_MIPI_DSI_B		144
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#define CLKID_SYS_ETHPHY		145
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#define CLKID_SYS_MALI			146
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#define CLKID_SYS_AOCPU			147
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#define CLKID_SYS_AUCPU			148
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#define CLKID_SYS_CEC			149
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#define CLKID_SYS_GDC			150
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#define CLKID_SYS_DESWARP		151
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#define CLKID_SYS_AMPIPE_NAND		152
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#define CLKID_SYS_AMPIPE_ETH		153
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#define CLKID_SYS_AM2AXI0		154
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#define CLKID_SYS_AM2AXI1		155
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#define CLKID_SYS_AM2AXI2		156
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#define CLKID_SYS_SD_EMMC_A		157
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#define CLKID_SYS_SD_EMMC_B		158
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#define CLKID_SYS_SD_EMMC_C		159
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#define CLKID_SYS_SMARTCARD		160
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#define CLKID_SYS_ACODEC		161
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#define CLKID_SYS_SPIFC			162
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#define CLKID_SYS_MSR_CLK		163
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#define CLKID_SYS_IR_CTRL		164
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#define CLKID_SYS_AUDIO			165
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#define CLKID_SYS_ETH			166
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#define CLKID_SYS_UART_A		167
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#define CLKID_SYS_UART_B		168
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#define CLKID_SYS_UART_C		169
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#define CLKID_SYS_UART_D		170
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#define CLKID_SYS_UART_E		171
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#define CLKID_SYS_UART_F		172
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#define CLKID_SYS_AIFIFO		173
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#define CLKID_SYS_SPICC2		174
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#define CLKID_SYS_SPICC3		175
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#define CLKID_SYS_SPICC4		176
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#define CLKID_SYS_TS_A73		177
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#define CLKID_SYS_TS_A53		178
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#define CLKID_SYS_SPICC5		179
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#define CLKID_SYS_G2D			180
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#define CLKID_SYS_SPICC0		181
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#define CLKID_SYS_SPICC1		182
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#define CLKID_SYS_PCIE			183
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#define CLKID_SYS_USB			184
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#define CLKID_SYS_PCIE_PHY		185
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#define CLKID_SYS_I2C_AO_A		186
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#define CLKID_SYS_I2C_AO_B		187
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#define CLKID_SYS_I2C_M_A		188
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#define CLKID_SYS_I2C_M_B		189
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#define CLKID_SYS_I2C_M_C		190
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#define CLKID_SYS_I2C_M_D		191
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#define CLKID_SYS_I2C_M_E		192
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#define CLKID_SYS_I2C_M_F		193
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#define CLKID_SYS_HDMITX_APB		194
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#define CLKID_SYS_I2C_S_A		195
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#define CLKID_SYS_HDMIRX_PCLK		196
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#define CLKID_SYS_MMC_APB		197
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#define CLKID_SYS_MIPI_ISP_PCLK		198
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#define CLKID_SYS_RSA			199
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#define CLKID_SYS_PCLK_SYS_APB		200
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#define CLKID_SYS_A73PCLK_APB		201
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#define CLKID_SYS_DSPA			202
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#define CLKID_SYS_DSPB			203
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#define CLKID_SYS_VPU_INTR		204
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#define CLKID_SYS_SAR_ADC		205
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#define CLKID_SYS_GIC			206
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#define CLKID_SYS_TS_GPU		207
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#define CLKID_SYS_TS_NNA		208
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#define CLKID_SYS_TS_VPU		209
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#define CLKID_SYS_TS_HEVC		210
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#define CLKID_SYS_PWM_AB		211
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#define CLKID_SYS_PWM_CD		212
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#define CLKID_SYS_PWM_EF		213
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#define CLKID_SYS_PWM_AO_AB		214
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#define CLKID_SYS_PWM_AO_CD		215
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#define CLKID_SYS_PWM_AO_EF		216
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#define CLKID_SYS_PWM_AO_GH		217
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#endif /* __T7_PERIPHERALS_CLKC_H */
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