/*1* BSD LICENSE2*3* Copyright(c) 2015 Broadcom Corporation. All rights reserved.4*5* Redistribution and use in source and binary forms, with or without6* modification, are permitted provided that the following conditions7* are met:8*9* * Redistributions of source code must retain the above copyright10* notice, this list of conditions and the following disclaimer.11* * Redistributions in binary form must reproduce the above copyright12* notice, this list of conditions and the following disclaimer in13* the documentation and/or other materials provided with the14* distribution.15* * Neither the name of Broadcom Corporation nor the names of its16* contributors may be used to endorse or promote products derived17* from this software without specific prior written permission.18*19* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS20* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT21* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR22* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT23* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,24* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT25* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,26* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY27* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT28* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE29* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.30*/3132#ifndef _CLOCK_BCM_NS2_H33#define _CLOCK_BCM_NS2_H3435/* GENPLL SCR clock channel ID */36#define BCM_NS2_GENPLL_SCR 037#define BCM_NS2_GENPLL_SCR_SCR_CLK 138#define BCM_NS2_GENPLL_SCR_FS_CLK 239#define BCM_NS2_GENPLL_SCR_AUDIO_CLK 340#define BCM_NS2_GENPLL_SCR_CH3_UNUSED 441#define BCM_NS2_GENPLL_SCR_CH4_UNUSED 542#define BCM_NS2_GENPLL_SCR_CH5_UNUSED 64344/* GENPLL SW clock channel ID */45#define BCM_NS2_GENPLL_SW 046#define BCM_NS2_GENPLL_SW_RPE_CLK 147#define BCM_NS2_GENPLL_SW_250_CLK 248#define BCM_NS2_GENPLL_SW_NIC_CLK 349#define BCM_NS2_GENPLL_SW_CHIMP_CLK 450#define BCM_NS2_GENPLL_SW_PORT_CLK 551#define BCM_NS2_GENPLL_SW_SDIO_CLK 65253/* LCPLL DDR clock channel ID */54#define BCM_NS2_LCPLL_DDR 055#define BCM_NS2_LCPLL_DDR_PCIE_SATA_USB_CLK 156#define BCM_NS2_LCPLL_DDR_DDR_CLK 257#define BCM_NS2_LCPLL_DDR_CH2_UNUSED 358#define BCM_NS2_LCPLL_DDR_CH3_UNUSED 459#define BCM_NS2_LCPLL_DDR_CH4_UNUSED 560#define BCM_NS2_LCPLL_DDR_CH5_UNUSED 66162/* LCPLL PORTS clock channel ID */63#define BCM_NS2_LCPLL_PORTS 064#define BCM_NS2_LCPLL_PORTS_WAN_CLK 165#define BCM_NS2_LCPLL_PORTS_RGMII_CLK 266#define BCM_NS2_LCPLL_PORTS_CH2_UNUSED 367#define BCM_NS2_LCPLL_PORTS_CH3_UNUSED 468#define BCM_NS2_LCPLL_PORTS_CH4_UNUSED 569#define BCM_NS2_LCPLL_PORTS_CH5_UNUSED 67071#endif /* _CLOCK_BCM_NS2_H */727374