/*1* BSD LICENSE2*3* Copyright(c) 2015 Broadcom Corporation. All rights reserved.4*5* Redistribution and use in source and binary forms, with or without6* modification, are permitted provided that the following conditions7* are met:8*9* * Redistributions of source code must retain the above copyright10* notice, this list of conditions and the following disclaimer.11* * Redistributions in binary form must reproduce the above copyright12* notice, this list of conditions and the following disclaimer in13* the documentation and/or other materials provided with the14* distribution.15* * Neither the name of Broadcom Corporation nor the names of its16* contributors may be used to endorse or promote products derived17* from this software without specific prior written permission.18*19* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS20* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT21* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR22* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT23* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,24* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT25* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,26* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY27* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT28* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE29* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.30*/3132#ifndef _CLOCK_BCM_NSP_H33#define _CLOCK_BCM_NSP_H3435/* GENPLL clock channel ID */36#define BCM_NSP_GENPLL 037#define BCM_NSP_GENPLL_PHY_CLK 138#define BCM_NSP_GENPLL_ENET_SW_CLK 239#define BCM_NSP_GENPLL_USB_PHY_REF_CLK 340#define BCM_NSP_GENPLL_IPROCFAST_CLK 441#define BCM_NSP_GENPLL_SATA1_CLK 542#define BCM_NSP_GENPLL_SATA2_CLK 64344/* LCPLL0 clock channel ID */45#define BCM_NSP_LCPLL0 046#define BCM_NSP_LCPLL0_PCIE_PHY_REF_CLK 147#define BCM_NSP_LCPLL0_SDIO_CLK 248#define BCM_NSP_LCPLL0_DDR_PHY_CLK 34950#endif /* _CLOCK_BCM_NSP_H */515253