CoCalc -- bm1880-clock.h

GitHub Repository: torvalds/linux
Path: blob/master/include/dt-bindings/clock/bm1880-clock.h
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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 * Device Tree binding constants for Bitmain BM1880 SoC
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 *
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 * Copyright (c) 2019 Linaro Ltd.
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 */
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#ifndef __DT_BINDINGS_CLOCK_BM1880_H
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#define __DT_BINDINGS_CLOCK_BM1880_H
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#define BM1880_CLK_OSC			0
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#define BM1880_CLK_MPLL			1
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#define BM1880_CLK_SPLL			2
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#define BM1880_CLK_FPLL			3
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#define BM1880_CLK_DDRPLL		4
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#define BM1880_CLK_A53			5
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#define BM1880_CLK_50M_A53		6
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#define BM1880_CLK_AHB_ROM		7
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#define BM1880_CLK_AXI_SRAM		8
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#define BM1880_CLK_DDR_AXI		9
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#define BM1880_CLK_EFUSE		10
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#define BM1880_CLK_APB_EFUSE		11
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#define BM1880_CLK_AXI5_EMMC		12
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#define BM1880_CLK_EMMC			13
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#define BM1880_CLK_100K_EMMC		14
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#define BM1880_CLK_AXI5_SD		15
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#define BM1880_CLK_SD			16
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#define BM1880_CLK_100K_SD		17
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#define BM1880_CLK_500M_ETH0		18
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#define BM1880_CLK_AXI4_ETH0		19
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#define BM1880_CLK_500M_ETH1		20
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#define BM1880_CLK_AXI4_ETH1		21
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#define BM1880_CLK_AXI1_GDMA		22
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#define BM1880_CLK_APB_GPIO		23
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#define BM1880_CLK_APB_GPIO_INTR	24
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#define BM1880_CLK_GPIO_DB		25
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#define BM1880_CLK_AXI1_MINER		26
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#define BM1880_CLK_AHB_SF		27
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#define BM1880_CLK_SDMA_AXI		28
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#define BM1880_CLK_SDMA_AUD		29
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#define BM1880_CLK_APB_I2C		30
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#define BM1880_CLK_APB_WDT		31
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#define BM1880_CLK_APB_JPEG		32
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#define BM1880_CLK_JPEG_AXI		33
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#define BM1880_CLK_AXI5_NF		34
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#define BM1880_CLK_APB_NF		35
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#define BM1880_CLK_NF			36
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#define BM1880_CLK_APB_PWM		37
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#define BM1880_CLK_DIV_0_RV		38
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#define BM1880_CLK_DIV_1_RV		39
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#define BM1880_CLK_MUX_RV		40
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#define BM1880_CLK_RV			41
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#define BM1880_CLK_APB_SPI		42
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#define BM1880_CLK_TPU_AXI		43
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#define BM1880_CLK_DIV_UART_500M	44
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#define BM1880_CLK_UART_500M		45
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#define BM1880_CLK_APB_UART		46
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#define BM1880_CLK_APB_I2S		47
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#define BM1880_CLK_AXI4_USB		48
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#define BM1880_CLK_APB_USB		49
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#define BM1880_CLK_125M_USB		50
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#define BM1880_CLK_33K_USB		51
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#define BM1880_CLK_DIV_12M_USB		52
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#define BM1880_CLK_12M_USB		53
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#define BM1880_CLK_APB_VIDEO		54
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#define BM1880_CLK_VIDEO_AXI		55
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#define BM1880_CLK_VPP_AXI		56
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#define BM1880_CLK_APB_VPP		57
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#define BM1880_CLK_DIV_0_AXI1		58
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#define BM1880_CLK_DIV_1_AXI1		59
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#define BM1880_CLK_AXI1			60
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#define BM1880_CLK_AXI2			61
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#define BM1880_CLK_AXI3			62
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#define BM1880_CLK_AXI4			63
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#define BM1880_CLK_AXI5			64
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#define BM1880_CLK_DIV_0_AXI6		65
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#define BM1880_CLK_DIV_1_AXI6		66
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#define BM1880_CLK_MUX_AXI6		67
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#define BM1880_CLK_AXI6			68
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#define BM1880_NR_CLKS			69
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#endif /* __DT_BINDINGS_CLOCK_BM1880_H */
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