CoCalc -- qcom,sm8450.h

GitHub Repository: torvalds/linux
Path: blob/master/include/dt-bindings/interconnect/qcom,sm8450.h
²⁶²⁸⁵ views
1
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2
/*
3
 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
4
 * Copyright (c) 2021, Linaro Limited
5
 */
6

7
#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM8450_H
8
#define __DT_BINDINGS_INTERCONNECT_QCOM_SM8450_H
9

10
#define MASTER_QSPI_0				0
11
#define MASTER_QUP_1				1
12
#define MASTER_A1NOC_CFG			2
13
#define MASTER_SDCC_4				3
14
#define MASTER_UFS_MEM				4
15
#define MASTER_USB3_0				5
16
#define SLAVE_A1NOC_SNOC			6
17
#define SLAVE_SERVICE_A1NOC			7
18

19
#define	MASTER_QDSS_BAM				0
20
#define	MASTER_QUP_0				1
21
#define	MASTER_QUP_2				2
22
#define	MASTER_A2NOC_CFG			3
23
#define	MASTER_CRYPTO				4
24
#define	MASTER_IPA				5
25
#define	MASTER_SENSORS_PROC			6
26
#define	MASTER_SP				7
27
#define	MASTER_QDSS_ETR				8
28
#define	MASTER_QDSS_ETR_1			9
29
#define	MASTER_SDCC_2				10
30
#define	SLAVE_A2NOC_SNOC			11
31
#define	SLAVE_SERVICE_A2NOC			12
32

33
#define MASTER_QUP_CORE_0			0
34
#define MASTER_QUP_CORE_1			1
35
#define MASTER_QUP_CORE_2			2
36
#define SLAVE_QUP_CORE_0			3
37
#define SLAVE_QUP_CORE_1			4
38
#define SLAVE_QUP_CORE_2			5
39

40
#define	MASTER_GEM_NOC_CNOC			0
41
#define	MASTER_GEM_NOC_PCIE_SNOC		1
42
#define	SLAVE_AHB2PHY_SOUTH			2
43
#define	SLAVE_AHB2PHY_NORTH			3
44
#define	SLAVE_AOSS			        4
45
#define	SLAVE_CAMERA_CFG			5
46
#define	SLAVE_CLK_CTL			        6
47
#define	SLAVE_CDSP_CFG			        7
48
#define	SLAVE_RBCPR_CX_CFG			8
49
#define	SLAVE_RBCPR_MMCX_CFG			9
50
#define	SLAVE_RBCPR_MXA_CFG			10
51
#define	SLAVE_RBCPR_MXC_CFG			11
52
#define	SLAVE_CRYPTO_0_CFG			12
53
#define	SLAVE_CX_RDPM				13
54
#define	SLAVE_DISPLAY_CFG			14
55
#define	SLAVE_GFX3D_CFG			        15
56
#define	SLAVE_IMEM_CFG			        16
57
#define	SLAVE_IPA_CFG			        17
58
#define	SLAVE_IPC_ROUTER_CFG			18
59
#define	SLAVE_LPASS			        19
60
#define	SLAVE_CNOC_MSS			        20
61
#define	SLAVE_MX_RDPM				21
62
#define	SLAVE_PCIE_0_CFG			22
63
#define	SLAVE_PCIE_1_CFG			23
64
#define	SLAVE_PDM				24
65
#define	SLAVE_PIMEM_CFG				25
66
#define	SLAVE_PRNG				26
67
#define	SLAVE_QDSS_CFG				27
68
#define	SLAVE_QSPI_0				28
69
#define	SLAVE_QUP_0				29
70
#define	SLAVE_QUP_1				30
71
#define	SLAVE_QUP_2				31
72
#define	SLAVE_SDCC_2				32
73
#define	SLAVE_SDCC_4				33
74
#define	SLAVE_SPSS_CFG				34
75
#define	SLAVE_TCSR				35
76
#define	SLAVE_TLMM				36
77
#define	SLAVE_TME_CFG				37
78
#define	SLAVE_UFS_MEM_CFG			38
79
#define	SLAVE_USB3_0				39
80
#define	SLAVE_VENUS_CFG				40
81
#define	SLAVE_VSENSE_CTRL_CFG			41
82
#define	SLAVE_A1NOC_CFG				42
83
#define	SLAVE_A2NOC_CFG				43
84
#define	SLAVE_DDRSS_CFG				44
85
#define	SLAVE_CNOC_MNOC_CFG			45
86
#define	SLAVE_PCIE_ANOC_CFG			46
87
#define	SLAVE_SNOC_CFG				47
88
#define	SLAVE_IMEM				48
89
#define	SLAVE_PIMEM				49
90
#define	SLAVE_SERVICE_CNOC			50
91
#define	SLAVE_PCIE_0				51
92
#define	SLAVE_PCIE_1				52
93
#define	SLAVE_QDSS_STM				53
94
#define	SLAVE_TCU				54
95

96
#define MASTER_GPU_TCU				0
97
#define MASTER_SYS_TCU				1
98
#define MASTER_APPSS_PROC			2
99
#define MASTER_GFX3D				3
100
#define MASTER_MSS_PROC				4
101
#define MASTER_MNOC_HF_MEM_NOC			5
102
#define MASTER_MNOC_SF_MEM_NOC			6
103
#define MASTER_COMPUTE_NOC			7
104
#define MASTER_ANOC_PCIE_GEM_NOC		8
105
#define MASTER_SNOC_GC_MEM_NOC			9
106
#define MASTER_SNOC_SF_MEM_NOC			10
107
#define SLAVE_GEM_NOC_CNOC			11
108
#define SLAVE_LLCC				12
109
#define SLAVE_MEM_NOC_PCIE_SNOC			13
110
#define MASTER_MNOC_HF_MEM_NOC_DISP		14
111
#define MASTER_MNOC_SF_MEM_NOC_DISP		15
112
#define MASTER_ANOC_PCIE_GEM_NOC_DISP		16
113
#define SLAVE_LLCC_DISP				17
114

115
#define MASTER_CNOC_LPASS_AG_NOC		0
116
#define MASTER_LPASS_PROC			1
117
#define SLAVE_LPASS_CORE_CFG			2
118
#define SLAVE_LPASS_LPI_CFG			3
119
#define SLAVE_LPASS_MPU_CFG			4
120
#define SLAVE_LPASS_TOP_CFG			5
121
#define SLAVE_LPASS_SNOC			6
122
#define SLAVE_SERVICES_LPASS_AML_NOC		7
123
#define SLAVE_SERVICE_LPASS_AG_NOC		8
124

125
#define MASTER_LLCC				0
126
#define SLAVE_EBI1				1
127
#define MASTER_LLCC_DISP			2
128
#define SLAVE_EBI1_DISP				3
129

130
#define MASTER_CAMNOC_HF			0
131
#define MASTER_CAMNOC_ICP			1
132
#define MASTER_CAMNOC_SF			2
133
#define MASTER_MDP				3
134
#define MASTER_CNOC_MNOC_CFG			4
135
#define MASTER_ROTATOR				5
136
#define MASTER_CDSP_HCP				6
137
#define MASTER_VIDEO				7
138
#define MASTER_VIDEO_CV_PROC			8
139
#define MASTER_VIDEO_PROC			9
140
#define MASTER_VIDEO_V_PROC			10
141
#define SLAVE_MNOC_HF_MEM_NOC			11
142
#define SLAVE_MNOC_SF_MEM_NOC			12
143
#define SLAVE_SERVICE_MNOC			13
144
#define MASTER_MDP_DISP				14
145
#define MASTER_ROTATOR_DISP			15
146
#define SLAVE_MNOC_HF_MEM_NOC_DISP		16
147
#define SLAVE_MNOC_SF_MEM_NOC_DISP		17
148

149
#define MASTER_CDSP_NOC_CFG			0
150
#define MASTER_CDSP_PROC			1
151
#define SLAVE_CDSP_MEM_NOC			2
152
#define SLAVE_SERVICE_NSP_NOC			3
153

154
#define MASTER_PCIE_ANOC_CFG			0
155
#define MASTER_PCIE_0				1
156
#define MASTER_PCIE_1				2
157
#define SLAVE_ANOC_PCIE_GEM_NOC			3
158
#define SLAVE_SERVICE_PCIE_ANOC			4
159

160
#define MASTER_GIC_AHB				0
161
#define MASTER_A1NOC_SNOC			1
162
#define MASTER_A2NOC_SNOC			2
163
#define MASTER_LPASS_ANOC			3
164
#define MASTER_SNOC_CFG				4
165
#define MASTER_PIMEM				5
166
#define MASTER_GIC				6
167
#define SLAVE_SNOC_GEM_NOC_GC			7
168
#define SLAVE_SNOC_GEM_NOC_SF			8
169
#define SLAVE_SERVICE_SNOC			9
170

171
#endif
172

173
Product

Resources

Company
