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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/include/dt-bindings/power/mediatek,mt8196-power.h
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/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */

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/*

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 * Copyright (c) 2025 Collabora Ltd

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 *                    AngeloGioacchino Del Regno <[email protected]>

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 */

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#ifndef _DT_BINDINGS_POWER_MT8196_POWER_H

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#define _DT_BINDINGS_POWER_MT8196_POWER_H

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/* SCPSYS Secure Power Manager - Direct Control */

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#define MT8196_POWER_DOMAIN_MD				0

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#define MT8196_POWER_DOMAIN_CONN			1

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#define MT8196_POWER_DOMAIN_SSUSB_P0			2

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#define MT8196_POWER_DOMAIN_SSUSB_DP_PHY_P0		3

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#define MT8196_POWER_DOMAIN_SSUSB_P1			4

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#define MT8196_POWER_DOMAIN_SSUSB_P23			5

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#define MT8196_POWER_DOMAIN_SSUSB_PHY_P2		6

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#define MT8196_POWER_DOMAIN_PEXTP_MAC0			7

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#define MT8196_POWER_DOMAIN_PEXTP_MAC1			8

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#define MT8196_POWER_DOMAIN_PEXTP_MAC2			9

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#define MT8196_POWER_DOMAIN_PEXTP_PHY0			10

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#define MT8196_POWER_DOMAIN_PEXTP_PHY1			11

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#define MT8196_POWER_DOMAIN_PEXTP_PHY2			12

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#define MT8196_POWER_DOMAIN_AUDIO			13

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#define MT8196_POWER_DOMAIN_ADSP_TOP_DORMANT		14

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#define MT8196_POWER_DOMAIN_ADSP_INFRA			15

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#define MT8196_POWER_DOMAIN_ADSP_AO			16

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/* SCPSYS Secure Power Manager - HW Voter */

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#define MT8196_POWER_DOMAIN_MM_PROC_DORMANT		0

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#define MT8196_POWER_DOMAIN_SSR				1

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/* HFRPSYS MultiMedia Power Control (MMPC) - HW Voter */

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#define MT8196_POWER_DOMAIN_VDE0			0

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#define MT8196_POWER_DOMAIN_VDE1			1

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#define MT8196_POWER_DOMAIN_VDE_VCORE0			2

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#define MT8196_POWER_DOMAIN_VEN0			3

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#define MT8196_POWER_DOMAIN_VEN1			4

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#define MT8196_POWER_DOMAIN_VEN2			5

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#define MT8196_POWER_DOMAIN_DISP_VCORE			6

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#define MT8196_POWER_DOMAIN_DIS0_DORMANT		7

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#define MT8196_POWER_DOMAIN_DIS1_DORMANT		8

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#define MT8196_POWER_DOMAIN_OVL0_DORMANT		9

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#define MT8196_POWER_DOMAIN_OVL1_DORMANT		10

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#define MT8196_POWER_DOMAIN_DISP_EDPTX_DORMANT		11

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#define MT8196_POWER_DOMAIN_DISP_DPTX_DORMANT		12

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#define MT8196_POWER_DOMAIN_MML0_SHUTDOWN		13

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#define MT8196_POWER_DOMAIN_MML1_SHUTDOWN		14

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#define MT8196_POWER_DOMAIN_MM_INFRA0			15

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#define MT8196_POWER_DOMAIN_MM_INFRA1			16

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#define MT8196_POWER_DOMAIN_MM_INFRA_AO			17

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#define MT8196_POWER_DOMAIN_CSI_BS_RX			18

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#define MT8196_POWER_DOMAIN_CSI_LS_RX			19

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#define MT8196_POWER_DOMAIN_DSI_PHY0			20

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#define MT8196_POWER_DOMAIN_DSI_PHY1			21

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#define MT8196_POWER_DOMAIN_DSI_PHY2			22

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#endif /* _DT_BINDINGS_POWER_MT8196_POWER_H */

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