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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/include/dt-bindings/reset/hisi,hi6220-resets.h
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/* SPDX-License-Identifier: GPL-2.0 */

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/**

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 * This header provides index for the reset controller

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 * based on hi6220 SoC.

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 */

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#ifndef _DT_BINDINGS_RESET_CONTROLLER_HI6220

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#define _DT_BINDINGS_RESET_CONTROLLER_HI6220

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#define PERIPH_RSTDIS0_MMC0             0x000

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#define PERIPH_RSTDIS0_MMC1             0x001

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#define PERIPH_RSTDIS0_MMC2             0x002

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#define PERIPH_RSTDIS0_NANDC            0x003

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#define PERIPH_RSTDIS0_USBOTG_BUS       0x004

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#define PERIPH_RSTDIS0_POR_PICOPHY      0x005

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#define PERIPH_RSTDIS0_USBOTG           0x006

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#define PERIPH_RSTDIS0_USBOTG_32K       0x007

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#define PERIPH_RSTDIS1_HIFI             0x100

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#define PERIPH_RSTDIS1_DIGACODEC        0x105

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#define PERIPH_RSTEN2_IPF               0x200

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#define PERIPH_RSTEN2_SOCP              0x201

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#define PERIPH_RSTEN2_DMAC              0x202

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#define PERIPH_RSTEN2_SECENG            0x203

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#define PERIPH_RSTEN2_ABB               0x204

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#define PERIPH_RSTEN2_HPM0              0x205

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#define PERIPH_RSTEN2_HPM1              0x206

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#define PERIPH_RSTEN2_HPM2              0x207

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#define PERIPH_RSTEN2_HPM3              0x208

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#define PERIPH_RSTEN3_CSSYS             0x300

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#define PERIPH_RSTEN3_I2C0              0x301

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#define PERIPH_RSTEN3_I2C1              0x302

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#define PERIPH_RSTEN3_I2C2              0x303

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#define PERIPH_RSTEN3_I2C3              0x304

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#define PERIPH_RSTEN3_UART1             0x305

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#define PERIPH_RSTEN3_UART2             0x306

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#define PERIPH_RSTEN3_UART3             0x307

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#define PERIPH_RSTEN3_UART4             0x308

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#define PERIPH_RSTEN3_SSP               0x309

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#define PERIPH_RSTEN3_PWM               0x30a

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#define PERIPH_RSTEN3_BLPWM             0x30b

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#define PERIPH_RSTEN3_TSENSOR           0x30c

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#define PERIPH_RSTEN3_DAPB              0x312

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#define PERIPH_RSTEN3_HKADC             0x313

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#define PERIPH_RSTEN3_CODEC_SSI         0x314

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#define PERIPH_RSTEN3_PMUSSI1           0x316

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#define PERIPH_RSTEN8_RS0               0x400

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#define PERIPH_RSTEN8_RS2               0x401

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#define PERIPH_RSTEN8_RS3               0x402

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#define PERIPH_RSTEN8_MS0               0x403

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#define PERIPH_RSTEN8_MS2               0x405

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#define PERIPH_RSTEN8_XG2RAM0           0x406

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#define PERIPH_RSTEN8_X2SRAM_TZMA       0x407

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#define PERIPH_RSTEN8_SRAM              0x408

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#define PERIPH_RSTEN8_HARQ              0x40a

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#define PERIPH_RSTEN8_DDRC              0x40c

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#define PERIPH_RSTEN8_DDRC_APB          0x40d

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#define PERIPH_RSTEN8_DDRPACK_APB       0x40e

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#define PERIPH_RSTEN8_DDRT              0x411

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#define PERIPH_RSDIST9_CARM_DAP         0x500

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#define PERIPH_RSDIST9_CARM_ATB         0x501

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#define PERIPH_RSDIST9_CARM_LBUS        0x502

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#define PERIPH_RSDIST9_CARM_POR         0x503

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#define PERIPH_RSDIST9_CARM_CORE        0x504

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#define PERIPH_RSDIST9_CARM_DBG         0x505

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#define PERIPH_RSDIST9_CARM_L2          0x506

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#define PERIPH_RSDIST9_CARM_SOCDBG      0x507

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#define PERIPH_RSDIST9_CARM_ETM         0x508

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#define MEDIA_G3D                       0

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#define MEDIA_CODEC_VPU                 2

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#define MEDIA_CODEC_JPEG                3

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#define MEDIA_ISP                       4

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#define MEDIA_ADE                       5

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#define MEDIA_MMU                       6

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#define MEDIA_XG2RAM1                   7

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#define AO_G3D                          1

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#define AO_CODECISP                     2

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#define AO_MCPU                         4

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#define AO_BBPHARQMEM                   5

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#define AO_HIFI                         8

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#define AO_ACPUSCUL2C                   12

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#endif /*_DT_BINDINGS_RESET_CONTROLLER_HI6220*/

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