/* SPDX-License-Identifier: GPL-2.0-only */1/*2* Samsung S5P/Exynos4 SoC series camera interface driver header3*4* Copyright (C) 2010 - 2013 Samsung Electronics Co., Ltd.5* Sylwester Nawrocki <[email protected]>6*/78#ifndef S5P_FIMC_H_9#define S5P_FIMC_H_1011#include <media/media-entity.h>12#include <media/v4l2-dev.h>13#include <media/v4l2-mediabus.h>1415/*16* Enumeration of data inputs to the camera subsystem.17*/18enum fimc_input {19FIMC_INPUT_PARALLEL_0 = 1,20FIMC_INPUT_PARALLEL_1,21FIMC_INPUT_MIPI_CSI2_0 = 3,22FIMC_INPUT_MIPI_CSI2_1,23FIMC_INPUT_WRITEBACK_A = 5,24FIMC_INPUT_WRITEBACK_B,25FIMC_INPUT_WRITEBACK_ISP = 5,26};2728/*29* Enumeration of the FIMC data bus types.30*/31enum fimc_bus_type {32/* Camera parallel bus */33FIMC_BUS_TYPE_ITU_601 = 1,34/* Camera parallel bus with embedded synchronization */35FIMC_BUS_TYPE_ITU_656,36/* Camera MIPI-CSI2 serial bus */37FIMC_BUS_TYPE_MIPI_CSI2,38/* FIFO link from LCD controller (WriteBack A) */39FIMC_BUS_TYPE_LCD_WRITEBACK_A,40/* FIFO link from LCD controller (WriteBack B) */41FIMC_BUS_TYPE_LCD_WRITEBACK_B,42/* FIFO link from FIMC-IS */43FIMC_BUS_TYPE_ISP_WRITEBACK = FIMC_BUS_TYPE_LCD_WRITEBACK_B,44};4546#define fimc_input_is_parallel(x) ((x) == 1 || (x) == 2)47#define fimc_input_is_mipi_csi(x) ((x) == 3 || (x) == 4)4849/*50* The subdevices' group IDs.51*/52#define GRP_ID_SENSOR (1 << 8)53#define GRP_ID_FIMC_IS_SENSOR (1 << 9)54#define GRP_ID_WRITEBACK (1 << 10)55#define GRP_ID_CSIS (1 << 11)56#define GRP_ID_FIMC (1 << 12)57#define GRP_ID_FLITE (1 << 13)58#define GRP_ID_FIMC_IS (1 << 14)5960/**61* struct fimc_source_info - video source description required for the host62* interface configuration63*64* @fimc_bus_type: FIMC camera input type65* @sensor_bus_type: image sensor bus type, MIPI, ITU-R BT.601 etc.66* @flags: the parallel sensor bus flags defining signals polarity (V4L2_MBUS_*)67* @mux_id: FIMC camera interface multiplexer index (separate for MIPI and ITU)68*/69struct fimc_source_info {70enum fimc_bus_type fimc_bus_type;71enum fimc_bus_type sensor_bus_type;72u16 flags;73u16 mux_id;74};7576/*77* v4l2_device notification id. This is only for internal use in the kernel.78* Sensor subdevs should issue S5P_FIMC_TX_END_NOTIFY notification in single79* frame capture mode when there is only one VSYNC pulse issued by the sensor80* at beginning of the frame transmission.81*/82#define S5P_FIMC_TX_END_NOTIFY _IO('e', 0)8384#define FIMC_MAX_PLANES 38586/**87* struct fimc_fmt - color format data structure88* @mbus_code: media bus pixel code, -1 if not applicable89* @fourcc: fourcc code for this format, 0 if not applicable90* @color: the driver's private color format id91* @memplanes: number of physically non-contiguous data planes92* @colplanes: number of physically contiguous data planes93* @colorspace: v4l2 colorspace (V4L2_COLORSPACE_*)94* @depth: per plane driver's private 'number of bits per pixel'95* @mdataplanes: bitmask indicating meta data plane(s), (1 << plane_no)96* @flags: flags indicating which operation mode format applies to97*/98struct fimc_fmt {99u32 mbus_code;100u32 fourcc;101u32 color;102u16 memplanes;103u16 colplanes;104u8 colorspace;105u8 depth[FIMC_MAX_PLANES];106u16 mdataplanes;107u16 flags;108#define FMT_FLAGS_CAM (1 << 0)109#define FMT_FLAGS_M2M_IN (1 << 1)110#define FMT_FLAGS_M2M_OUT (1 << 2)111#define FMT_FLAGS_M2M (1 << 1 | 1 << 2)112#define FMT_HAS_ALPHA (1 << 3)113#define FMT_FLAGS_COMPRESSED (1 << 4)114#define FMT_FLAGS_WRITEBACK (1 << 5)115#define FMT_FLAGS_RAW_BAYER (1 << 6)116#define FMT_FLAGS_YUV (1 << 7)117};118119struct exynos_media_pipeline;120121/*122* Media pipeline operations to be called from within a video node, i.e. the123* last entity within the pipeline. Implemented by related media device driver.124*/125struct exynos_media_pipeline_ops {126int (*prepare)(struct exynos_media_pipeline *p,127struct media_entity *me);128int (*unprepare)(struct exynos_media_pipeline *p);129int (*open)(struct exynos_media_pipeline *p, struct media_entity *me,130bool resume);131int (*close)(struct exynos_media_pipeline *p);132int (*set_stream)(struct exynos_media_pipeline *p, bool state);133};134135struct exynos_video_entity {136struct video_device vdev;137struct exynos_media_pipeline *pipe;138};139140struct exynos_media_pipeline {141struct media_pipeline mp;142const struct exynos_media_pipeline_ops *ops;143};144145static inline struct exynos_video_entity *vdev_to_exynos_video_entity(146struct video_device *vdev)147{148return container_of(vdev, struct exynos_video_entity, vdev);149}150151#define fimc_pipeline_call(ent, op, args...) \152((!(ent) || !(ent)->pipe) ? -ENOENT : \153(((ent)->pipe->ops && (ent)->pipe->ops->op) ? \154(ent)->pipe->ops->op(((ent)->pipe), ##args) : -ENOIOCTLCMD)) \155156#endif /* S5P_FIMC_H_ */157158159