/* SPDX-License-Identifier: GPL-2.0-only */1/*2* ADV7343 header file3*4* Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/5*/67#ifndef ADV7343_H8#define ADV7343_H910#define ADV7343_COMPOSITE_ID (0)11#define ADV7343_COMPONENT_ID (1)12#define ADV7343_SVIDEO_ID (2)1314/**15* struct adv7343_power_mode - power mode configuration.16* @sleep_mode: on enable the current consumption is reduced to micro ampere17* level. All DACs and the internal PLL circuit are disabled.18* Registers can be read from and written in sleep mode.19* @pll_control: PLL and oversampling control. This control allows internal20* PLL 1 circuit to be powered down and the oversampling to be21* switched off.22* @dac: array to configure power on/off DAC's 1..623*24* Power mode register (Register 0x0), for more info refer REGISTER MAP ACCESS25* section of datasheet[1], table 17 page no 30.26*27* [1] http://www.analog.com/static/imported-files/data_sheets/ADV7342_7343.pdf28*/29struct adv7343_power_mode {30bool sleep_mode;31bool pll_control;32u32 dac[6];33};3435/**36* struct adv7343_sd_config - SD Only Output Configuration.37* @sd_dac_out: array configuring SD DAC Outputs 1 and 238*/39struct adv7343_sd_config {40/* SD only Output Configuration */41u32 sd_dac_out[2];42};4344/**45* struct adv7343_platform_data - Platform data values and access functions.46* @mode_config: Configuration for power mode.47* @sd_config: SD Only Configuration.48*/49struct adv7343_platform_data {50struct adv7343_power_mode mode_config;51struct adv7343_sd_config sd_config;52};5354#endif /* End of #ifndef ADV7343_H */555657