/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */1/*2* include/uapi/drm/omap_drm.h3*4* Copyright (C) 2011 Texas Instruments5* Author: Rob Clark <[email protected]>6*7* This program is free software; you can redistribute it and/or modify it8* under the terms of the GNU General Public License version 2 as published by9* the Free Software Foundation.10*11* This program is distributed in the hope that it will be useful, but WITHOUT12* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or13* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for14* more details.15*16* You should have received a copy of the GNU General Public License along with17* this program. If not, see <http://www.gnu.org/licenses/>.18*/1920#ifndef __OMAP_DRM_H__21#define __OMAP_DRM_H__2223#include "drm.h"2425#if defined(__cplusplus)26extern "C" {27#endif2829/* Please note that modifications to all structs defined here are30* subject to backwards-compatibility constraints.31*/3233#define OMAP_PARAM_CHIPSET_ID 1 /* ie. 0x3430, 0x4430, etc */3435struct drm_omap_param {36__u64 param; /* in */37__u64 value; /* in (set_param), out (get_param) */38};3940/* Scanout buffer, consumable by DSS */41#define OMAP_BO_SCANOUT 0x000000014243/* Buffer CPU caching mode: cached, write-combining or uncached. */44#define OMAP_BO_CACHED 0x0000000045#define OMAP_BO_WC 0x0000000246#define OMAP_BO_UNCACHED 0x0000000447#define OMAP_BO_CACHE_MASK 0x000000064849/* Use TILER for the buffer. The TILER container unit can be 8, 16 or 32 bits. */50#define OMAP_BO_TILED_8 0x0000010051#define OMAP_BO_TILED_16 0x0000020052#define OMAP_BO_TILED_32 0x0000030053#define OMAP_BO_TILED_MASK 0x00000f005455union omap_gem_size {56__u32 bytes; /* (for non-tiled formats) */57struct {58__u16 width;59__u16 height;60} tiled; /* (for tiled formats) */61};6263struct drm_omap_gem_new {64union omap_gem_size size; /* in */65__u32 flags; /* in */66__u32 handle; /* out */67__u32 __pad;68};6970/* mask of operations: */71enum omap_gem_op {72OMAP_GEM_READ = 0x01,73OMAP_GEM_WRITE = 0x02,74};7576struct drm_omap_gem_cpu_prep {77__u32 handle; /* buffer handle (in) */78__u32 op; /* mask of omap_gem_op (in) */79};8081struct drm_omap_gem_cpu_fini {82__u32 handle; /* buffer handle (in) */83__u32 op; /* mask of omap_gem_op (in) */84/* TODO maybe here we pass down info about what regions are touched85* by sw so we can be clever about cache ops? For now a placeholder,86* set to zero and we just do full buffer flush..87*/88__u32 nregions;89__u32 __pad;90};9192struct drm_omap_gem_info {93__u32 handle; /* buffer handle (in) */94__u32 pad;95__u64 offset; /* mmap offset (out) */96/* note: in case of tiled buffers, the user virtual size can be97* different from the physical size (ie. how many pages are needed98* to back the object) which is returned in DRM_IOCTL_GEM_OPEN..99* This size here is the one that should be used if you want to100* mmap() the buffer:101*/102__u32 size; /* virtual size for mmap'ing (out) */103__u32 __pad;104};105106#define DRM_OMAP_GET_PARAM 0x00107#define DRM_OMAP_SET_PARAM 0x01108#define DRM_OMAP_GEM_NEW 0x03109#define DRM_OMAP_GEM_CPU_PREP 0x04 /* Deprecated, to be removed */110#define DRM_OMAP_GEM_CPU_FINI 0x05 /* Deprecated, to be removed */111#define DRM_OMAP_GEM_INFO 0x06112#define DRM_OMAP_NUM_IOCTLS 0x07113114#define DRM_IOCTL_OMAP_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GET_PARAM, struct drm_omap_param)115#define DRM_IOCTL_OMAP_SET_PARAM DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_SET_PARAM, struct drm_omap_param)116#define DRM_IOCTL_OMAP_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_NEW, struct drm_omap_gem_new)117#define DRM_IOCTL_OMAP_GEM_CPU_PREP DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_PREP, struct drm_omap_gem_cpu_prep)118#define DRM_IOCTL_OMAP_GEM_CPU_FINI DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_FINI, struct drm_omap_gem_cpu_fini)119#define DRM_IOCTL_OMAP_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_INFO, struct drm_omap_gem_info)120121#if defined(__cplusplus)122}123#endif124125#endif /* __OMAP_DRM_H__ */126127128