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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/lib/crypto/arm64/sm3-ce-core.S
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/* SPDX-License-Identifier: GPL-2.0-only */

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/*

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 * sm3-ce-core.S - SM3 secure hash using ARMv8.2 Crypto Extensions

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 *

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 * Copyright (C) 2018 Linaro Ltd <[email protected]>

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 */

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#include <linux/linkage.h>

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#include <asm/assembler.h>

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	.irp		b, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12

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	.set		.Lv\b\().4s, \b

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	.endr

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	.macro		sm3partw1, rd, rn, rm

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	.inst		0xce60c000 | .L\rd | (.L\rn << 5) | (.L\rm << 16)

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	.endm

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	.macro		sm3partw2, rd, rn, rm

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	.inst		0xce60c400 | .L\rd | (.L\rn << 5) | (.L\rm << 16)

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	.endm

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	.macro		sm3ss1, rd, rn, rm, ra

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	.inst		0xce400000 | .L\rd | (.L\rn << 5) | (.L\ra << 10) | (.L\rm << 16)

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	.endm

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	.macro		sm3tt1a, rd, rn, rm, imm2

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	.inst		0xce408000 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)

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	.endm

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	.macro		sm3tt1b, rd, rn, rm, imm2

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	.inst		0xce408400 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)

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	.endm

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	.macro		sm3tt2a, rd, rn, rm, imm2

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	.inst		0xce408800 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)

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	.endm

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	.macro		sm3tt2b, rd, rn, rm, imm2

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	.inst		0xce408c00 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)

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	.endm

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	.macro		round, ab, s0, t0, t1, i

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	sm3ss1		v5.4s, v8.4s, \t0\().4s, v9.4s

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	shl		\t1\().4s, \t0\().4s, #1

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	sri		\t1\().4s, \t0\().4s, #31

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	sm3tt1\ab	v8.4s, v5.4s, v10.4s, \i

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	sm3tt2\ab	v9.4s, v5.4s, \s0\().4s, \i

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	.endm

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	.macro		qround, ab, s0, s1, s2, s3, s4

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	.ifnb		\s4

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	ext		\s4\().16b, \s1\().16b, \s2\().16b, #12

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	ext		v6.16b, \s0\().16b, \s1\().16b, #12

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	ext		v7.16b, \s2\().16b, \s3\().16b, #8

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	sm3partw1	\s4\().4s, \s0\().4s, \s3\().4s

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	.endif

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	eor		v10.16b, \s0\().16b, \s1\().16b

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	round		\ab, \s0, v11, v12, 0

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	round		\ab, \s0, v12, v11, 1

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	round		\ab, \s0, v11, v12, 2

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	round		\ab, \s0, v12, v11, 3

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	.ifnb		\s4

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	sm3partw2	\s4\().4s, v7.4s, v6.4s

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	.endif

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	.endm

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	/*

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	 * void sm3_ce_transform(struct sm3_block_state *state,

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	 *			 const u8 *data, size_t nblocks)

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	 */

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	.text

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SYM_FUNC_START(sm3_ce_transform)

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	/* load state */

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	ld1		{v8.4s-v9.4s}, [x0]

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	rev64		v8.4s, v8.4s

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	rev64		v9.4s, v9.4s

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	ext		v8.16b, v8.16b, v8.16b, #8

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	ext		v9.16b, v9.16b, v9.16b, #8

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	adr_l		x8, .Lt

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	ldp		s13, s14, [x8]

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	/* load input */

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0:	ld1		{v0.16b-v3.16b}, [x1], #64

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	sub		x2, x2, #1

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	mov		v15.16b, v8.16b

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	mov		v16.16b, v9.16b

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	rev32		v0.16b, v0.16b

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	rev32		v1.16b, v1.16b

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	rev32		v2.16b, v2.16b

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	rev32		v3.16b, v3.16b

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	ext		v11.16b, v13.16b, v13.16b, #4

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	qround		a, v0, v1, v2, v3, v4

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	qround		a, v1, v2, v3, v4, v0

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	qround		a, v2, v3, v4, v0, v1

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	qround		a, v3, v4, v0, v1, v2

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	ext		v11.16b, v14.16b, v14.16b, #4

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	qround		b, v4, v0, v1, v2, v3

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	qround		b, v0, v1, v2, v3, v4

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	qround		b, v1, v2, v3, v4, v0

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	qround		b, v2, v3, v4, v0, v1

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	qround		b, v3, v4, v0, v1, v2

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	qround		b, v4, v0, v1, v2, v3

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	qround		b, v0, v1, v2, v3, v4

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	qround		b, v1, v2, v3, v4, v0

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	qround		b, v2, v3, v4, v0, v1

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	qround		b, v3, v4

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	qround		b, v4, v0

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	qround		b, v0, v1

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	eor		v8.16b, v8.16b, v15.16b

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	eor		v9.16b, v9.16b, v16.16b

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	/* handled all input blocks? */

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	cbnz		x2, 0b

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	/* save state */

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	rev64		v8.4s, v8.4s

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	rev64		v9.4s, v9.4s

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	ext		v8.16b, v8.16b, v8.16b, #8

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	ext		v9.16b, v9.16b, v9.16b, #8

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	st1		{v8.4s-v9.4s}, [x0]

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	ret

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SYM_FUNC_END(sm3_ce_transform)

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	.section	".rodata", "a"

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	.align		3

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.Lt:	.word		0x79cc4519, 0x9d8a7a87

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