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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/sound/pci/pcxhr/pcxhr_core.h
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/* SPDX-License-Identifier: GPL-2.0-or-later */

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/*

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 * Driver for Digigram pcxhr compatible soundcards

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 *

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 * low level interface with interrupt and message handling

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 *

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 * Copyright (c) 2004 by Digigram <[email protected]>

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 */

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#ifndef __SOUND_PCXHR_CORE_H

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#define __SOUND_PCXHR_CORE_H

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struct firmware;

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struct pcxhr_mgr;

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/* init and firmware download commands */

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void pcxhr_reset_xilinx_com(struct pcxhr_mgr *mgr);

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void pcxhr_reset_dsp(struct pcxhr_mgr *mgr);

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void pcxhr_enable_dsp(struct pcxhr_mgr *mgr);

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int pcxhr_load_xilinx_binary(struct pcxhr_mgr *mgr, const struct firmware *xilinx, int second);

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int pcxhr_load_eeprom_binary(struct pcxhr_mgr *mgr, const struct firmware *eeprom);

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int pcxhr_load_boot_binary(struct pcxhr_mgr *mgr, const struct firmware *boot);

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int pcxhr_load_dsp_binary(struct pcxhr_mgr *mgr, const struct firmware *dsp);

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/* DSP time available on MailBox4 register : 24 bit time samples() */

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#define PCXHR_DSP_TIME_MASK		0x00ffffff

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#define PCXHR_DSP_TIME_INVALID		0x10000000

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#define PCXHR_SIZE_MAX_CMD		8

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#define PCXHR_SIZE_MAX_STATUS		16

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#define PCXHR_SIZE_MAX_LONG_STATUS	256

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struct pcxhr_rmh {

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	u16	cmd_len;		/* length of the command to send (WORDs) */

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	u16	stat_len;		/* length of the status received (WORDs) */

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	u16	dsp_stat;		/* status type, RMP_SSIZE_XXX */

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	u16	cmd_idx;		/* index of the command */

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	u32	cmd[PCXHR_SIZE_MAX_CMD];

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	u32	stat[PCXHR_SIZE_MAX_STATUS];

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};

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enum {

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	CMD_VERSION,			/* cmd_len = 2	stat_len = 1 */

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	CMD_SUPPORTED,			/* cmd_len = 1	stat_len = 4 */

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	CMD_TEST_IT,			/* cmd_len = 1	stat_len = 1 */

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	CMD_SEND_IRQA,			/* cmd_len = 1	stat_len = 0 */

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	CMD_ACCESS_IO_WRITE,		/* cmd_len >= 1	stat_len >= 1 */

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	CMD_ACCESS_IO_READ,		/* cmd_len >= 1	stat_len >= 1 */

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	CMD_ASYNC,			/* cmd_len = 1	stat_len = 1 */

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	CMD_MODIFY_CLOCK,		/* cmd_len = 3	stat_len = 0 */

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	CMD_RESYNC_AUDIO_INPUTS,	/* cmd_len = 1	stat_len = 0 */

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	CMD_GET_DSP_RESOURCES,		/* cmd_len = 1	stat_len = 4 */

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	CMD_SET_TIMER_INTERRUPT,	/* cmd_len = 1	stat_len = 0 */

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	CMD_RES_PIPE,			/* cmd_len >=2	stat_len = 0 */

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	CMD_FREE_PIPE,			/* cmd_len = 1	stat_len = 0 */

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	CMD_CONF_PIPE,			/* cmd_len = 2	stat_len = 0 */

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	CMD_STOP_PIPE,			/* cmd_len = 1	stat_len = 0 */

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	CMD_PIPE_SAMPLE_COUNT,		/* cmd_len = 2	stat_len = 2 */

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	CMD_CAN_START_PIPE,		/* cmd_len >= 1	stat_len = 1 */

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	CMD_START_STREAM,		/* cmd_len = 2	stat_len = 0 */

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	CMD_STREAM_OUT_LEVEL_ADJUST,	/* cmd_len >= 1	stat_len = 0 */

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	CMD_STOP_STREAM,		/* cmd_len = 2	stat_len = 0 */

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	CMD_UPDATE_R_BUFFERS,		/* cmd_len = 4	stat_len = 0 */

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	CMD_FORMAT_STREAM_OUT,		/* cmd_len >= 2	stat_len = 0 */

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	CMD_FORMAT_STREAM_IN,		/* cmd_len >= 4	stat_len = 0 */

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	CMD_STREAM_SAMPLE_COUNT,	/* cmd_len = 2	stat_len = (2 * nb_stream) */

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	CMD_AUDIO_LEVEL_ADJUST,		/* cmd_len = 3	stat_len = 0 */

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	CMD_GET_TIME_CODE,		/* cmd_len = 1  stat_len = 5 */

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	CMD_MANAGE_SIGNAL,		/* cmd_len = 1  stat_len = 0 */

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	CMD_LAST_INDEX

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};

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#define MASK_DSP_WORD		0x00ffffff

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#define MASK_ALL_STREAM		0x00ffffff

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#define MASK_DSP_WORD_LEVEL	0x000001ff

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#define MASK_FIRST_FIELD	0x0000001f

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#define FIELD_SIZE		5

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/*

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 init the rmh struct; by default cmd_len is set to 1

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 */

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void pcxhr_init_rmh(struct pcxhr_rmh *rmh, int cmd);

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void pcxhr_set_pipe_cmd_params(struct pcxhr_rmh* rmh, int capture, unsigned int param1,

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			       unsigned int param2, unsigned int param3);

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#define DSP_EXT_CMD_SET(x) (x->dsp_version > 0x012800)

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/*

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 send the rmh

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 */

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int pcxhr_send_msg(struct pcxhr_mgr *mgr, struct pcxhr_rmh *rmh);

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/* values used for CMD_ACCESS_IO_WRITE and CMD_ACCESS_IO_READ */

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#define IO_NUM_REG_CONT			0

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#define IO_NUM_REG_GENCLK		1

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#define IO_NUM_REG_MUTE_OUT		2

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#define IO_NUM_SPEED_RATIO		4

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#define IO_NUM_REG_STATUS		5

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#define IO_NUM_REG_CUER			10

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#define IO_NUM_UER_CHIP_REG		11

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#define IO_NUM_REG_CONFIG_SRC		12

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#define IO_NUM_REG_OUT_ANA_LEVEL	20

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#define IO_NUM_REG_IN_ANA_LEVEL		21

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#define REG_CONT_VALSMPTE		0x000800

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#define REG_CONT_UNMUTE_INPUTS		0x020000

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/* parameters used with register IO_NUM_REG_STATUS */

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#define REG_STATUS_OPTIONS		0

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#define REG_STATUS_AES_SYNC		8

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#define REG_STATUS_AES_1		9

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#define REG_STATUS_AES_2		10

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#define REG_STATUS_AES_3		11

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#define REG_STATUS_AES_4		12

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#define REG_STATUS_WORD_CLOCK		13

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#define REG_STATUS_INTER_SYNC		14

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#define REG_STATUS_CURRENT		0x80

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/* results */

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#define REG_STATUS_OPT_NO_VIDEO_SIGNAL	0x01

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#define REG_STATUS_OPT_DAUGHTER_MASK	0x1c

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#define REG_STATUS_OPT_ANALOG_BOARD	0x00

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#define REG_STATUS_OPT_NO_DAUGHTER	0x1c

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#define REG_STATUS_OPT_COMPANION_MASK	0xe0

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#define REG_STATUS_OPT_NO_COMPANION	0xe0

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#define REG_STATUS_SYNC_32000		0x00

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#define REG_STATUS_SYNC_44100		0x01

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#define REG_STATUS_SYNC_48000		0x02

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#define REG_STATUS_SYNC_64000		0x03

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#define REG_STATUS_SYNC_88200		0x04

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#define REG_STATUS_SYNC_96000		0x05

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#define REG_STATUS_SYNC_128000		0x06

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#define REG_STATUS_SYNC_176400		0x07

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#define REG_STATUS_SYNC_192000		0x08

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int pcxhr_set_pipe_state(struct pcxhr_mgr *mgr, int playback_mask, int capture_mask, int start);

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int pcxhr_write_io_num_reg_cont(struct pcxhr_mgr *mgr, unsigned int mask,

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				unsigned int value, int *changed);

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/* codec parameters */

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#define CS8416_RUN		0x200401

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#define CS8416_FORMAT_DETECT	0x200b00

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#define CS8416_CSB0		0x201900

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#define CS8416_CSB1		0x201a00

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#define CS8416_CSB2		0x201b00

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#define CS8416_CSB3		0x201c00

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#define CS8416_CSB4		0x201d00

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#define CS8416_VERSION		0x207f00

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#define CS8420_DATA_FLOW_CTL	0x200301

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#define CS8420_CLOCK_SRC_CTL	0x200401

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#define CS8420_RECEIVER_ERRORS	0x201000

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#define CS8420_SRC_RATIO	0x201e00

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#define CS8420_CSB0		0x202000

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#define CS8420_CSB1		0x202100

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#define CS8420_CSB2		0x202200

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#define CS8420_CSB3		0x202300

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#define CS8420_CSB4		0x202400

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#define CS8420_VERSION		0x207f00

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#define CS4271_MODE_CTL_1	0x200101

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#define CS4271_DAC_CTL		0x200201

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#define CS4271_VOLMIX		0x200301

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#define CS4271_VOLMUTE_LEFT	0x200401

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#define CS4271_VOLMUTE_RIGHT	0x200501

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#define CS4271_ADC_CTL		0x200601

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#define CS4271_MODE_CTL_2	0x200701

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#define CHIP_SIG_AND_MAP_SPI	0xff7f00

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/* codec selection */

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#define CS4271_01_CS		0x160018

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#define CS4271_23_CS		0x160019

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#define CS4271_45_CS		0x16001a

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#define CS4271_67_CS		0x16001b

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#define CS4271_89_CS		0x16001c

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#define CS4271_AB_CS		0x16001d

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#define CS8420_01_CS		0x080090

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#define CS8420_23_CS		0x080092

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#define CS8420_45_CS		0x080094

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#define CS8420_67_CS		0x080096

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#define CS8416_01_CS		0x080098

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/* interrupt handling */

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irqreturn_t pcxhr_interrupt(int irq, void *dev_id);

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irqreturn_t pcxhr_threaded_irq(int irq, void *dev_id);

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#endif /* __SOUND_PCXHR_CORE_H */

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