Path: blob/master/sound/soc/amd/vangogh/vg_chip_offset_byte.h
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/* SPDX-License-Identifier: GPL-2.0+ */1/*2* AMD ACP 5.x Register Documentation3*4* Copyright 2021 Advanced Micro Devices, Inc.5*/67#ifndef _acp_ip_OFFSET_HEADER8#define _acp_ip_OFFSET_HEADER910/* Registers from ACP_DMA block */11#define ACP_DMA_CNTL_0 0x124000012#define ACP_DMA_CNTL_1 0x124000413#define ACP_DMA_CNTL_2 0x124000814#define ACP_DMA_CNTL_3 0x124000C15#define ACP_DMA_CNTL_4 0x124001016#define ACP_DMA_CNTL_5 0x124001417#define ACP_DMA_CNTL_6 0x124001818#define ACP_DMA_CNTL_7 0x124001C19#define ACP_DMA_DSCR_STRT_IDX_0 0x124002020#define ACP_DMA_DSCR_STRT_IDX_1 0x124002421#define ACP_DMA_DSCR_STRT_IDX_2 0x124002822#define ACP_DMA_DSCR_STRT_IDX_3 0x124002C23#define ACP_DMA_DSCR_STRT_IDX_4 0x124003024#define ACP_DMA_DSCR_STRT_IDX_5 0x124003425#define ACP_DMA_DSCR_STRT_IDX_6 0x124003826#define ACP_DMA_DSCR_STRT_IDX_7 0x124003C27#define ACP_DMA_DSCR_CNT_0 0x124004028#define ACP_DMA_DSCR_CNT_1 0x124004429#define ACP_DMA_DSCR_CNT_2 0x124004830#define ACP_DMA_DSCR_CNT_3 0x124004C31#define ACP_DMA_DSCR_CNT_4 0x124005032#define ACP_DMA_DSCR_CNT_5 0x124005433#define ACP_DMA_DSCR_CNT_6 0x124005834#define ACP_DMA_DSCR_CNT_7 0x124005C35#define ACP_DMA_PRIO_0 0x124006036#define ACP_DMA_PRIO_1 0x124006437#define ACP_DMA_PRIO_2 0x124006838#define ACP_DMA_PRIO_3 0x124006C39#define ACP_DMA_PRIO_4 0x124007040#define ACP_DMA_PRIO_5 0x124007441#define ACP_DMA_PRIO_6 0x124007842#define ACP_DMA_PRIO_7 0x124007C43#define ACP_DMA_CUR_DSCR_0 0x124008044#define ACP_DMA_CUR_DSCR_1 0x124008445#define ACP_DMA_CUR_DSCR_2 0x124008846#define ACP_DMA_CUR_DSCR_3 0x124008C47#define ACP_DMA_CUR_DSCR_4 0x124009048#define ACP_DMA_CUR_DSCR_5 0x124009449#define ACP_DMA_CUR_DSCR_6 0x124009850#define ACP_DMA_CUR_DSCR_7 0x124009C51#define ACP_DMA_CUR_TRANS_CNT_0 0x12400A052#define ACP_DMA_CUR_TRANS_CNT_1 0x12400A453#define ACP_DMA_CUR_TRANS_CNT_2 0x12400A854#define ACP_DMA_CUR_TRANS_CNT_3 0x12400AC55#define ACP_DMA_CUR_TRANS_CNT_4 0x12400B056#define ACP_DMA_CUR_TRANS_CNT_5 0x12400B457#define ACP_DMA_CUR_TRANS_CNT_6 0x12400B858#define ACP_DMA_CUR_TRANS_CNT_7 0x12400BC59#define ACP_DMA_ERR_STS_0 0x12400C060#define ACP_DMA_ERR_STS_1 0x12400C461#define ACP_DMA_ERR_STS_2 0x12400C862#define ACP_DMA_ERR_STS_3 0x12400CC63#define ACP_DMA_ERR_STS_4 0x12400D064#define ACP_DMA_ERR_STS_5 0x12400D465#define ACP_DMA_ERR_STS_6 0x12400D866#define ACP_DMA_ERR_STS_7 0x12400DC67#define ACP_DMA_DESC_BASE_ADDR 0x12400E068#define ACP_DMA_DESC_MAX_NUM_DSCR 0x12400E469#define ACP_DMA_CH_STS 0x12400E870#define ACP_DMA_CH_GROUP 0x12400EC71#define ACP_DMA_CH_RST_STS 0x12400F07273/* Registers from ACP_AXI2AXIATU block */74#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_1 0x1240C0075#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_1 0x1240C0476#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_2 0x1240C0877#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_2 0x1240C0C78#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_3 0x1240C1079#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_3 0x1240C1480#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_4 0x1240C1881#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_4 0x1240C1C82#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_5 0x1240C2083#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_5 0x1240C2484#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_6 0x1240C2885#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_6 0x1240C2C86#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_7 0x1240C3087#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_7 0x1240C3488#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_8 0x1240C3889#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_8 0x1240C3C90#define ACPAXI2AXI_ATU_CTRL 0x1240C409192/* Registers from ACP_CLKRST block */93#define ACP_SOFT_RESET 0x124100094#define ACP_CONTROL 0x124100495#define ACP_STATUS 0x124100896#define ACP_DYNAMIC_CG_MASTER_CONTROL 0x12410109798/* Registers from ACP_MISC block */99#define ACP_EXTERNAL_INTR_ENB 0x1241800100#define ACP_EXTERNAL_INTR_CNTL 0x1241804101#define ACP_EXTERNAL_INTR_STAT 0x1241808102#define ACP_ERROR_STATUS 0x12418C4103#define ACP_SW_I2S_ERROR_REASON 0x12418C8104#define ACP_MEM_PG_STS 0x12418CC105#define ACP_PGMEM_DEEP_SLEEP_CTRL 0x12418D0106#define ACP_PGMEM_SHUT_DOWN_CTRL 0x12418D4107108/* Registers from ACP_PGFSM block */109#define ACP_PIN_CONFIG 0x1241400110#define ACP_PAD_PULLUP_CTRL 0x1241404111#define ACP_PAD_PULLDOWN_CTRL 0x1241408112#define ACP_PAD_DRIVE_STRENGTH_CTRL 0x124140C113#define ACP_PAD_SCHMEN_CTRL 0x1241410114#define ACP_SW_PAD_KEEPER_EN 0x1241414115#define ACP_SW_WAKE_EN 0x1241418116#define ACP_I2S_WAKE_EN 0x124141C117#define ACP_PME_EN 0x1241420118#define ACP_PGFSM_CONTROL 0x1241424119#define ACP_PGFSM_STATUS 0x1241428120#define ACP_CLKMUX_SEL 0x124142C121#define ACP_DEVICE_STATE 0x1241430122#define AZ_DEVICE_STATE 0x1241434123#define ACP_INTR_URGENCY_TIMER 0x1241438124#define AZ_INTR_URGENCY_TIMER 0x124143C125#define ACP_AON_SW_INTR_TRIG 0x1241440126127/* Registers from ACP_SCRATCH block */128#define ACP_SCRATCH_REG_0 0x1250000129#define ACP_SCRATCH_REG_1 0x1250004130#define ACP_SCRATCH_REG_2 0x1250008131#define ACP_SCRATCH_REG_3 0x125000C132#define ACP_SCRATCH_REG_4 0x1250010133#define ACP_SCRATCH_REG_5 0x1250014134#define ACP_SCRATCH_REG_6 0x1250018135#define ACP_SCRATCH_REG_7 0x125001C136#define ACP_SCRATCH_REG_8 0x1250020137#define ACP_SCRATCH_REG_9 0x1250024138#define ACP_SCRATCH_REG_10 0x1250028139#define ACP_SCRATCH_REG_11 0x125002C140#define ACP_SCRATCH_REG_12 0x1250030141#define ACP_SCRATCH_REG_13 0x1250034142#define ACP_SCRATCH_REG_14 0x1250038143#define ACP_SCRATCH_REG_15 0x125003C144#define ACP_SCRATCH_REG_16 0x1250040145#define ACP_SCRATCH_REG_17 0x1250044146#define ACP_SCRATCH_REG_18 0x1250048147#define ACP_SCRATCH_REG_19 0x125004C148#define ACP_SCRATCH_REG_20 0x1250050149#define ACP_SCRATCH_REG_21 0x1250054150#define ACP_SCRATCH_REG_22 0x1250058151#define ACP_SCRATCH_REG_23 0x125005C152#define ACP_SCRATCH_REG_24 0x1250060153#define ACP_SCRATCH_REG_25 0x1250064154#define ACP_SCRATCH_REG_26 0x1250068155#define ACP_SCRATCH_REG_27 0x125006C156#define ACP_SCRATCH_REG_28 0x1250070157#define ACP_SCRATCH_REG_29 0x1250074158#define ACP_SCRATCH_REG_30 0x1250078159#define ACP_SCRATCH_REG_31 0x125007C160#define ACP_SCRATCH_REG_32 0x1250080161#define ACP_SCRATCH_REG_33 0x1250084162#define ACP_SCRATCH_REG_34 0x1250088163#define ACP_SCRATCH_REG_35 0x125008C164#define ACP_SCRATCH_REG_36 0x1250090165#define ACP_SCRATCH_REG_37 0x1250094166#define ACP_SCRATCH_REG_38 0x1250098167#define ACP_SCRATCH_REG_39 0x125009C168#define ACP_SCRATCH_REG_40 0x12500A0169#define ACP_SCRATCH_REG_41 0x12500A4170#define ACP_SCRATCH_REG_42 0x12500A8171#define ACP_SCRATCH_REG_43 0x12500AC172#define ACP_SCRATCH_REG_44 0x12500B0173#define ACP_SCRATCH_REG_45 0x12500B4174#define ACP_SCRATCH_REG_46 0x12500B8175#define ACP_SCRATCH_REG_47 0x12500BC176#define ACP_SCRATCH_REG_48 0x12500C0177#define ACP_SCRATCH_REG_49 0x12500C4178#define ACP_SCRATCH_REG_50 0x12500C8179#define ACP_SCRATCH_REG_51 0x12500CC180#define ACP_SCRATCH_REG_52 0x12500D0181#define ACP_SCRATCH_REG_53 0x12500D4182#define ACP_SCRATCH_REG_54 0x12500D8183#define ACP_SCRATCH_REG_55 0x12500DC184#define ACP_SCRATCH_REG_56 0x12500E0185#define ACP_SCRATCH_REG_57 0x12500E4186#define ACP_SCRATCH_REG_58 0x12500E8187#define ACP_SCRATCH_REG_59 0x12500EC188#define ACP_SCRATCH_REG_60 0x12500F0189#define ACP_SCRATCH_REG_61 0x12500F4190#define ACP_SCRATCH_REG_62 0x12500F8191#define ACP_SCRATCH_REG_63 0x12500FC192#define ACP_SCRATCH_REG_64 0x1250100193#define ACP_SCRATCH_REG_65 0x1250104194#define ACP_SCRATCH_REG_66 0x1250108195#define ACP_SCRATCH_REG_67 0x125010C196#define ACP_SCRATCH_REG_68 0x1250110197#define ACP_SCRATCH_REG_69 0x1250114198#define ACP_SCRATCH_REG_70 0x1250118199#define ACP_SCRATCH_REG_71 0x125011C200#define ACP_SCRATCH_REG_72 0x1250120201#define ACP_SCRATCH_REG_73 0x1250124202#define ACP_SCRATCH_REG_74 0x1250128203#define ACP_SCRATCH_REG_75 0x125012C204#define ACP_SCRATCH_REG_76 0x1250130205#define ACP_SCRATCH_REG_77 0x1250134206#define ACP_SCRATCH_REG_78 0x1250138207#define ACP_SCRATCH_REG_79 0x125013C208#define ACP_SCRATCH_REG_80 0x1250140209#define ACP_SCRATCH_REG_81 0x1250144210#define ACP_SCRATCH_REG_82 0x1250148211#define ACP_SCRATCH_REG_83 0x125014C212#define ACP_SCRATCH_REG_84 0x1250150213#define ACP_SCRATCH_REG_85 0x1250154214#define ACP_SCRATCH_REG_86 0x1250158215#define ACP_SCRATCH_REG_87 0x125015C216#define ACP_SCRATCH_REG_88 0x1250160217#define ACP_SCRATCH_REG_89 0x1250164218#define ACP_SCRATCH_REG_90 0x1250168219#define ACP_SCRATCH_REG_91 0x125016C220#define ACP_SCRATCH_REG_92 0x1250170221#define ACP_SCRATCH_REG_93 0x1250174222#define ACP_SCRATCH_REG_94 0x1250178223#define ACP_SCRATCH_REG_95 0x125017C224#define ACP_SCRATCH_REG_96 0x1250180225#define ACP_SCRATCH_REG_97 0x1250184226#define ACP_SCRATCH_REG_98 0x1250188227#define ACP_SCRATCH_REG_99 0x125018C228#define ACP_SCRATCH_REG_100 0x1250190229#define ACP_SCRATCH_REG_101 0x1250194230#define ACP_SCRATCH_REG_102 0x1250198231#define ACP_SCRATCH_REG_103 0x125019C232#define ACP_SCRATCH_REG_104 0x12501A0233#define ACP_SCRATCH_REG_105 0x12501A4234#define ACP_SCRATCH_REG_106 0x12501A8235#define ACP_SCRATCH_REG_107 0x12501AC236#define ACP_SCRATCH_REG_108 0x12501B0237#define ACP_SCRATCH_REG_109 0x12501B4238#define ACP_SCRATCH_REG_110 0x12501B8239#define ACP_SCRATCH_REG_111 0x12501BC240#define ACP_SCRATCH_REG_112 0x12501C0241#define ACP_SCRATCH_REG_113 0x12501C4242#define ACP_SCRATCH_REG_114 0x12501C8243#define ACP_SCRATCH_REG_115 0x12501CC244#define ACP_SCRATCH_REG_116 0x12501D0245#define ACP_SCRATCH_REG_117 0x12501D4246#define ACP_SCRATCH_REG_118 0x12501D8247#define ACP_SCRATCH_REG_119 0x12501DC248#define ACP_SCRATCH_REG_120 0x12501E0249#define ACP_SCRATCH_REG_121 0x12501E4250#define ACP_SCRATCH_REG_122 0x12501E8251#define ACP_SCRATCH_REG_123 0x12501EC252#define ACP_SCRATCH_REG_124 0x12501F0253#define ACP_SCRATCH_REG_125 0x12501F4254#define ACP_SCRATCH_REG_126 0x12501F8255#define ACP_SCRATCH_REG_127 0x12501FC256#define ACP_SCRATCH_REG_128 0x1250200257258/* Registers from ACP_AUDIO_BUFFERS block */259#define ACP_I2S_RX_RINGBUFADDR 0x1242000260#define ACP_I2S_RX_RINGBUFSIZE 0x1242004261#define ACP_I2S_RX_LINKPOSITIONCNTR 0x1242008262#define ACP_I2S_RX_FIFOADDR 0x124200C263#define ACP_I2S_RX_FIFOSIZE 0x1242010264#define ACP_I2S_RX_DMA_SIZE 0x1242014265#define ACP_I2S_RX_LINEARPOSCNTR_HIGH 0x1242018266#define ACP_I2S_RX_LINEARPOSCNTR_LOW 0x124201C267#define ACP_I2S_RX_INTR_WATERMARK_SIZE 0x1242020268#define ACP_I2S_TX_RINGBUFADDR 0x1242024269#define ACP_I2S_TX_RINGBUFSIZE 0x1242028270#define ACP_I2S_TX_LINKPOSITIONCNTR 0x124202C271#define ACP_I2S_TX_FIFOADDR 0x1242030272#define ACP_I2S_TX_FIFOSIZE 0x1242034273#define ACP_I2S_TX_DMA_SIZE 0x1242038274#define ACP_I2S_TX_LINEARPOSCNTR_HIGH 0x124203C275#define ACP_I2S_TX_LINEARPOSCNTR_LOW 0x1242040276#define ACP_I2S_TX_INTR_WATERMARK_SIZE 0x1242044277#define ACP_BT_RX_RINGBUFADDR 0x1242048278#define ACP_BT_RX_RINGBUFSIZE 0x124204C279#define ACP_BT_RX_LINKPOSITIONCNTR 0x1242050280#define ACP_BT_RX_FIFOADDR 0x1242054281#define ACP_BT_RX_FIFOSIZE 0x1242058282#define ACP_BT_RX_DMA_SIZE 0x124205C283#define ACP_BT_RX_LINEARPOSCNTR_HIGH 0x1242060284#define ACP_BT_RX_LINEARPOSCNTR_LOW 0x1242064285#define ACP_BT_RX_INTR_WATERMARK_SIZE 0x1242068286#define ACP_BT_TX_RINGBUFADDR 0x124206C287#define ACP_BT_TX_RINGBUFSIZE 0x1242070288#define ACP_BT_TX_LINKPOSITIONCNTR 0x1242074289#define ACP_BT_TX_FIFOADDR 0x1242078290#define ACP_BT_TX_FIFOSIZE 0x124207C291#define ACP_BT_TX_DMA_SIZE 0x1242080292#define ACP_BT_TX_LINEARPOSCNTR_HIGH 0x1242084293#define ACP_BT_TX_LINEARPOSCNTR_LOW 0x1242088294#define ACP_BT_TX_INTR_WATERMARK_SIZE 0x124208C295#define ACP_HS_RX_RINGBUFADDR 0x1242090296#define ACP_HS_RX_RINGBUFSIZE 0x1242094297#define ACP_HS_RX_LINKPOSITIONCNTR 0x1242098298#define ACP_HS_RX_FIFOADDR 0x124209C299#define ACP_HS_RX_FIFOSIZE 0x12420A0300#define ACP_HS_RX_DMA_SIZE 0x12420A4301#define ACP_HS_RX_LINEARPOSCNTR_HIGH 0x12420A8302#define ACP_HS_RX_LINEARPOSCNTR_LOW 0x12420AC303#define ACP_HS_RX_INTR_WATERMARK_SIZE 0x12420B0304#define ACP_HS_TX_RINGBUFADDR 0x12420B4305#define ACP_HS_TX_RINGBUFSIZE 0x12420B8306#define ACP_HS_TX_LINKPOSITIONCNTR 0x12420BC307#define ACP_HS_TX_FIFOADDR 0x12420C0308#define ACP_HS_TX_FIFOSIZE 0x12420C4309#define ACP_HS_TX_DMA_SIZE 0x12420C8310#define ACP_HS_TX_LINEARPOSCNTR_HIGH 0x12420CC311#define ACP_HS_TX_LINEARPOSCNTR_LOW 0x12420D0312#define ACP_HS_TX_INTR_WATERMARK_SIZE 0x12420D4313314/* Registers from ACP_I2S_TDM block */315#define ACP_I2STDM_IER 0x1242400316#define ACP_I2STDM_IRER 0x1242404317#define ACP_I2STDM_RXFRMT 0x1242408318#define ACP_I2STDM_ITER 0x124240C319#define ACP_I2STDM_TXFRMT 0x1242410320#define ACP_I2STDM0_MSTRCLKGEN 0x1242414321#define ACP_I2STDM1_MSTRCLKGEN 0x1242418322#define ACP_I2STDM2_MSTRCLKGEN 0x124241C323#define ACP_I2STDM_REFCLKGEN 0x1242420324325/* Registers from ACP_BT_TDM block */326#define ACP_BTTDM_IER 0x1242800327#define ACP_BTTDM_IRER 0x1242804328#define ACP_BTTDM_RXFRMT 0x1242808329#define ACP_BTTDM_ITER 0x124280C330#define ACP_BTTDM_TXFRMT 0x1242810331#define ACP_HSTDM_IER 0x1242814332#define ACP_HSTDM_IRER 0x1242818333#define ACP_HSTDM_RXFRMT 0x124281C334#define ACP_HSTDM_ITER 0x1242820335#define ACP_HSTDM_TXFRMT 0x1242824336#endif337338339