Path: blob/master/sound/soc/mediatek/common/mtk-base-afe.h
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/* SPDX-License-Identifier: GPL-2.0 */1/*2* mtk-base-afe.h -- Mediatek base afe structure3*4* Copyright (c) 2016 MediaTek Inc.5* Author: Garlic Tseng <[email protected]>6*/78#ifndef _MTK_BASE_AFE_H_9#define _MTK_BASE_AFE_H_1011#include <linux/soc/mediatek/mtk_sip_svc.h>1213#define MTK_STREAM_NUM (SNDRV_PCM_STREAM_LAST + 1)14#define MTK_SIP_AUDIO_CONTROL MTK_SIP_SMC_CMD(0x517)1516/* SMC CALL Operations */17enum mtk_audio_smc_call_op {18MTK_AUDIO_SMC_OP_INIT = 0,19MTK_AUDIO_SMC_OP_DRAM_REQUEST,20MTK_AUDIO_SMC_OP_DRAM_RELEASE,21MTK_AUDIO_SMC_OP_SRAM_REQUEST,22MTK_AUDIO_SMC_OP_SRAM_RELEASE,23MTK_AUDIO_SMC_OP_ADSP_REQUEST,24MTK_AUDIO_SMC_OP_ADSP_RELEASE,25MTK_AUDIO_SMC_OP_DOMAIN_SIDEBANDS,26MTK_AUDIO_SMC_OP_BTCVSD_WRITE,27MTK_AUDIO_SMC_OP_BTCVSD_UPDATE_CTRL_CLEAR,28MTK_AUDIO_SMC_OP_BTCVSD_UPDATE_CTRL_UNDERFLOW,29MTK_AUDIO_SMC_OP_NUM30};3132struct mtk_base_memif_data {33int id;34const char *name;35int reg_ofs_base;36int reg_ofs_cur;37int reg_ofs_end;38int reg_ofs_base_msb;39int reg_ofs_cur_msb;40int reg_ofs_end_msb;41int fs_reg;42int fs_shift;43int fs_maskbit;44int mono_reg;45int mono_shift;46int mono_invert;47int quad_ch_reg;48int quad_ch_mask;49int quad_ch_shift;50int int_odd_flag_reg;51int int_odd_flag_shift;52int enable_reg;53int enable_shift;54int hd_reg;55int hd_shift;56int hd_align_reg;57int hd_align_mshift;58int msb_reg;59int msb_shift;60int msb_end_reg;61int msb_end_shift;62int agent_disable_reg;63int agent_disable_shift;64int ch_num_reg;65int ch_num_shift;66int ch_num_maskbit;67/* playback memif only */68int pbuf_reg;69int pbuf_mask;70int pbuf_shift;71int minlen_reg;72int minlen_mask;73int minlen_shift;74};7576struct mtk_base_irq_data {77int id;78int irq_cnt_reg;79int irq_cnt_shift;80int irq_cnt_maskbit;81int irq_fs_reg;82int irq_fs_shift;83int irq_fs_maskbit;84int irq_en_reg;85int irq_en_shift;86int irq_clr_reg;87int irq_clr_shift;88int irq_status_shift;89};9091struct device;92struct list_head;93struct mtk_base_afe_memif;94struct mtk_base_afe_irq;95struct mtk_base_afe_dai;96struct regmap;97struct snd_pcm_substream;98struct snd_soc_dai;99100struct mtk_base_afe {101void __iomem *base_addr;102struct device *dev;103struct regmap *regmap;104struct mutex irq_alloc_lock; /* dynamic alloc irq lock */105106unsigned int const *reg_back_up_list;107unsigned int *reg_back_up;108unsigned int reg_back_up_list_num;109110int (*runtime_suspend)(struct device *dev);111int (*runtime_resume)(struct device *dev);112bool suspended;113114struct mtk_base_afe_memif *memif;115int memif_size;116struct mtk_base_afe_irq *irqs;117int irqs_size;118int memif_32bit_supported;119bool preallocate_buffers;120121struct list_head sub_dais;122struct snd_soc_dai_driver *dai_drivers;123unsigned int num_dai_drivers;124125const struct snd_pcm_hardware *mtk_afe_hardware;126int (*memif_fs)(struct snd_pcm_substream *substream,127unsigned int rate);128int (*irq_fs)(struct snd_pcm_substream *substream,129unsigned int rate);130int (*get_dai_fs)(struct mtk_base_afe *afe,131int dai_id, unsigned int rate);132int (*get_memif_pbuf_size)(struct snd_pcm_substream *substream);133134int (*request_dram_resource)(struct device *dev);135int (*release_dram_resource)(struct device *dev);136137void *platform_priv;138};139140struct mtk_base_afe_memif {141unsigned int phys_buf_addr;142int buffer_size;143struct snd_pcm_substream *substream;144const struct mtk_base_memif_data *data;145int irq_usage;146int const_irq;147unsigned char *dma_area;148dma_addr_t dma_addr;149size_t dma_bytes;150};151152struct mtk_base_afe_irq {153const struct mtk_base_irq_data *irq_data;154int irq_occupyed;155};156157struct mtk_base_afe_dai {158struct snd_soc_dai_driver *dai_drivers;159unsigned int num_dai_drivers;160161const struct snd_kcontrol_new *controls;162unsigned int num_controls;163const struct snd_soc_dapm_widget *dapm_widgets;164unsigned int num_dapm_widgets;165const struct snd_soc_dapm_route *dapm_routes;166unsigned int num_dapm_routes;167168struct list_head list;169};170171#endif172173174175